The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates.
Please Note: For the most up-to-date version of this manual, please see our web
site at www.supermicro.com.
SUPERMICRO COMPUTER reserves the right to make changes to the product described in this
manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any
medium or machine without prior written consent.
IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
1. All images and graphics shown in this manual were based upon the latest
PCB revision available at the time of publishing of this manual. The motherboard
you've received may or may not look exactly the same as the graphics shown in
this manual.
2. The X6QTE+ does not contain onboard SCSI components and dual PXH Con-
trollers. It has only one PCI-Exp. slot (Slot 6: PCI-Exp. x16).
3. When one CPU is used, install it in CPU Socket #1. When two CPUs are
used, install them in Socket #1 and Socket #2. If three CPUs are used, install
them in Sockets #1, #2 and #3.
4. To optimize memory performance, please refer to Memory Installation on Page
2-6 in Chapter 2.
1-3
Fan7
SPKR
X6QT8/X6QTE+ User's Manual
Figure 1-2A. SUPER X6QT8 Motherboard Layout
(not drawn to scale)
®
SUPER
X6QT8
DIMM B8
DIMM A8
DIMM B7
DIMM A7
JD1
CPU 1
LE1
JF1
Fan6
FP CTRL
BIOS
UXMB3
UXMB1
JRB1
JL1
USB2/3
WOR1
I-SATA1
JS1
E8501
(North Bridge)
PXH
PXH
JA1
I-SATA2
JS2
ICH5R
(South Bridge)
J27
JPA1
DA2
DA1
JPA2
SCSI Channel A
IPMI
SCSI
AIC7902W
JA2
SCSI Channel B
CPU 2
CPU 4
CPU 3
CPLD
JFSB1
Floppy
JOH1
WD1
PSSMB
JWF1
JWF2
JFDD1
JTAG
JP2
I2C
JPA3
IDE #1
IDE #2
JIDE2
Fan8
KB/
Mouse
JKM1
USB0/1
JUSB1
COM1
JCOM1
VGA
JVGA1
GLAN1
JLAN1
GLAN2
JLAN8
JPL1
JAR1
JP13
J3P1
Fan9
GLAN
CTRL
VGA
CTRL
S I/O
Battery
ot 6 PCI-Ex8(inx16 slot)
Sl
Slot 5 PCI-Ex4(in x8 Slot)
Slot 4 PCI-X
Slot 3 PCI-X
Slot 2 PCI-X 133MH
ot 1 PCI-X
Sl
JPG1
UXMB4
UXMB2
JBT1
COM2
DIMM
A5
DIMM B5
DIMM A6
DIMM B6
DIMM B2
DIMM A2
DIMM B1
DIMM A1
DIMM A3
DIMM B3
DIMM A4
DIMM B4
133MHz
133MHz
z
100MHz (*: ZCR/Green Slot: X6QT8)
WOL1
SMB
J22
*Notes:
•1.Jumpers not indicated are for testing only.
•2. " " indicates the location of "Pin 1".
•3. SCSI, PCI Slots #1-#5, ZCR and PXHs are available on the X6QT8 only.
•4. Both IDE#1 and IDE#2 support compact fl ash cards. When a compact fl ash
card is installed, be sure to connect a power cable to its PWR header (JWF1
for IDE1, JWF2 for IDE2).
•5. UXMB1-UXMB4: These are extended memory bridge chips that came with the
chipset.
•6. CPLD stands for Complex Programmable Logic Devices.
•7. For the SCSI ZCR card to work properly, please install it in the green slot.
•8. If one CPU is used, install it in CPU Socket#1; if two CPUs are used, install
them in Sockets #1 & #2. If three, install them in Sockets #1, #2 and #3.
•9. For best memory performance, install DIMM modules in the following slots
fi rst: DIMMs A1& B1, DIMMs A3 & B3, DIMMs A5 & B5, DIMMs A7 & B7. Also
refer to Pg. 2-6 in Chapter 2 for details.
Fan5
Fan4
Fan3
Fan2
Fan1
JIDE1
JPW1
24-Pin ATX PWR
8-Pin PW
JPW3
8-Pin PW
JPW2
1-4
Chapter 1: Introduction
Quick Reference (X6QT8)
Jumper Description Default Setting
J27 Processor Speed Strapping Enable On (Enabled)(*Chpt.2)
JBT1 CMOS Clear See Chapter 2
JFSB1 Front Side Bus Speed Select
JP13 3rd Power Supply Fail Detect Off (Disabled)
JPA1 SCSI Controller Enable Pins 1-2 (Enabled)
JPA2/JPA3 SCSI Chan.A/Chan.B Term. Enable Off (Enable)
Slot5, Slot6 PCI-Ex4 in x8 Slot (Slot 5), PCI-Ex8 in x16 slot (Slot 6)
Speaker (SPKR) Internal Buzzer
I-SATA1/2 Intel Serial ATA0 (JS1), Serial ATA1 (JS2) Connectors
USB 0/1/2/3 Back Panel USB Ports (0/1), Front Panel USB (2/3)
VGA VGA Connector
WOL Wake-on-LAN Header (JWOL1)
WOR Wake-on-Ring Header (JWOR1)
Off (200 MHz)
(*Note: For CPU and Memory Installation, please Notes 8, 9 on Page 1-4.)
1-5
X6QT8/X6QTE+ User's Manual
LED IndicatorDescription
DA1, DA2 Onboard SCSI Chan. A & Chan. B LEDs
OH LED Overheat LED (JOH1)
Onboard PWR LED Power LED Indicator (LE1)
1-6
Fan7
SPKR
Figure 1-2B. SUPER X6QTE+ Motherboard Layout
(not drawn to scale)
SUPER
®
X6QTE+
DIMM B8
DIMM A8
DIMM B7
DIMM A7
JD1
Chapter 1: Introduction
CPU 1
LE1
JF1
Fan6
FP CTRL
Floppy
JOH1
WD1
PSSMB
JWF1
JWF2
JFDD1
JTAG
JP2
I2C
IDE #1
IDE #2
Fan5
Fan4
Fan3
Fan2
Fan1
JIDE1
JPW1
24-Pin ATX PWR
8-Pin PW
JPW3
JPW2
8-Pin PW
JIDE2
Fan8
KB/
Mouse
JKM1
USB0/1
JUSB1
COM1
JCOM1
VGA
JVGA1
GLAN1
JLAN1
GLAN2
JLAN8
JPL1
JAR1
JP13
J3P1
UXMB4
Fan9
GLAN
Slot 6 PCI-Ex8 (in x16 slot)
CTRL
VGA
CTRL
S I/O
Battery
JPG1
COM2
UXMB2
JBT1
DIMM A5
DIMM B5
DIMM A6
DIMM
B6
DIMM
B2
DIMM A2
DIMM B1
DIMM A1
DIMM A3
DIMM B3
DIMM A4
DIMM
B4
SMB
J22
JCOM2
BIOS
WOL1
UXMB3
UXMB1
JRB1
JL1
WOR1
USB2/3
I-SATA1
JS1
E8501
(North Bridge)
I-SATA2
JS2
IPMI
ICH5R
(South Bridge)
J27
CPU 2
CPU 4
CPU 3
CPLD
JFSB1
*Notes:
•1. Jumpers not indicated are for testing only.
•2. " " indicates the location of "Pin 1".
•3. Both IDE#1 and IDE#2 support compact fl ash cards. When a compact fl ash
card is installed, be sure to connect a power cable to its PWR header (JWF1
for IDE1, JWF2 for IDE2).
•4. UXMB1-UXMB4: These are extended memory bridge chips that came with the
chipset.
•5. CPLD stands for Complex Programmable Logic Devices.
•6. If one CPU is used, install it in CPU Socket#1; if two CPUs are used, install
them in Sockets #1 & #2. If three, install them in Sockets #1, #2 and #3.
•7. For best memory performance, install DIMM modules in the following slots
• Two EIDE Ultra DMA/100 bus master interfaces supports UDMA Mode5, PIO
Mode4, ATA/100 and up to 4 IDE devices
• One fl oppy port interface (up to 2.88 MB)
• PS/2 mouse and PS/2 keyboard ports
• 2 USB 2.0 (Universal Serial Bus) rear ports
• USB 2.0 internal headers (2 headers)
• Two Intel ICH5R Serial ATA Connectors support RAID 0, 1 and JBOD
• One ATI ES1000 16MB
• Super I/O (National 87427)
• One Fast UART 16550 Serial port and one header
• One VGA port
Other
• Internal/external modem ring-on
• Chassis intrusion detection/header
• Console redirection
• SDDC support
CD/Diskette Utilities
• BIOS fl ash upgrade utility and device drivers
Dimensions
• Proprietary 16" x 14.3" (406.4mm x 363.22 mm)
1-10
Chapter 1: Introduction
1 PCI-X
SLOT
PCI4
1 PCI-X
SLOT
PCI3
1 PCI-X
SLOT
PCI2
1 PCI-X
SLOT
ZCR
PCI1
PCI-X BUS(133 MHZ)
PCI-X BUS(133 MHZ)
PCI-X BUS(133 MHZ)
PCI-X BUS(100 MHZ)
SCSI
AIC7902W
Gbit LAN
Ophir
82571EB
B
PXH
#2
A
PCI-EXPx16
SLOT
PCIEXP2
PCI-EXPx8
SLOT
PCIEXP1
B
PXH
#1
A
IDE
PRI/SEC
SATA
0, 1
USB PORT
0,1,2,3
VRM
VRM
PCI EXP. A(0~3)
PROCESSOR#1
CPU1
ADDR
CTRL
PROCESSOR#2
CPU2
X4PCI EXP. D
PCI EXP. B
PCI EXP. A(4~7) X4
X8
PCI EXP. C X8
UDMA/100
SATA
USB
PROCESSOR#3
ADD/DATA/CNTL
DATA
ADD/DATA/CNTL
E8501
X4
HUB
ICH5R
LPC I/O
CPU3
CTRL
ADDR
PROCESSOR#4
CPU4
IMI A
XMB
IMI B
XMB
IMI C
XMB
IMI D
XMB
PCI BUS(32-BIT)
LPC BUS
BMC CON.
DATA
VRM
VRM
DDRII-400
DDRII-400
DDRII-400
DDRII-400
VGA
FWH
4 DDRII 400
DIMMs
4 DDRII 400
DIMMs
4 DDRII 400
DIMMs
4 DDRII 400
DIMMs
Keyboard
Mouse
Floppy
COM2
H/WCOM1
MONITOR
Figure 1-9. Block Diagram of the E8501 Chipset
Note: This is a general block diagram. Please see the previous Motherboard Features
pages for details on the features of each motherboard.
1-11
X6QT8/X6QTE+ User's Manual
1-2 Chipset Overview
The E8501 Chipset
Built upon the functionality and the capability of the E8501 chipset, the X6QT8/
X6QTE+ motherboard provides the performance and feature set required for 4-Way
servers with confi guration options optimized for communications, storage, computa-
tion or database applications. The Intel E8501 chipset is built around the E8501
chipset North Bridge (NB), and the Intel E8501 chipset external Bridge (XMB).
The E8501 chipset North Bridge (NB) provides the interconnection between 64-bit
Intel Xeon MP/7000 Series/7100 Series Processors, XMB (via four independent
Memory Interfaces), I/O components via PCI-Express Links and ICH5R. It sup-
ports up to four 64-bit Xeon processor MP/7000 Series/7100 Series processors at
a Front Side Bus of 667MHz or 800MHz. It offers ECC protection on data signals,
parity protection on address signals, and supports Return Data by Enhanced Defer
to allow for extraordinary completion.
Independent Memory Interface
Memory support features include the following:
• Four Independent Memory Interface (IMI) ports, each with up to 5.33 GB
bandwidth (read) and 2.67 GB bandwidth (write) simultaneously at 166.7 MHz,
or with up to 6.4 GB bandwidth (read) and 3.2 GB bandwidth (write) simulta-
neously at 200 MHz
• 40-bit addressing support provides one terabyte addressing capability
• Memory technology independent
I/O Interfaces
The E8501 chipset relies on PCI Express to provide the interconnection between
the North Bridge and the I/O subsystem. The I/O subsystem is based on three x4
PCI Express links, two x8 PCI Express links, and one HI1.5 link.
• Three x4 and two x8 (each can be confi gured as two x4,) making a total of
seven x4 links
• Dual PXH Controllers with 2 PCI-X buses per controller. (Each bus supports
up to 133 MHz.) (*Note: for the X6QT8 only.)
HI 1.5
• 8-bit wide, 4x data transfer, 66 MHz base clock with 266 MB/s bandwidth
• Legacy I/O interconnection to the ICH5R
Transaction Processing Capabilities
• 64 transactions processed concurrently
• 128-entry Common Data Cache (CDC) for write combining and write buffering
1-12
Chapter 1: Introduction
1-3 Special Features
Recovery from AC Power Loss
The feature allows the user to set the power state after a power outage. You can
select Power-Off for the system power to remain off after a power loss. Select
Power-On for the system power to be turned on after a power loss. Select Last
State to allow the system to resume its last state before the power loss. The default
setting is Last State.
1-4 PC Health Monitoring
This section describes the PC health monitoring features of the SUPER X6QT8
/X6QTE+. It has an onboard System Hardware Monitor chip that supports PC
health monitoring.
Onboard Voltage Monitors for the CPU Cores, +3.3V, +5V, +12V,
-12V and +3.3V Standby
An onboard voltage monitor will scan these voltages continuously. Once a voltage
becomes unstable, a warning is given or an error message is sent to the screen.
Users can adjust the voltage thresholds (via Supero Doctor III) to defi ne the sen-
sitivity of the voltage monitor.
Fan Status Monitor with Fan Speed Control
The PC health monitor can check the RPM status of the cooling fans. The onboard
CPU and chassis fans are controlled by Thermal Management via BIOS.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. It can continue
to monitor for overheat conditions even when the CPU is in sleep mode. Once it
detects that the CPU temperature is too high, it will automatically turn on the ther-
mal control fan to prevent any overheat damage to the CPU. The onboard chassis
thermal circuitry can monitor the overall system temperature and alert users when
the chassis temperature is too high.
CPU Overheat LED and Control
This feature is available when the user enables the CPU overheat warning function
in the BIOS. This allows the user to defi ne an overheat temperature.
1-13
X6QT8/X6QTE+ User's Manual
Thermal Management/CPU VRM Overheat
When the CPU reaches 700 C and above (Overheat), the CPU will go into throttling
state. CPU Voltage will decrease to reduce CPU power consumption. When the
CPU temperature reaches 780 C (*Default) and above, the Overheat LED and the
Alarm Buzzer will be turned on in addition to the slowing down of the CPU. Once
the CPU temperature returns to normal, the CPU voltage will return to normal as
well, allowing the CPU to run at maximum speed.
VRM Protection
When the CPU VRM temperature reaches the threshold preset by the user in the
BIOS, the system will go into TM (Thermal Management) mode. The CPU will slow
down and the VRM current will drop to prevent the VRM from overheating. (The
settings are: 88
0
C, *980C, 1080C.) (*Default)
Auto-Switching Voltage Regulator for the CPU Core
The auto-switching voltage regulator for the CPU core can support up to 20A current.
This will allow the regulator to run cooler and thus make the system more stable.
1-5 ACPI Features
The ACPI (Advanced Confi guration and Power Interface) specifi cation defi nes a
fl exible and abstract hardware interface that provides a standard way to integrate
power management features throughout a PC system, including its hardware, op-
erating system and application software. This enables the system to automatically
turn on and off peripherals such as CD-ROMs, network cards, hard disk drives and
printers. This also includes consumer devices connected to the PC such as VCRs,
TVs, telephones and stereos.
In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an operating
system-independent interface for confi guration control. ACPI leverages the Plug
and Play BIOS data structures while providing a processor architecture-independent
implementation that is compatible with Windows 2000, Windows XP, and Windows
Server 2003.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will wake-up and the LED will automatically stop blinking and remain on.
1-14
Chapter 1: Introduction
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a system
suspend button to make the system enter a SoftOff state. The monitor will be
suspended, and the hard drive will spin down. Pressing the power button again
will cause the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In case
the system malfunctions and you want to turn off the power, just press and hold the
power button for 4 seconds. This option can be set in the Power Button Instant-Off
feature under the Advanced Chipset Section in the BIOS Setup.
External Modem Ring-On (WOR)
Wake-up events can be triggered by a device such as the external modem ringing
when the system is in the SoftOff state. Note that external modem ring-on can only
be used with an ATX 2.01 (or above) compliant power supply.
Wake-On-LAN (WOL)
Wake-On-LAN is defi ned as the ability of a management application to remotely
power up a computer that is powered off. Remote PC setup, updates and asset-
tracking can occur after hours and on weekends so that daily LAN traffi c is kept
to a minimum and users are not interrupted. The motherboard has a 3-pin header
(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has
WOL capability. In addition, an onboard LAN controller can also support WOL
without any connection to the WOL header. The 3-pin WOL header is to be used
with a LAN add-on card only.
*Note: Wake-On-LAN requires an ATX 2.01 (or above) compliant power supply.
1-6 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.
The X6QT8/X6QTE+ can only accommodate ATX 24-pin and 8-pin power supplies.
Although most power supplies generally meet the specifi cations required by the
CPU, some are inadequate. Your power supply must have one 24-pin and two
12V 8-pin connectors and should supply at least 650W of power; an even higher
wattage power supply is recommended for high-load confi gurations. Also, your
power must supply 1.5A for the Ethernet ports.
*Note: Two additional 12V 8-pin power connectors (JPW2/JPW3) are required for
Intel Xeon MP CPUs. Failure to provide this extra power to the CPU may make it
unstable within a few minutes of operation. See Section 2-6 for details on power
connectors.
1-15
X6QT8/X6QTE+ User's Manual
It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.01 or above. It must also be SSI compliant (-refer to
the web site at http://www.ssiforum.org/ for details). Additionally, in areas where
noisy power transmission is present, you may choose to install a line fi lter to shield
the computer from noise. It is recommended that you also install a power surge
protector to help avoid problems caused by power surges.
1-7 Super I/O
The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera-
tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720
K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s
or 1 Mb/s. It also provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.
The Super I/O supports one PC-compatible printer port (SPP), Bidirectional Printer
Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).
The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-16
Chapter 2: Installation
Chapter 2
Installation
2-1 Static-Sensitive Devices
Electric-Static-Discharge (ESD) can damage electronic com ponents. To
prevent damage to your system board, it is important to handle it very
!
carefully. The following measures are generally suffi cient to protect your
equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in
use.
• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
• Use only the correct type of onboard CMOS battery as specifi ed by the manu-
facturer. Do not install the onboard battery upside down to avoid possible explo-
sion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.
2-1
X6QT8/X6QTE+ User's Manual
2-2 Processor and Heatsink Installation
When handling the processor package, avoid placing direct pressure
on the label area of the fan. Also, do not place the motherboard on a
conductive surface which can damage the BIOS battery and prevent
!
system bootup.
IMPORTANT: Always connect the power cord last and always remove it before add-
ing, removing or changing any hardware components. Make sure that you install
the processor into the CPU socket before you install the CPU heat sink.
*Note: For proper system cooling, please use the heatsink provided by
Supermicro.
CPU Installation
1. Lift the lever on the CPU socket--lift
the lever completely as shown on the
picture on the right; otherwise, you will
damage the CPU socket when power is
applied. (Install CPU1 fi rst.)
2. Insert the CPU in the socket, making
sure that pin 1 of the CPU aligns with pin
1 of the socket (both corners are marked
with a triangle). When using only one
CPU, install it into CPU socket #1 (CPU
sockets will be automatically disabled if
not in use).
3. Press the lever down until you hear a
click, so you can be sure that the CPU is
securely installed in the CPU socket.
(*Note: CPUs shown in the pictures are for display only.
Your CPU may or may not look exactly the same as the
ones shown in the graphics above.)
Socket lever
Pin1
Socket lever in the
locking Position
2-2
Heatsink Installation
IMPORTANT: Due to the weight of the Passive Heatsink (about 1KG), you
need to have Heatsink Mounting plate installed on the chassis to prevent
!
damage to the CPU and the motherboard)
Chapter 2: Installation
1. Do not apply any thermal compound to
the heatsink or the CPU die-the required
amount has already been applied.
2. Place the heatsink on top of the CPU so
that the four mounting holes are aligned with
those on the retention mechanism.
3. Screw in two diagonal screws (ie the #1
and the #2 screws) until just snug (-do not
fully tighten the screws to avoid possible
damage to the CPU.)
4. Finish the installation by fully tightening
all four screws.
Passive Heatsink
Screw#1
Screw#2
(*Note: The CPU heatsink shown in the picture above is for display only. Your heatsink
may or may not look exactly the same as the one shown in the graphic above.)
2-3
X6QT8/X6QTE+ User's Manual
To Un-install the Heatsink
Caution! We do not recommend that you remove the CPU or heatsink.
However, if you do need to un-install the heatsink, please follow the in-
!
structions below to uninstall the heatsink to prevent damage to the CPU
or the CPU socket.
1. Unscrew and remove the heatsink screws
from the motherboard in the sequence as
show
in the picture on the right.
2. Hold the heatsink as shown
ture on the right and gently wriggle the
heatsink to loosen it from the CPU. (Do
not use excessive force when wriggling the
heatsink!)
3. Once the CPU is loosened, remove the
heatsink from the CPU socket.
4. Clean the surface of the CPU and the
heatsink to get rid of the old thermal grease.
Reapply the proper amount of thermal
grease on the surface before you re-install
the CPU and the heatsink.
in the pic-
2-4
Figure 2-1. PGA604 Socket: Empty and with Processor Installed
!
Warning! Make
sure that you lift the
lever completely when
installing the CPU;
otherwise, damage
to the socket or CPU
may occur.
Chapter 2: Installation
Empty socket
Lever
Triangle
(Pin 1)
Processor (installed)
Triangle
(Pin 1)
(*Note: The CPU shown in the picture is for display only. Your CPU may or may not
look exactly the same as the one shown in the picture above.)
Mounting the Motherboard in the Chassis
All motherboards have standard mounting holes to fi t different types of chassis.
Make sure that the locations of all the mounting holes for both the motherboard
and the chassis match. Make sure that the metal standoffs click in or are screwed
in tightly. Then use a screwdriver to secure the motherboard onto the motherboard
tray. Please note that some components are very close to the mounting holes. Take
caution when installing or removing these components to prevent damage to the
components.
2-5
X6QT8/X6QTE+ User's Manual
2-3 Installing DIMMs
CAUTION Exercise extreme care when installing or removing
DIMM modules to prevent any possible damage. Also note that
!
the memory is interleaved to improve performance.
DIMM Installation (See Figure 2-2)
1. Insert the desired number of DIMMs into the memory slots, starting with the fi rst
DIMM of the fi rst bank. Each UXMB chip is independent from each other,
so memory modules can be installed on the fi rst bank of a UXMB Controller.
For best memory performance, 8 memory modules minimal are required (-2
modules for each UXMB chip. See the Memory Table below.)
DIMM Memory
Bank 1 Bank 2
UXMB1A1B1A2B2
UXMB2A3B3A4B4
UXMB3A5B5A6B6
UXMB4A7B7A8B8
2. To optimize memory performance, install DIMM modules in the following slots fi rst:
2-8 Floppy, IPMI, Hard Disk Drive and SCSI Connections
Note the following when connecting the fl oppy and hard disk drive cables:
• The fl oppy disk drive cable has seven twisted wires.
• A red mark on a wire typically designates the location of pin 1.
• A single fl oppy disk drive ribbon cable has two connectors to provide for two
fl oppy disk drives. The connector with twisted wires always connects to drive
A, and the connector that does not have twisted wires always connects to drive
B.
Floppy Connector
The fl oppy connector is located at
JFDD1. See the table below for pin
defi nitions.
Fan7
SPKR
Fan8
KB/
Mouse
USB0/1
COM1
VGA
GLAN1
GLAN2
JAR1
JP13
J3P1
GLAN
CTRL
JPL1
VGA
CTRL
S I/O
Battery
®
SUPER
Fan9
X6QT8
DIMM B8
DIMM A8
DIMM B7
DIMM A7
UXMB4
DIMM A5
DIMM B5
DIMM A6
DIMM B6
DIMM B2
DIMM A2
DIMM B1
DIMM A1
UXMB2
DIMM A3
DIMM B3
DIMM A4
DIMM B4
ot 6 PCI-Ex8(inx16 slot)
Sl
Slot 5 PCI-Ex4(in x8 Slot)
3MHz
ot 4 PCI-X 13
Sl
ot 3 PCI-X 133M
Sl
ot 2 PCI-X 133M
Sl
lot 1 PCI-X 100MHz (*: ZCR/Green S
S
JBT1
JPG1
SMB
COM2
UXMB3
UXMB1
BIOS
Hz
Hz
WOL1
JL1
JRB1
WOR1
lot: X6Q
USB2/3
T8)
I-SATA1
JD1
E8501
(North Bridge)
PXH
PXH
I-SATA2
(South Bridge)
J27
JPA1
DA2
DA1
JPA2
SCSI Channel A
ICH5R
IPMI
SCSI
AIC7902W
CPU 1
CPU 2
CPU 4
CPU 3
CPLD
JFSB1
SCSI Channel B
Floppy Drive Connector
Pin Defi nitions (Floppy)
Pin# Defi nition Pin # Defi nition
1Ground2FDHDIN
3Ground4Reserved
5Key6FDEDIN
7Ground8Index
9Ground10Motor Enable
11Ground12Drive Select B
13Ground14Drive Select B
15Ground16Motor Enable
17Ground18DIR
19Ground20STEP
21Ground22Write Data
23Ground24Write Gate
25Ground26Track 00
27Ground28Write Protect
29Ground30Read Data
31Ground32Side 1 Select
LE1
FP CTRL
33Ground34Diskette
Fan6
Fan5
Fan4
Fan3
Fan2
Fan1
JWF2
A
R
Floppy
IDE #1
24-Pin ATX PW
JTAG
JOH1
8-Pin PW
WD1
IDE #2
PSSMB
8-Pin PW
JPA3
JWF1
A. Floppy
2-29
X6QT8/X6QTE+ User's Manual
IDE Connectors
There are no jumpers to confi gure
the onboard IDE#1 and IDE #2.
Both IDE#1 and IDE#2 support
Compact Flash Cards. When a com-
pact card is used, you will need to
connect a power cable to its power
connector to provide adequate
power to the drive. (JWF1: IDE#1,
JWF2: IDE#2.) See the table on the
right for pin defi nitions.
IDE Drive Connectors
Pin Defi nitions (IDE)
Pin# Defi nition Pin # Defi nition
1Reset IDE2Ground
3Host Data 74Host Data 8
5Host Data 66Host Data 9
7Host Data 58Host Data 10
9Host Data 410Host Data 11
11Host Data 312Host Data 12
13Host Data 214Host Data 13
15Host Data 116Host Data 14
17Host Data 018Host Data 15
19Ground20Key
21DRQ322Ground
23I/O Write24Ground
25I/O Read26Ground
27IOCHRDY28BALE
29DACK330Ground
31IRQ1432IOCS16
33Addr134Ground
35Addr036Addr2
37Chip Select 038Chip Select 1
39Activity40Ground
Fan7
SPKR
Fan8
KB/
Mouse
USB0/1
COM1
VGA
GLAN1
GLAN2
JPL1
JAR1
JP13
J3P1
SUPER
Fan9
GLAN
CTRL
VGA
CTRL
S I/O
Battery
DIMM B8
DIMM A8
DIMM B7
DIMM A7
UXMB4
DIMM A6
DIMM B6
DIMM B2
DIMM A2
DIMM B1
DIMM A1
UXMB2
DIMM A3
DIMM B3
DIMM A4
DIMM B4
ot 6 PCI-Ex8(inx16 slot)
Sl
Ex4(in x8 Slot)
Slot 5 PCI-
ot 4 PCI-X
Sl
ot 3 PCI-X 133MH
Sl
ot 2 PCI-X 133MHz
Sl
Slot 1 PCI-X 100MH
JBT1
JPG1
2
COM
®
X6QT8
DIMM A5
DIMM B5
Hz
133M
SMB
UXMB3
UXMB1
BIOS
z
z (*: ZCR/Green S
WOL1
JL1
JRB1
lot: X6QT8)
USB2/3
WOR1
I-SATA1
JD1
E8501
(North Bridge)
PXH
PXH
I-SATA2
J27
JPA1
DA2
DA1
SCSI Channe
IPMI
ICH5R
(South Bridge)
SCSI
AIC790
JPA2
l A
CPU 1
CPU 2
CPU 4
CPU 3
CPLD
2W
JFSB1
C
SCSI Channe
2-30
l B
JOH1
PSSMB
JWF1
Floppy
WD1
D
JWF2
A
JTAG
JPA3
B
LE1
Fan6
Fan5
Fan4
Fan3
Fan2
Fan1
IDE #1
IDE #2
FP CTRL
A. IDE 1
B. IDE 2
C. JWF1
D. JWF2
24-Pin ATX PWR
8-Pin PW
8-Pin PW
Chapter 2: Installation
Ultra320 SCSI Connectors
(*X6QT8 Only)
Refer to the table below for the pin
definitions of the Ultra320 SCSI
connectors: SCSI Channel A (located
at JA1) and SCSI Channel B (located
at JA2.)
IPMI 2.0 Socket
An IPMI 2.0 Socket is located on the
motherboard. Refer to the layout be-
low for the IPMI Socket location.
A. SCSI Channel A
B. SCSI Channel B
C. IPMI 2.0 Socket
Fan7
SPKR
Fan8
KB/
Mouse
USB0/1
COM1
VGA
GLAN1
GLAN2
JAR1
JP13
J3P1
JPL1
VGA
CTRL
S I/O
SUPER
UXMB4
UXMB2
Fan9
GLAN
Slot 6 PCI-Ex8(inx16
CTRL
ot 5 PCI-Ex4(
Sl
ot 4 PCI-X 133M
Sl
Slot 3 PCI-X 133MHz
ot 2 PCI-X 133MHz
Sl
Slot 1 PCI-X 100MHz (*: ZCR/G
JBT1
Battery
JPG1
2
COM
®
X6QT8
DIMM B8
DIMM A8
DIMM B7
DIMM A7
DIMM A5
DIMM B5
DIMM A6
DIMM B6
DIMM B2
DIMM A2
DIMM B1
DIMM A1
DIMM A3
DIMM B3
DIMM A4
DIMM B4
in x8 Slot)
SMB
UXMB3
UXMB1
slot)
S
BIO
Hz
reen Slot:
OL1
W
OR1
JL1
JRB1
W
USB2/3
JD1
CPU 1
CPU 2
E8501
(North Bridge)
PXH
DA2
DA1
PXH
QT8)
X6
I-SATA1
I-SATA2
SCSI Channel A
ICH5R
(South Bridge)
J27
JPA1
A
JPA2
IPMI
C
SCSI
AIC7902W
CPU 4
CPU 3
CPLD
JFSB1
B
SCSI Channel
JWF1
B
JOH1
PSSMB
Floppy
WD1
Ultra320 SCSI Drive Connector
Pin Defi nitions
Pin# Defi nition Pin # Defi nition
1+DB (12)35-DB (12)
2+DB (13)36-DB (13)
3+DB (14)37-DB (14)
4+DB (15)38-DB (15)
5+DB (P1)39-DB (P1)
6+DB (0)40-DB (0)
7+DB (1)41-DB (1)
8+DB (2)42-DB (2)
9+DB (3)43-DB (3)
10+DB (4)44-DB (4)
11+DB (5)45-DB (5)
12+DB (6)46-DB (6)
13+DB (7)47-DB (7)
14+DB (P)48-DB (P)
15Ground49Ground
16DIFFSENS50Ground
17TERMPWR51TERMPWR
18TERMPWR52TERMPWR
19Reserved53Reserved
20Ground54Ground
21+ATN55-ATN
22Ground56Ground
23+BSY57-BSY
24+ACK58-ACK
25+RST59-RST
26+MSG60-MSG
27+SEL61-SEL
LE1
FP CTRL
28+C/D62-C/D
Fan6
29+REQ63-REQ
Fan5
30+I/O64-I/O
Fan4
31+DB (8)65-DB (8)
Fan3
32+DB (9)66-DB (9)
33+DB (10)67-DB (10)
Fan2
Fan1
34+DB (11)68-DB (11)
JW
F2
IDE #1
24-Pin ATX PWR
JTAG
8-Pin PW
IDE #2
8-Pin PW
JPA3
2-31
X6QT8/X6QTE+ User's Manual
Notes
2-32
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
*Note: Always disconnect the power cord before adding, changing or install-
ing any hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Install one CPU (making sure it is fully seated) at a time, connect the chassis
speaker and the power LED to the motherboard. (Check all jumper settings
as well.)
3. Use only the correct type of CMOS battery as recommended by the Manufacturer.
Do not install the battery upside down to avoid possible explosion.
No Power
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Make sure that all jumpers are set to their default positions.
3. Make sure that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on, but you have no video, remove add-on cards, if possible to
simplify system confi guration.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A and
Appendix B for details on beep codes.
2a. Check if the onboard video is enabled through Jumper JPG1.
2b. Remove all memory modules to make sure that the system gives alarms
for no memory. If the system beeps, memory modules can be bad or incom-
patible. See Section 2-3 for more information on supported memory.
Losing the System’s Setup Confi guration
1. Make sure that you are using a high quality power supply. A poor quality power
supply may cause the system to lose the CMOS setup. Refer to Section 1-6
for details on recommended power supplies.
3-1
X6QT8/X6QTE+ User's Manual
2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.
NOTE
If you are a system integrator, VAR or OEM, a POST diagnostics
card is recommended. For I/O port 80h codes, refer to Appendix B.
Memory Errors
1. Make sure that all DIMM modules are properly and fully installed.
2. Determine if different speeds of DIMMs have been installed and verify that the
BIOS setup is confi gured for the fastest speed of RAM used. It is recom-
mended to use the same RAM speed for all DIMMs in the system.
3. Make sure that you are using the correct type of Registered, ECC DDR2 533/400
SDRAM (*recommended by the manufacturer.)
4. Check for bad DIMM modules or slots by swapping a single module between
two slots and noting the results.
5. Make sure that all memory modules are fully seated in their slots. As an inter-
leaved memory scheme is used, you must install two modules at a time. (See
Section 2-3).
6. Check the position of the 115V/230V switch on the power supply.
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note
that as a motherboard manufacturer, Supermicro does not sell directly to end-us-
ers, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Ques-
tion' (FAQ) sections in this chapter or see the FAQs on our web site (at http://
www.supermicro.com/support/faqs/) before contacting Technical Support.
2. BIOS upgrades can be downloaded from our web site at http://www.supermicro.
com/support/bios/.
Note: Not all BIOS can be fl ashed, it depends on the modifi cations done to
the boot block code.
3-2
Chapter 3: Troubleshooting
3. If you still cannot resolve the problem, include the following information
when contacting Super Micro for technical support:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system fi rst boots up)
•System confi guration
An example of a Technical Support form is on our web site at http://www.
supermicro.com/support/contact.cfm/.
4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at support@supermicro.com, by phone at:(408) 503-8000, option 2,
or by fax at (408)503-8019.
3-3 Frequently Asked Questions
Question: What are the various types of memory that my motherboard can
support?
Answer: The X6QT8/X6QTE+ has 16 240-pin DIMM slots that support registered
ECC DDR2 533/400 SDRAM modules. It is strongly recommended that you do not
mix memory modules of different speeds and sizes.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not
experiencing any problem with your system. Updated BIOS fi les are located in
our web site at http://www.supermicro.com/support/bios/. Please check our BIOS
warning message and the information on how to update your BIOS on our web
site. Also, check the current BIOS revision and make sure it is newer than your
BIOS before downloading.
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs that will
greatly enhance your system. We recommend that you review the CD and install the
applications you need. Applications on the CD include chipset drivers for Windows
and security and audio drivers.
3-3
X6QT8/X6QTE+ User's Manual
3-4 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required be-
fore any warranty service will be rendered. You can obtain service by calling your
vendor for a Returned Merchandise Authorization (RMA) number. When returning
to the manufacturer, the RMA number should be prominently displayed on the
outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service
is complete.
This warranty only covers normal consumer use and does not cover any damage
incurred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor fi rst for any product problems.
3-4
Chapter 4: AMI BIOS
Chapter 4
AMIBIOS
4-1 Introduction
This chapter describes the AMIBIOS Setup Utility for the X6QT8/X6QTE+. The AMI
ROM BIOS is stored in a Flash EEPROM and can be easily updated using a fl oppy
disk-based program. This chapter describes the basic navigation of the AMIBIOS
Setup Utility setup screens.
Starting BIOS Setup Utility
To enter the AMIBIOS Setup Utility screens, hit the <Delete> key while the system
is booting up.
(*Note: In most cases, the <Delete> key is used to invoke the AMIBIOS setup
screen. There are a few cases when other keys are used, such as <F1>, <F2>,
etc.)
Each main BIOS menu option is described in this user’s guide. The Main BIOS
setup menu screen has two main frames. The left frame displays all the options
that can be confi gured. “Grayed-out” options cannot be confi gured. Options in blue
can be confi gured by the user. The right frame displays the key legend. Above the
key legend is an area reserved for a text message. When an option is selected in
the left frame, it is highlighted in white. Often a text message will accompany it.
(*Note: the AMI BIOS has default text messages built in. Supermicro retains the
option to include, omit, or change any of these text messages.)
The AMIBIOS Setup Utility uses a key-based navigation system called hot keys.
Most of the AMIBIOS setup utility hot keys can be used at any time during the setup
navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, arrow keys,
and etc. (*Note: Options printed in Bold are default settings.)
How To Change the Confi guration Data
The confi guration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Del> at the appropriate time during system boot.
Starting the Setup Utility
Normally, the only visible POST (Power On Self Test) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup Utility. From the main menu, you can access the other setup
screens. An AMIBIOS identifi cation string is displayed at the left bottom corner of
the screen, below the copyright message.
Warning!!Do not shut down or reset the system while updating BIOS
to prevent possible boot failure.
4-1
X6QT8/X6QTE+User’s Manual
4-2 Main Setup
When you fi rst enter the AMI BIOS Setup Utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
When you select the Main Setup, the following items will be automatically
displayed:
System Overview: The following BIOS information will be displayed:
AMIBIOS
Version
Build Date
ID
Processors
When you select this option, the AMI BIOS will automatically display the status
of processors as shown below:
Type
Speed
Count
System Memory
This option allows the AMI BIOS to display the status of memory installed in the
system.
System Time/System Date
Use this option to change the system time and date. Highlight System Time or
System Date using the arrow keys. Enter new values through the keyboard. Press
the <Tab> key or the arrow keys to move between fi elds. The date must be entered
in DAY/MM/DD/YY format. The time is entered in HH:MM:SS format.
time is in 24-hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30P.
M. as 17:30:00.)
(*Note: The
4-2
Chapter 4: AMI BIOS
4-3 Advanced Settings
The Advanced Settings screen and sub menus are listed below:
Warning
When you fi rst enter the Advanced Setup screen, the Setup Warning will be
displayed. Please follow the instruction and set the correct value for each
item to prevent the system from malfunctioning.
CPU Confi guration Sub-Menu
Confi gure Advanced CPU Settings
This option allows the user to confi gure the Advanced CPU settings for the
processor(s) installed in the system.
Ratio CMOS Setting (*Available when SpeedStep is disabled.)
This option allows the user to set the ratio between the CPU Core Clock and the
FSB frequency. The default setting is 16.
L3 Cache (*Available when supported by the OS and the CPU.)
Select Enabled to enable L3 (Level 3) Cache in the CPU. The options are Enabled
and Disabled.
Hardware Prefetcher (*Available when supported by the OS and the CPU.)
If set to "Enabled," the hardware prefetcher will pre-fectch streams of data and
instructions from main memory to L2 cache in the forward or backward manner to
improve CPU performance. The options are Disabled and Enabled.
4-3
X6QT8/X6QTE+User’s Manual
Adjacent Cache Line Prefetch (*Available when supported by the OS and
the CPU.)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
Max CPUID Value Limit
This feature allows the user to set the maximum CPU ID value. Enable this function
to boot the legacy operating systems that cannot support processors with extended
CPUID functions. The options are Enabled and Disabled.
Vanderpool Technology (*Available when supported by the CPU.)
Set to Enabled to utilize enhanced virtualization capabilities provided by the Intel
Vanderpool Technology to allow one platform to run multiple operating systems
and applications in independent partitions, creating multiple "virtual" systems in
one physical computer. The options are Enabled and Disabled. (*Note: If there is
any change to this setting, you will need to power off and restart the system for the
change to take effect.) Refer to Intel’s web site for detailed information.
Execute Disable Bit (*Available when supported by the OS and the CPU.)
Set to Enabled to enable the Execute Disable Bit to allow the processor to classify
areas in the system memory where an application code can execute and where
it cannot, thus preventing a worm or a virus from creating a fl ood of codes to
overwhelm the processor or damage the system during an attack. (Note: For more
information regarding hardware/software support for this function, please refer to
Intel's and Microsoft's web sites.
Single Logical Processor Mode (*Available when supported by the CPU.)
Select Enabled to allow the processor to operate in the single core mode, allowing
Logical Processor 0 CORE 0 to remain active. The options are Enabled and
Disabled.
Hyper-Threading Technology
This setting allows you to Enable or Disable the function of Hyper-Threading.
Enabling Hyper-Threading results in increased CPU performance.
Intel (R) SpeedStep (tm) Technology (*Available when supported by the
CPU.)
The Enhanced Intel SpeedStep Technology allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption
and heat dissipation. Select Maximum to set the CPU speed to the maximum.
Select Minimum to set the CPU speed to the minimum. Select Auto to allow the
CPU speed to be controlled by the OS. Select Disabled to disable this feature.
(Refer to Intel’s web site for detailed information.)
Intel (R) C-State Technology
4-4
Chapter 4: AMI BIOS
C1 Confi guration Mode (*Available when supported by the CPU.)
Select Standard to enable the C1 Halt State to partially turn off the CPU internal
clocks to conserve energy and prevent system overheating when the OS is idle.
Select Enhanced to enable the Enhanced C1 Halt State to lower the CPU clock
frequency and the supply voltage before turning off the clocks.
IDE Confi guration Sub-Menu
When this sub-menu is selected, the AMI BIOS automatically displays the follow-
ing items:
IDE Confi guration
This feature allows the user to confi gure the IDE mode. The options are
Disabled, P-ATA (Parallel ATA) only, S-ATA (Serial ATA) only and P-ATA & S-
ATA.
Combined Mode Operation
This feature allows the user to select the IDE Combined Mode. The options
are P-ATA 1st Channel and S-ATA 1st Channel.
S-ATA Ports Defi nition
This feature allows the user to confi gure the Serial ATA Ports. The options are
P0-Master/P1-Slave and P0-Slave/P1-Master
.
Primary IDE Channel Master/Slave, Secondary IDE Channel Master/
Slave
These settings allow the user to set the parameters of Primary IDE Channel
Master/Slave and Secondary IDE Channel Master/Slave slots. Hit <Enter> to
activate the following sub-menu screen for detailed options of these items. Set
the correct confi gurations accordingly. The items included in the sub-menu are:
Type
Select the type of device connected to the system. The options are Not Installed,
Auto, CDROM and ARMD.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing data on a disk drive.
In the LBA mode, the maximum drive capacity is 137 GB. For drive capacities
over 137 GB, your system must be equipped with a 48-bit LBA mode addressing.
If not, contact your manufacturer or install an ATA/133 IDE controller card that
supports 48-bit LBA mode. The options are Disabled and Auto.
Block (Multi-Sector Transfer)
Block Mode boosts the IDE drive performance by increasing the amount of data
transferred. Only 512 bytes of data can be transferred per interrupt if Block Mode
is not used. Block Mode allows transfers of up to 64 KB per interrupt. Select
"Disabled" to allow the data to be transferred from and to the device one sec-
tor at a time. Select "Auto" to allows the data transfer from and to the device
occur multiple sectors at a time if the device supports it. The options are Auto
and Disabled.
4-5
X6QT8/X6QTE+User’s Manual
PIO Mode
The IDE PIO (Programmable I/O) Mode programs timing cycles between the
IDE drive and the programmable IDE controller. As the PIO mode increases, the
cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4. Select Auto to
allow the AMI BIOS to automatically detect the PIO mode. Use this value if the
IDE disk drive support cannot be determined. Select 0 to allow the AMI BIOS
to use PIO mode 0. It has a data transfer rate of 3.3 MBs. Select 1 to allow the
AMI BIOS to use PIO mode 1. It has a data transfer rate of 5.2 MBs. Select 2 to
allow the AMI BIOS to use PIO mode 2. It has a data transfer rate of 8.3 MBs.
Select 3 to allow the AMI BIOS to use PIO mode 3. It has a data transfer rate
of 11.1 MBs. Select 4 to allow the AMI BIOS to use PIO mode 4. It has a data
transfer rate of 16.6 MBs. This setting generally works with all hard disk drives
manufactured after 1999. For other disk drives, such as IDE CD-ROM drives,
check the specifi cations of the drive.
DMA Mode
Select Auto to allow the BIOS to auto detect the DMA mode. Use this value if
the IDE disk drive support cannot be determined. Select SWDMA0
BIOS to use Single Word DMA mode 0. It has a data transfer rate of 2.1 MBs.
Select SWDMA1 to allow the BIOS to use Single Word DMA mode 1. It has a
data transfer rate of 4.2 MBs. Select SWDMA2 to allow the BIOS to use Single
Word DMA mode 2. It has a data transfer rate of 8.3 MBs. Select MWDMA0 to
allow the BIOS to use Multi Word DMA mode 0. It has a data transfer rate of
4.2 MBs. Select MWDMA1 to allow the BIOS to use Multi Word DMA mode 1. It
has a data transfer rate of 13.3 MBs. Select MWDMA2 to allow the BIOS to use
Multi-Word DMA mode 2. It has a data transfer rate of 16.6 MBs. Select UDMA0
to allow the BIOS to use Ultra DMA mode 0. It has a data transfer rate of 16.6
MBs. It has the same transfer rate as PIO mode 4 and Multi Word DMA mode
2. Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data
transfer rate of 25 MBs. Select UDMA2 to allow the BIOS to use Ultra DMA mode
2. It has a data transfer rate of 33.3 MBs. Select UDMA3 to allow the BIOS to
use Ultra DMA mode 3. It has a data transfer rate of 66.6 MBs. Select UDMA4
to allow the BIOS to use Ultra DMA mode 4 . It has a data transfer rate of 100
MBs. The options are Auto, SWDMAn, MWDMAn, and UDMAn.
to allow the
S.M.A.R.T. For Hard disk drives
Self-Monitoring Analysis and Reporting Technology (SMART) can help predict
impending drive failures. Select "Auto" to allow the AMI BIOS to auto detect
hard disk drive support. Select "Disabled" to prevent the AMI BIOS from using
the S.M.A.R.T. Select "Enabled" to allow the AMI BIOS to use the S.M.A.R.T. to
support hard drive disk. The options are Disabled, Enabled, and Auto.
4-6
Chapter 4: AMI BIOS
32-Bit Data Transfer
Select Enabled to activate the function of 32-Bit data transfer. Select
"Disabled" to disable this function. The options are Enabled and Disabled.
Hard Disk Write Protect
Select Enabled to enable the function of Hard Disk Write Protect to prevent data
from being written to HDD. The options are Enabled or Disabled.
IDE Detect Time Out
This feature allows the user to set the time-out value for detecting ATA, ATA PI
devices installed in the system. The options are 0 (sec), 5, Mode 1.0, 15, 20, 25,
30, and 35.
ATA(PI) 80Pin Cable Detection
This feature allows the AMI BIOS to auto-detect 80Pin ATA(PI) Cable. The options
are Host & Device, Host and Device.
Floppy Confi guration
This option allows the user to confi gure the settings for the Floppy Drives installed
in the system.
Floppy A/Floppy B
Move the cursor to these fi elds via up and down arrow keys to select the fl oppy
type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".
PCI/PnP Confi guration
This feature allows the user to set the PCI/PnP confi gurations for the following
items:
Clear NVRAM
Select Yes to clear NVRAM during system boot. The options are Yes and No.
Pl
ug & Play OS
Select Yes to allow the OS to confi gure Plug & Play devices. (*This is not required
for system boot if you system has an OS that supports Plug & Play.) Select No to
allow the AMI BIOS to confi gure all devices in the system.
PCI Latency Timer
This option sets the latency of all PCI devices on the PCI bus. The default setting
is "64." Select "32" to set the PCI latency to 32 PCI clock cycles. Select "64" to
set the PCI latency to 64 PCI clock cycles. Select "96" to set the PCI latency to
96 PCI clock cycles. Select "128" to set the PCI latency to 128 PCI clock cycles.
Select "160" to set the PCI latency to 160 PCI clock cycles. Select "192" to set the
PCI latency to 192 PCI clock cycles. Select "224" to set the PCI latency to 224 PCI
clock cycles. Select "248" to set the PCI latency to 248 PCI clock cycles.
4-7
X6QT8/X6QTE+User’s Manual
Allocate IRQ to PCI VGA
Set this value to allow or restrict the system from giving the VGA adapter card an
interrupt address. The options are Yes and No.
Palette Snooping
Select Enabled to inform the PCI devices that an ISA graphics device is installed
in the system in order for the graphics card to function properly. The options are
Enabled and Disabled.
PCI IDE BusMaster
Set this value to allow or prevent the use of PCI IDE busmastering. Select "Enabled"
to allow the BIOS to use the PCI busmaster for reading and writing to IDE drives.
The options are Disabled and Enabled.
Offboard PCI/ISA IDE Card
This option allows the user to assign a PCI slot number to an off-board PCI/ISA
IDE card in order for it to function properly. The options are Auto, PCI Slot1, PCI
Slot2, PCI Slot3, PCI Slot4, PCI Slot5, and PCI Slot6.
IRQ3/IRQ4/IRQ5/IRQ7/IRQ9/IRQ10/IRQ11/IRQ14/IRQ15
This feature specifi es the availability of an IRQ to be used by a PCI, PnP device.
Select Reserved for an IRQ to be used by a Legacy ISA device. The options are
Select Available to indicate that a specifi c DMA channel is available to be used by
a PCI/PnP device. Select Reserved if a DMA channel specifi ed is reserved for a
Legacy ISA device.
Reserved Memory Size
This feature specifi es the size of memory block to be reserved for Legacy ISA
devices. The options are Disabled, 16K, 32K, 64K.
Super IO Confi guration Submenu
Onboard Floppy Controller
Set to enabled to enable the onboard fl oppy controller. The options are Enabled
and Disabled.
Serial Port1 Address/Serial Port2 Address
This option specifi es the base I/O port addresses and the Interrupt Request ad-
dresses of Serial Port 1 and Serial Port 2. Select "Disabled" to prevent the serial
port from accessing any system resources. When this option is set to Disabled, the
serial port physically becomes unavailable. Select "3F8/IRQ4" to allow the serial
port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. The
options for Serial Port 1 are Disabled, 3F8/IRQ4, 3E8/IRQ4, 2E8/IRQ3. The options
for Serial Port 2 are Disabled, 2F8/IRQ3, 3E8/IRQ4 and 2E8/IRQ3.
4-8
Chapter 4: AMI BIOS
Advanced Chipset Settings
This item allows the user to confi gure the Advanced Chipset settings for the sys-
tem.
NorthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel E7520 NorthBridge
chipset.
Memory Remap Feature
Select Enabled to allow remapping of the overlapped PCI memory above the total
physical memory. The options are Enabled and Disabled.
Max. Payload of Slot#5/Slot#6
This feature allows the user to set the maximum payload size that PCI-Exp. Slot#5/
Slot#6 can support for Transaction Layer Packets (TLPs). The options are 128B
and 256B.
SouthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel ICH South Bridge
chipset.
Power Button Instant-Off
If set to Enabled, the system will power off immediately as soon as the user hits the
power button. If set to Disabled, the system will power off when the user presses the
power button for 4 seconds or longer. The options are Enabled and Disabled.
Intel PCI-X Hub Confi guration
Slot#1/Slot#2/Slot#3/Slot#4 Bus Frequency
This option allows the user to set the maximum PCI speed to be used in the PCI
slot specifi ed. Select "Auto" to allow the BIOS automatically detect the capability of
the device installed on the bus. The options for Slot 1 are Auto, 33 MHz PCI, 66
MHz PCI, 66 MHz PCI-X, and 100 MHz PCI-X. The options for Slot 2 to Slot 4 are
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase, and vice versa.
Select “Workstation” if your system is used as a workstation. Select “Server” if your
system is used as a server. Select “Disable” to disable the fan speed control func-
tion to allow the onboard fans to constantly run at full speed (12V). The options
are Disable, 3-pin (Server), and 3-pin (Workstation).
Fan1-Fan9 Speeds
Voltage
Voltage Monitoring
CPU1-CPU4 Vcore
+3.3V,
+5V,
+12Vcc,
-12Vcc,
+3.3V Standby
4-11
X6QT8/X6QTE+User’s Manual
MPS Confi guration
This section allows the user to confi gure the multiprocessors table.
MPS Revision
This feature allows the user to select the MPS Revision. Please follow the instruc-
tions given on the screen to select the MPS Revision Number. The options are
1.1 and 1.4.
PCI Express Confi guration
This section allows the user to confi gure the PCI Express slots.
Active State Power Management
Select Enabled to activate the function of power management for signal transac-
tions between the PCI Express L0 and L1 Links. The options are Enabled and
Disabled.
4-12
Chapter 4: AMI BIOS
SMBIOS Confi guration
SMBIOS SMI Support
Select Enabled to enable the function of SMBIOS SMI Wrapper support for PnP
Func 50h-54h. The options are Enabled and Disabled.
Remote Access Confi guration
You can use this screen to select options for the Remote Access Confi guration.
Use the up and down arrow keys to select an item. Use the <+> and <-> keys to
change the value of the selected option.
Remote Access
This feature allows the user to enable the function of Remote Access. The options
are Enabled and Disabled.
If the item "Remote Access" is set to Enabled, you can select a Remote Access
type and confi gure the following settings:
Serial Port Number
This feature allows the user to select the serial port for Console Redirection.
The options are COM1 and COM2.
Base Address
This feature allows the user to set Base Address for the Serial Port Selected.
The default setting is 2F8h, 8.
Serial Port Mode
This feature allows the user to set the serial port mode for Console Redirection.
The options are 115200 8, N, 1, 57600 8, N, 1, 38400 8, N, 1, 19200 8, N, 1
and 9600 8, N, 1.
Flow Control
This feature allows the user to set the fl ow control for Console Redirection. The
options are None, Hardware, and Software.
Redirection After BIOS POST
This feature allows the user to select Disabled to turn off Console Redirection after
POST. Select Always to keep Console Redirection active all the time. (*Note: this
setting may not be supported by some operating systems.) Select Boot Loader
to keep Console Redirection active during POST and Boot Loader.
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X6QT8/X6QTE+User’s Manual
Terminal Type
This feature allows the user to select the target terminal type for Console
Redirection.The options are ANSI, VT100, and VT-UTF8.
VT-UTF8 Comb Key Support
This feature allows the user to select Enabled to enable the VT-UTF8 Combination
Key support for the ANSI/VT100 Terminals. The options are Enabled and
Disabled.
Sredir Memory Display Delay
This feature allows the user to decide how many seconds the BIOS shall wait
before memory information is displayed. The options are: No Delay, Delay 1
Sec., Delay 2 Sec. and Delay 4 Sec.
USB Confi guration
This feature allows the user to confi gure the USB settings.
USB Function
This feature allows you to enable the USB Ports. The options are Disabled, 2
USB Ports, 4 USB Ports, and Enabled.
Legacy USB Support
Select Enabled to enable USB Legacy support. Disable legacy support if there
are no USB devices installed in the system. The options are Disabled, Enabled,
and Auto.
USB 2.0 Controller
This setting allows you to enable or disable the USB 2.0 Controller. The options
are Disabled and Enabled.
USB 2.0 Controller Mode
This setting allows you to confi gure the USB 2.0 Controller Mode. The options are
Hi-Speed (480 Mbps) and Full Speed-(12Mbps).
Stop EHCI HC in OHCI Handover
Select Enabled to halt an ECHI Host Controller during OHCI OS handover calls
when the EHCI Host Controller is not supported by the Operating System.
Hot Plug USB FDD Support
Set to Enabled to create a dummy FDD device to be used as a hot-plug FDD.
Set to Auto for a hot-plug FDD device to be automatically created if a USB FDD
is not detected. The options are Auto, Enabled and Disabled.
4-14
Chapter 4: AMI BIOS
BIOS Settings Confi guration
Quick Boot
If Enabled, this option will skip certain tests during POST to reduce the time needed
for system bootup. The options are Enabled and Disabled.
Quiet Boot
This option allows the boot up screen options to be modifi ed between POST mes-
sages or the OEM logo. Select Disabled to allow the computer system to display
the POST messages. Select Enabled to allow the computer system to display the
OEM logo.
Add-On ROM Display Mode
This option allows the BIOS to display add-on ROM (read-only memory) messages.
Select Force BIOS to display a third party BIOS during system boot. Select "Keep
Current" to display the current BIOS information during system boot.
Boot up Num-Lock
This option allows the Number Lock setting to be modifi ed during boot up. The
default setting is On. The options are On and Off.
PS/2 Mouse Support
This option allows the PS/2 mouse support to be modifi ed. The options are Auto,
Enabled and Disabled.
System Keyboard
This option allows the user to enable or disable all keyboards connected to the
system. The options are Present and Absent.
Wait for ‘F1’ If Error
Select Enable to activate the function of Wait for F1 if Error. The options are En-
abled and Disabled.
Hit ‘DEL’ Message Display
Select Enabled to display the Setup Message when the user hits the DEL key. The
options are Enabled and Disabled.
Onboard SCSI RAID
Select Enable to enable the Onboard SCSI RAID devices. The options are Enabled
and Disabled.
Interrupt 19 Capture
Select Enabled to allow ROMs to trap Interrupt 19. The options are Enabled and
Disabled.
4-15
X6QT8/X6QTE+User’s Manual
Watch Dog Timer
If enabled, this option will automatically reset the system if the system is not active
for more than 5 minutes. The options are Enabled and Disabled.
Resume On Modem Ring
Select On to “wake your system up” when an incoming call is received by your
modem. The options are On and Off.
Restore on AC Power Loss
The feature allows the user to set the power state after a power outage. Select
Power-Off for the system power to remain off after a power loss. Select Power-On
for the system power to be turned on after a power loss. Select Last State to allow
the system to resume its last state before the power loss. The options are Power-
On, Power-Off and Last State.
4-4 Boot Settings
This feature allows the user to confi gure the following items:
4-16
Chapter 4: AMI BIOS
Boot Device Priority
This feature allows the user to specify the sequence of priority for the Boot De-
vice.
The settings are 1st Floppy Drive, CD ROM, ATAPI CDROM and Disabled. The
default settings are:
· 1st boot device – 1st Floppy Drive
· 2nd boot device – CD/DVD: PS-UJDA770
· 3rd boot device – SCSI: 00, AIC-7902B
· 4th boot device – Network: IBA GE Slot
· 5th boot device – Network: IBA GE Slot
· 6th boot device – Network: IBA GE Slot
Hard Disk Drives
This feature allows the user to specify the boot sequence from available Hard
Drives.
1st Drive
· 1ST boot device – SCSI: 00, AIC-7902B
Removable Drives
This feature allows the user to specify the boot sequence from available Remov-
able Drives.
1st Drive
This option allow the user to specify the boot sequence for 1st Removable
Drive.
The options are 1st Floppy Drive and Disabled.
CD/DVD Drives
This feature allows the user to specify the boot sequence from available CD/DVD-
Drives.
1st Drive
This option allows the user to specify the boot sequence for the 1st CD/DVD
Drive. The options are CD/DVD: PS-UJDA770, CD/DVD and Disabled.
4-17
X6QT8/X6QTE+User’s Manual
4-5 Security Settings
The AMI BIOS provides a Supervisor and a User password. If you use both pass-
words, the Supervisor password must be set fi rst.
Change Supervisor Password
Select this option and press <Enter> to access the sub-menu, and then type in
the password.
Change User Password
Select this option and press <Enter> to access the sub-menu, and then type in
the password.
Clear User Password
This option allows the user to clear a password that has been previously entered
into the system.
Password Check
Set to Setup to allow the system to perform a password check when the
BIOS Setup is invoked. Set to Always to allow the system to perform a
password check when the BIOS Setup is invoked or when the system
boots up.
Boot Sector Virus Protection
This option is near the bottom of the Security Setup screen. Select "Disabled" to
deactivate the Boot Sector Virus Protection. Select "Enabled" to enable boot sector
protection. When Enabled, the AMIBOIS displays a warning when any program (or
virus) issues a Disk Format command or attempts to write to the boot sector of the
hard disk drive. The options are Enabled and Disabled.
4-18
Chapter 4: AMI BIOS
4-6 Exit Options
Select the Exit tab from the AMIBIOS Setup Utility screen to enter the Exit BIOS
Setup screen.
Saving Changes and Exit
When you have completed the system confi guration changes, select this option to
leave the BIOS Setup and reboot the computer, so the new system confi guration
parameters can take effect. Select Save Changes and Exit from the Exit menu and
press <Enter>.
Discarding Changes and Exit
Select this option to quit the BIOS Setup without making any permanent changes
to the system confi guration and reboot the computer. Select Discard Changes and
Exit from the Exit menu and press <Enter>.
Discarding Changes
Select this option and press <Enter> to discard all the changes and return to the
AMIBIOS Utility Program.
Load Optimal Defaults
To set this feature, select Load Optimal Defaults from the Exit menu and press
<Enter>. Then, Select "OK" to allow the AMI BIOS to automatically load Optimal
Defaults to the BIOS Settings. The Optimal settings are designed for maximum
system performance, but may not work best for all computer applications.
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X6QT8/X6QTE+User’s Manual
Load Fail-Safe Defaults
To set this feature, select Load Fail-Safe Defaults from the Exit menu and press
<Enter>. The Fail-Safe settings are designed for maximum system stability, but not
for maximum performance.
4-20
Appendix A: AMIBIOS Error Beep Codes
Appendix A
BIOS Error Beep Codes
During the POST (Power-On Self-Test) routines, which are performed each time
the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue
the boot-up process. The error messages normally appear on the screen.
Fatal errors are those which will not allow the system to continue the boot-up
procedure. If a fatal error occurs, you should consult with your system manufac-
turer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps.
The numbers on the fatal error list, on the following page, correspond to the num-
ber of beeps for the corresponding error.
Beep Code Error Message Description
1 beep Refresh Circuits have been reset.
(Ready to power up.)
5 short, 1 long Memory error No memory detected in
system
8 beeps Display memory read/write error Video adapter missing or
with faulty memory
A-1
X6QT8/X6QTE+ User’s Manual
Notes
A-2
Appendix B: BIOS POST Checkpoint Codes
Appendix B
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O
port 0080h. If the computer cannot complete the boot process, diagnostic equipment
can be attached to the computer to read I/O port 0080h.
B-1 Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
Checkpoint Code Description
D0hThe NMI is disabled. Power on delay is starting. Next, the initialization code check-
D1hInitializing the DMA controller, performing the keyboard controller BAT test, starting
D3hStarting memory sizing next.
D4hReturning to real mode. Executing any OEM patches and setting the Stack next.
D5hPassing control to the uncompressed code in shadow RAM at E000:0000h. The
sum will be verifi ed.
memory refresh and entering 4 GB fl at mode next.
initialization code is copied to segment 0 and control will be transferred to segment
0.
B-1
X6QT8/X6QTE+ User's Manual
B-2 Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint Code Description
E0hThe onboard fl oppy controller if available is initialized. Next, beginning the base
E1hInitializing the interrupt vector table next.
E2hInitializing the DMA and Interrupt controllers next.
E6hEnabling the fl oppy drive controller and Timer IRQs. Enabling internal cache mem-
EdhInitializing the fl oppy drive.
EehLooking for a fl oppy diskette in drive A:. Reading the fi rst sector of the diskette.
EfhA read error occurred while reading the fl oppy drive in drive A:.
F0hNext, searching for the AMIBOOT.ROM fi le in the root directory.
F1hThe AMIBOOT.ROM fi le is not in the root directory.
F2hNext, reading and analyzing the fl oppy diskette FAT to fi nd the clusters occupied
F3hNext, reading the AMIBOOT.ROM fi le, cluster by cluster.
F4hThe AMIBOOT.ROM fi le is not the correct size.
F5hNext, disabling internal cache memory.
FBhNext, detecting the type of fl ash ROM.
FChNext, erasing the fl ash ROM.
512 KB memory test.
ory.
by the AMIBOOT.ROM fi le.
FDhNext, programming the fl ash ROM.
FFhFlash ROM programming was successful. Next, restarting the system BIOS.
B-2
Appendix B: BIOS POST Checkpoint Codes
B-3 Uncompressed Initialization Codes
The following runtime checkpoint codes are listed in order of execution.
These codes are uncompressed in F0000h shadow RAM.
Checkpoint Code Description
03hThe NMI is disabled. Next, checking for a soft reset or a power on condition.
05hThe BIOS stack has been built. Next, disabling cache memory.
06hUncompressing the POST code next.
07hNext, initializing the CPU and the CPU data area.
08hThe CMOS checksum calculation is done next.
0AhThe CMOS checksum calculation is done. Initializing the CMOS status register for
0BhThe CMOS status register is initialized. Next, performing any required initialization
0ChThe keyboard controller input buffer is free. Next, issuing the BAT command to the
0EhThe keyboard controller BAT command result has been verifi ed. Next, performing
0FhThe initialization after the keyboard controller BAT command test is done. The key-
10hThe keyboard controller command byte is written. Next, issuing the Pin 23 and 24
11hNext, checking if <End or <Ins> keys were pressed during power on. Initializing
12hNext, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2.
13hThe video display has been disabled. Port B has been initialized. Next, initializing
14hThe 8254 timer test will begin next.
19hNext, programming the fl ash ROM.
1AhThe memory refresh line is toggling. Checking the 15 second on/off time next.
date and time next.
before the keyboard BAT command is issued.
keyboard controller.
any necessary initialization after the keyboard controller BAT command test.
board command byte is written next.
blocking and unblocking command.
CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was
set in AMIBCP or the <End> key was pressed.
the chipset.
2BhPassing control to the video ROM to perform any required confi guration before the
2ChAll necessary processing before passing control to the video ROM is done. Look-
2DhThe video ROM has returned control to BIOS POST. Performing any required pro-
23hReading the 8042 input port and disabling the MEGAKEY Green PC feature next.
24hThe confi guration required before interrupt vector initialization has completed. In-
video ROM test.
ing for the video ROM next and passing control to it.
cessing after the video ROM had control
Making the BIOS code segment writable and performing any necessary confi guration before initializing the interrupt vectors.
terrupt vector initialization is about to begin.
B-3
Checkpoint Code Description
X6QT8/X6QTE+ User's Manual
25hInterrupt vector initialization is done. Clearing the password if the POST DIAG
27hAny initialization before setting video mode will be done next.
28hInitialization before setting the video mode is complete. Confi guring the mono-
2AhBus initialization system, static, output devices will be done next, if present. See the
2EhCompleted post-video ROM test processing. If the EGA/VGA controller is not
2FhThe EGA/VGA controller was not found. The display memory read/write test is
30hThe display memory read/write test passed. Look for retrace checking next.
31hThe display memory read/write test or retrace checking failed. Performing the alter-
32hThe alternate display memory read/write test passed. Looking for alternate display
34hVideo display checking is over. Setting the display mode next.
37hThe display mode is set. Displaying the power on message next.
38hInitializing the bus input, IPL, general devices next, if present. See the last page of
39hDisplaying bus initialization error messages. See the last page of this chapter for
switch is on.
chrome mode and color mode settings next.
last page for additional information.
found, performing the display memory read/write test next.
about to begin.
nate display memory read/write test next.
retrace checking next.
this chapter for additional information.
additional information.
3AhThe new cursor position has been read and saved. Displaying the Hit <DEL> mes-
3BhThe Hit <DEL> message is displayed. The protected mode memory test is about
40hPreparing the descriptor tables next.
42hThe descriptor tables are prepared. Entering protected mode for the memory test
43hEntered protected mode. Enabling interrupts for diagnostics mode next.
44hInterrupts enabled if the diagnostics switch is on. Initializing data to check memory
45hData initialized. Checking for memory wraparound at 0:0 and fi nding the total sys-
46hThe memory wraparound test is done. Memory size calculation has been done.
47hThe memory pattern has been written to extended memory. Writing patterns to the
48hPatterns written in base memory. Determining the amount of memory below 1 MB
49hThe amount of memory below 1 MB has been found and verifi ed.
4BhThe amount of memory above 1 MB has been found and verifi ed. Checking for a
sage next.
to start.
next.
wraparound at 0:0 next.
tem memory size next.
Writing patterns to test memory next.
base 640 KB memory next.
next.
soft reset and clearing the memory below 1 MB for the soft reset next. If this is a
power on situation, going to checkpoint 4Eh next.
B-4
Checkpoint Code Description
Appendix B: BIOS POST Checkpoint Codes
4ChThe memory below 1 MB has been cleared via a soft reset. Clearing the memory
4DhThe memory above 1 MB has been cleared via a soft reset. Saving the memory size
4EhThe memory test started, but not as the result of a soft reset. Displaying the fi rst
4FhThe memory size display has started. The display is updated during the memory
50hThe memory below 1 MB has been tested and initialized. Adjusting the displayed
51hThe memory size display was adjusted for relocation and shadowing.
52hThe memory above 1 MB has been tested and initialized. Saving the memory size
53hThe memory size information and the CPU registers are saved. Entering real mode
54hShutdown was successful. The CPU is in real mode. Disabling the Gate A20 line,
57hThe A20 address line, parity, and the NMI are disabled. Adjusting the memory size
58hThe memory size was adjusted for relocation and shadowing. Clearing the Hit
59hThe Hit <DEL> message is cleared. The <WAIT...> message is displayed. Starting
above 1 MB next.
next. Going to checkpoint 52h next.
64 KB memory size next.
test. Performing the sequential and random memory test next.
memory size for relocation and shadowing next.
information next.
next.
parity, and the NMI next.
depending on relocation and shadowing next.
<DEL> message next.
the DMA and interrupt controller test next.
60hThe DMA page register test passed. Performing the DMA Controller 1 base register
62hThe DMA controller 1 base register test passed. Performing the DMA controller 2
65hThe DMA controller 2 base register test passed. Programming DMA controllers 1
66hCompleted programming DMA controllers 1 and 2. Initializing the 8259 interrupt
80hThe keyboard test has started. Clearing the output buffer and checking for stuck
81hA keyboard reset error or stuck key was found. Issuing the keyboard controller
82hThe keyboard controller interface test completed. Writing the command byte and
83hThe command byte was written and global data initialization has completed. Check-
84hLocked key checking is over. Checking for a memory size mismatch with CMOS
85hThe memory size check is done. Displaying a soft error and checking for a password
test next.
base register test next.
and 2 next.
controller next.
keys. Issuing the keyboard reset command next.
interface test command next.
initializing the circular buffer next.
ing for a locked key next.
RAM data next.
or bypassing WINBIOS Setup next.
B-5
Checkpoint Code Description
X6QT8/X6QTE+ User's Manual
86hThe password was checked. Performing any required programming before WIN-
87hThe programming before WINBIOS Setup has completed. Uncompressing the
88hReturned from WINBIOS Setup and cleared the screen. Performing any necessary
89hThe programming after WINBIOS Setup has completed. Displaying the power on
8ChProgramming the WINBIOS Setup options next.
8DhThe WINBIOS Setup options are programmed. Resetting the hard disk controller
8FhThe hard disk controller has been reset. Confi guring the fl oppy drive controller
91hThe fl oppy drive controller has been confi gured. Confi guring the hard disk drive
95hInitializing the bus option ROMs from C800 next. See the last page of this chapter
96hInitializing before passing control to the adaptor ROM at C800.
97hInitialization before the C800 adaptor ROM gains control has completed. The adap-
98hThe adaptor ROM had control and has now returned control to BIOS POST. Perform-
BIOS Setup next.
WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility
next.
programming after WINBIOS Setup next.
screen message next.
next.
next.
controller next.
for additional information.
tor ROM check is next.
ing any required processing after the option ROM returned control.
99hAny initialization required after the option ROM test has completed. Confi guring the
9AhSet the timer and printer base addresses. Setting the RS-232 base address next.
9BhReturned after setting the RS-232 base address. Performing any required initializa-
9ChRequired initialization before the Coprocessor test is over. Initializing the Coproces-
9DhCoprocessor initialized. Performing any required initialization after the Coproces-
9EhInitialization after the Coprocessor test is complete. Checking the extended keyboard,
A2hDisplaying any soft errors next.
A3hThe soft error display has completed. Setting the keyboard typematic rate next.
A4hThe keyboard typematic rate is set. Programming the memory wait states next.
A5hMemory wait state programming is over. Clearing the screen and enabling parity
A7hNMI and parity enabled. Performing any initialization required before passing control
A8hInitialization before passing control to the adaptor ROM at E000h completed. Passing
timer data area and printer base address next.
tion before the Coprocessor test next.
sor next.
sor test next.
keyboard ID, and Num Lock key next. Issuing the keyboard ID command next.
and the NMI next.
to the adaptor ROM at E000 next.
control to the adaptor ROM at E000h next.
B-6
Checkpoint Code Description
Appendix B: BIOS POST Checkpoint Codes
A9hReturned from adaptor ROM at E000h control. Performing any initialization required
AahInitialization after E000 option ROM control has completed. Displaying the system
AbhUncompressing the DMI data and executing DMI POST initialization next.
B0hThe system confi guration is displayed.
B1hCopying any code to specifi c areas.
00hCode copying to specifi c areas is done. Passing control to INT 19h boot loader
after the E000 option ROM had control next.
confi guration next.
next.
B-7
X6QT8/X6QTE+ User's Manual
Notes
B-8
Appendix C: Software Installation
Appendix C
Software Installation
After all the hardware has been installed, you must fi rst confi gure the Adaptec
Embedded Serial ATA RAID Driver before you install the Windows operating system.
The necessary drivers are all included on the Supermicro bootable CDs that came
packaged with your motherboard.
C-1 Introduction to the Adaptec Embedded Serial ATA RAID
Controller Driver
Serial ATA (SATA)
Serial ATA(SATA) is a physical storage interface. It uses a single cable with a
minimum of four wires to create a point-to-point connection between devices. It
is a serial link which supports SATA Transfer rates from 150MBps. Because the
serial cables used in SATA are thinner than the traditional cables used in Paral-
lel ATA(PATA), SATA systems have better airfl ow and can be installed in smaller
chassis than Parallel ATA. In addition, the cables used in PATA can only extend
to 40cm long, while Serial ATA cables can extend up to one meter. Overall, Serial
ATA provides better functionality than Parallel ATA.
Introduction to the Intel ICH5R I/O Controller Hub
Located in the South Bridge of the Intel E8501 Chipset, the ICH5R I/O Controller
Hub provides the I/O subsystem with access to the rest of the system. It sup-
ports 2-channel Ultra ATA/100 Bus Master IDE controller (PATA) and tw o Serial
ATA (SATA) Host Controllers, which support up to two Serial ATA ports and up to
two RAID drives. The ICH5R I/O Controller Hub supports the following Parallel ATA
(PATA) and Serial (SATA) device confi gurations:
ATA Operate Mode
You can select from the following two modes: Combined Mode and Enhanced
Mode.
Combined Mode:
In this mode, system BIOS assigns the traditional IRQ 14 and IRQ 15 for the use
of HDD. Up to 4 ATA devices are supported by this mode.
Within the Combined Mode, the following three modes are supported:
C-1
X6QT8/X6QTE+ User's Manual
*Non-Combined Mode: Parallel ATA only: with the maximum of 4 devices sup-
ported;
*Non-Combined Mode: Serial ATA only: with the maximum of 2 devices sup-
ported;
*Combined Mode: SATA devices and PATA: wi t h the support of 2 devices each
(total: 4 devices maximum). (For IDE/SATA confi gurations, please refer to the table
below.)
To confi gure SATA RAID for Operating Systems that support RAID
functions(--Windows, Red Hat & SuSe, Linux)
1. Select "Advanced Setting" from the AMI BIOS menu.
2. Select the IDE Confi guration menu.
3. Change the IDE Confi guration to "P-ATA Only."
4. Under the item-"Confi gure S-ATA as RAID", select "Yes".
5. Tap the <Esc> key and scroll down to "Exit". Select "Save and Exit" from the
"Exit" menu. Press the <Enter> key to save the changes and exit the BIOS.
6. Once you've exited the BIOS Utility, the system will re-boot.
7. During the system startup, press the <Ctrl> and the <A> keys simultaneously to
run the Adaptec RAID Confi guration Utility when prompted by the following mes-
sage:
Press <Ctrl><A> for Adaptec RAID Confi guration Utility.
The Adaptec Embedded Serial ATA with HostRAID Controller
Driver
Adaptec's Embedded Serial ATA RAID with HostRAID controller adds RAID func-
tionality to the Serial ATA I/O controller by supporting RAID 0 (Striping) or RAID
1 (Mirroring) to enhance the industry's pioneer PCI-to-e host controller products.
RAID striping (RAID 0) can greatly improve hard disk I/O performance because of its
capability in striping data across multiple drives. RAID mirroring (RAID 1) allows the
data to be simultaneously written to two drives, so critical data is always available
even if a single hard disk fails. Due to the built-in functionality, the X6QT8/X6QTE+
is specially designed to keep pace with the increasing performance demands of
computer systems by improving disk I/O throughput and providing data accessibility
regardless of a single disk failure. By incorporating the Adaptec Embedded Serial
ATA into the motherboard design, Supermicro's X6QT8/X6QTE+ offers the user
with the benefi ts of SATARAID without the high costs associated with hardware
RAID applications.
(*Note: For Adaptec's RAID Driver Installation Instructions, please refer to the
Adaptec RAID Controller User's Guide: "Emb_SA_RAID_UG.pdf" in the CD that
came with this motherboard. You can also download a copy of Adaptec's User's
Guide from our web site at www.supermicro.com.)
C-2
Appendix C: Software Installation
Using the Adaptec RAID Confi guration Utility (ARC)
The Adaptec RAID Confi guration Utility is an embedded BIOS Utility, including:
*Array Confi guration Utility: Use this utility when you want to create, confi gure and
manage arrays.
* Disk Utilities: Use this option to format or verify disks.
To run the Adaptec RAID Confi guration Utility, you will need to enable the RAID
function in the system BIOS (refer to Chapter 4 for System BIOS Confi gurations),
and then, press the <Ctrl> and <A> keys simultaneously when prompted to do so
during the system startup. (Refer to the previous page for detailed instructions.)
(*Note: To select an option, use the arrow keys to highlight the item and then press
the <Enter> key to select it. To return to the previous menu, press the <ESC>
key.)
A. Using the Array Confi guration Utility (ACU)
The Array Confi guration Utility (ACU) enables you to create, manage, and delete
arrays from the controller’s BIOS, add and delete spare drives, and initialize drives.
During the system startup, press <Ctrl> and <A> simultaneously, and the main
menu will appear.
C-3
X6QT8/X6QTE+ User's Manual
Managing Arrays
Select this option to view array properties, and delete arrays. The following sec-
tions describe the operations Of "Managing Arrays".
To select this option,
ing Arrays" from the main menu (as shown above).
use the arrow keys and the <enter> key to select "Manag-
C-4
Appendix C: Software Installation
Viewing Array Properties
To view the properties of an existing array:
1. At the BIOS prompt, press Ctrl+A.
2. From the ARC menu, select Array Confi guration Utility (ACU).
3. From the ACU menu, select Manage Arrays (as shown on the previous
screen.)
4. From the List of Arrays dialog box, select the array you want to view and press
Enter.
The Array Properties dialog box appears, showing detailed
information on the array. The physical disks associated with the array are displayed
here.
5. Press Esc to return to the previous menu.
Deleting Arrays
*Warning: Back up the data on an array before you delete it to prevent the loss of
data. Deleted arrays cannot be restored.
To delete an existing array:
1. Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
2. From the ARC main menu, select Array Confi guration Utility.
3. From the ACU menu, select Manage Arrays.
4. Select the array you wish to delete and press Delete.
5. In the Array Properties dialog box, select Delete and press Enter. The following
prompt is displayed:
*Warning!! Deleting the array will render array unusable. Do you want to delete
the array?(Yes/No):
RAID 1 only—the following prompt is also displayed:
Deleting the partition will result in data loss! Do you also want to delete the partition? (Yes/No):
6. Press Yes to delete the array or partition or No to return to the previous menu.
7. Press Esc to return to the previous menu.
C-5
X6QT8/X6QTE+ User's Manual
Creating Arrays
Before creating arrays, make sure the disks for the array are connected and installed
in your system. Note that disks with no usable space, or disks that are un-initialized
are shown in gray and cannot be used. See
To create an array:
1 Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
2 From the ARC menu, select Array Confi guration Utility Main Menu (ACU) (as
shown on the fi rst screen on page C-5).
3 From the ACU menu, select Create Array.
4 Select the disks for the new array and press Insert (as the screen shown be-
low).
(*Note: To deselect any disk, highlight the disk and press Delete.)
Initializing Disk Drives.
C-6
Appendix C: Software Installation
5 Press Enter when both disks for the new array are selected. The Array Properties
menu displays (as the screen shown below).
Assigning Array Properties
Once you've create a new array, you are ready to assign the properties to the
array.
*Caution: Once the array is created and its properties are assigned, you cannot
change the array properties using the ACU. You will need to use the Adaptec Stor-
age Manager - Browser Edition. (Refer to Adaptec's User's Guide in the enclosed
CD.)
To assign properties to the new array:
1. In the Array Properties menu (as shown in the screen below), select an array
type and press Enter.
Note that only the available array types: RAID 0, and RAID1 are displayed on the
screen. (*RAID 0 or RAID 1 requires two drives.)
C-7
X6QT8/X6QTE+ User's Manual
2. Under the item "Arrays Label", type in an label and press Enter. (*Note: The
label shall not be more than 15 characters.)
3. For RAID 0, select the desired stripe size. (*Note: Available stripe sizes are
16, 32, and 64 KB-default. It is recommended that you do not change the default
setting.)
4. The item: "Create RAID via" allows you to select between the different creating
methods for RAID 0 and RAID 1.
The following table gives examples of when each is appropriate.
Raid Level Create ViaWhen Appropriate
RAID 0No InitCreating a RAID 0 on new drives
RAID 0Migrate
(*Note)
RAID 1Build1Any time you wish to create a RAID 1, but especially if
RAID 1ClearCreating a RAID 1 on new drives, or when you want to
RAID 1Quick
RAID 1Init
Creating a RAID 0 from one new drive and
one drive with data you wish to preserve
you have data on one drive that you wish to preserve
ensure that the array contains no data after creation.
Fastest way to create a RAID 1.
Appropriate when using new drives
(*Note: If you select Migrate for RAID 0, or Build for RAID 1, you will be asked to
select the source drive. The contents of the source drive will be preserved. However,
the data on the new drive will be lost.)
C-8
Appendix C: Software Installation
5. When you are fi nished, press Done (as the screen shown below).
Notes:
1. Before adding a new drive to an array, back up any data contained on the new
drive. Otherwise, all data will be lost.
2. If you stop the Build or Clear process on a RAID 1 from ACU, you can restart
it by pressing Ctrl+R.
3. A RAID 1 created using the Quick Init option may return some data mis-com-
pares if you later run a consistency check. This is normal and is not a cause for
concern.
4. The ACU allows you to use drives of different sizes in a
RAID . However, during a build operation, only the smaller drive can be selected
as the source or fi rst drive.
5. When migrating from single volume to RAID 0, migrating from a larger drive to
a smaller drive is allowed. However, the destination drive must be at least half the
capacity of the source drive.
6. Adaptec does not recommend that you migrate or build an array on Windows
dynamic disks (volumes), as it will result in data loss.
Warning: Do not interrupt the creation of a RAID 0 using the Migrate option. If you
do, you will not be able to restart, or to recover the data that was on the source
drive.
C-9
X6QT8/X6QTE+ User's Manual
Adding a Bootable Array
To make an array bootable:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the array you want to make bootable, and press
Ctrl+B.
3. Enter Y to create a bootable array when the following message is displayed: "This
will make all other existing bootable array non-bootable. Do you want to make this
array bootable? (Yes/No):" Then, a bootable array will be created. An asterisk will
appear next to the bootable array (as shown in the picture below:)
Deleting a Bootable Array
To delete a bootable array:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the bootable array (*) you want to delete, and
press Ctrl+B. (* a bootable array is the array marked with an asterisk (as shown
in the picture above.)
3. Enter Y to delete a bootable array when the following message is displayed:
"The array is already marked bootable. Do you want to make this array as not
bootable? (Yes/No):" Then, the bootable array will be deleted and the asterisk will
disappear.
(*Note: do not use the delete key to delete the bootable array.)
C-10
Appendix C: Software Installation
Initializing Disk Drives
If an installed disk does not appear in the disk selection list for creating a new ar-
ray, or if it appears grayed out, you may have to initialize it before you can use it
as part of an array. Drives attached to the controller must be initialized before they
can be used in an array.
Caution: Initializing a disk overwrites the partition table on the disk and makes any
data on the disk inaccessible. If the drive is used in an array, you may not be able
to use the array again.
Do not initialize a disk that is part of a boot array. To determine which disks are
associated with a particular array, please refer to
To initialize drives:
1. Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
Viewing Array Properties.
2. From the ARC menu, select Array Confi guration Utility (ACU) (as shown in
the screen below).
3. Select Initialize Drives (as shown in the screen below).
C-11
X6QT8/X6QTE+ User's Manual
4. Use the up and down arrow keys to highlight the disk you wish to initialize and
press Insert (as shown in the screen below).
C-12
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