Supermicro X11DPU-XLL, X11DPU-X User Manual

X11DPU-X

X11DPU-XLL

USER’S MANUAL

Revision 1.0a

The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0a

Release Date: January 25, 2018

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2018 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians and knowledgeable end users.
It provides information for the installation and use of the X11DPU-X/-XLL motherboard.

About This Motherboard

The X11DPU-X/-XLL motherboard supports dual Intel® Xeon 81xx/61xx/51xx/41xx/31xx series
processors (socket P) with a TDP (Thermal Design Power) of up to 205W and an Ultra Path
Interconnect (UPI) of up to 10.4 GT/s (Note 3 below). With the Intel C621 PCH built-in, this
motherboard supports up to 2TB DDR4 memory (Note 1, Note 2 below) fourteen SATA 3.0

connections, ve USB 3.0 ports, and one SAS 3.0 Ultra add-on module. The X11DPU-X/-

XLL is optimized for CPU encoding, decoding and rendering, and is ideal for use in High
Frequency Trading servers, software license working servers, and remote workstations.
Please note that this motherboard is intended to be installed and serviced by professional
technicians only. For processor/memory updates, please refer to our website at http://www.
supermicro.com/products/.

Note 1: Memory support for X11DPU-X motherboard: 3DS LRDIMM/
LRDIMM/3DSRDIMM/RDIMM/NV-DIMM.

Note 2: Memory support for X11DPU-XLL motherboard: LRDIMM/RDIMM (Note:
3DSLRDIMM/3DSRDIMM/NVDIMM supported with OEM request).

Note 3: UPI/memory speeds are dependent on the processors installed in your system.

Manual Organization

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel C621 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C lists standardized warning statements in various languages.

Appendix D provides UEFI BIOS Recovery instructions.

3

Super X11DPU-X/-XLL User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

Quick Reference Table ......................................................................................................13

Motherboard Features .......................................................................................................15

1.2 Processor and Chipset Overview .......................................................................................19

1.3 Special Features ................................................................................................................19

Recovery from AC Power Loss .........................................................................................19

1.4 System Health Monitoring ..................................................................................................20

Onboard Voltage Monitors ................................................................................................20

Fan Status Monitor with Firmware Control .......................................................................20

Environmental Temperature Control .................................................................................20

System Resource Alert......................................................................................................20

1.5 ACPI Features ....................................................................................................................21

1.6 Power Supply .....................................................................................................................21

1.7 Super I/O ............................................................................................................................21

1.8 Advanced Power Management ..........................................................................................22

Intel® Intelligent Power Node Manager (IPNM).................................................................22

Management Engine (ME) ................................................................................................22

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................23

Precautions .......................................................................................................................23

Unpacking .........................................................................................................................23

2.2 Motherboard Installation .....................................................................................................24

Tools Needed ....................................................................................................................24

Location of Mounting Holes ..............................................................................................24

Installing the Motherboard.................................................................................................25

2.3 Processor and Heatsink Installation ...................................................................................26

The Intel 81xx/61xx/51xx/41xx/31xx Series Processors ...........................................................26

Overview of the Processor Socket Assembly ...................................................................27

Overview of the Processor Heatsink Module (PHM) ........................................................28

Attaching the Processor to the Narrow Processor Clip to Create the Processor Package

Assembly ...........................................................................................................................29

Attaching the Processor Package Assembly to the Heatsink to Form the Processor

5

Super X11DPU-X/-XLL User's Manual

Heatsink Module (PHM) ....................................................................................................30

Preparing the CPU Socket for Installation ........................................................................31

Removing the Dust Cover from the CPU Socket .............................................................31

Installing the Processor Heatsink Module (PHM) ............................................................32

Removing the Processor Heatsink Module (PHM) from the Motherboard .......................33

2.4 Memory Support and Installation .......................................................................................34

Memory Support ................................................................................................................34

DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx series Processors ...35

DIMM Installation ..............................................................................................................36

DIMM Removal .................................................................................................................36

2.5 Rear I/O Ports ....................................................................................................................37

2.6 Front Control Panel ............................................................................................................41

2.7 Connectors .........................................................................................................................46

Power Connectors .............................................................................................................46

Headers .............................................................................................................................48

2.8 Jumper Settings .................................................................................................................55

How Jumpers Work ...........................................................................................................55

2.9 LED Indicators ....................................................................................................................59

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................62

Before Power On ..............................................................................................................62

No Power ..........................................................................................................................62

No Video ...........................................................................................................................63

System Boot Failure .......................................................................................................63

Memory Errors ..................................................................................................................63

Losing the System's Setup Conguration .........................................................................64

When the System Becomes Unstable ..............................................................................64

3.2 Technical Support Procedures ...........................................................................................65

3.3 Frequently Asked Questions ..............................................................................................66

3.4 Returning Merchandise for Service ....................................................................................66

3.5 Battery Removal and Installation .......................................................................................67

6

Preface

Battery Removal ................................................................................................................67

To remove the onboard battery, follow the steps below: ..................................................67

Proper Battery Disposal ....................................................................................................67

Battery Installation .............................................................................................................67

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................68

Starting the Setup Utility ...................................................................................................68

4.2 Main Setup .........................................................................................................................69

4.3 Advanced Setup Congurations .........................................................................................71

4.4 Event Logs .......................................................................................................................107

4.5 IPMI ..................................................................................................................................109

4.6 Security Settings ..............................................................................................................112

4.7 Boot Settings .................................................................................................................... 115

4.8 Save & Exit .......................................................................................................................117

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................120

B.2 SuperDoctor® 5 .................................................................................................................121

Appendix C Standardized Warning Statements

Battery Handling ..............................................................................................................122

Product Disposal .............................................................................................................124

Appendix D UEFI BIOS Recovery

7

8

Chapter 1: Introduction

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

In addition to the motherboard, several important parts that are included with your shipment
are listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist

This motherboard was designed to be used in an SMCI-proprietary chassis only as a part of
an integrated, complete system solution. It is not to be sold as an independent, stand-alone
product; therefore, no shipping package will be included in the shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.

9

Super X11DPU-X/-XLL User's Manual

Figure 1-1. X11DPU-X/-XLL Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision avail-

able at the time of publication of the manual. The components in the motherboard you
received may or may not look exactly the same as the graphics shown in this manual.

10

Figure 1-2. X11DPU-X/-XLL Motherboard Layout

IPMI CODE

BIOS

LICENSE

BAR CODE

DESIGNED IN USA

REV:1.01A

X11DPU-X

CPU2

CPU1

PCH

SXB1A

PCH_PORT1

SXB1_2

SXB1C

CPU1_PORT3

CPU2_PORT3

CPU2_PORT1A

SXB2

CPU2_DMI

SXB1

PSU1PSU2

SXB3BSXB3A

SXB3

CPU2_PORT2 CPU1_PORT1

CPU1_PORT2A

VPP_CPU1

SXB3C

JUIDB2

IPMI_LAN

COM1VGA

USB0/1(3.0)

LED1

UM5

BIOS

JIPMB1

IPMI

LEDM1

JPG1

JLAN1

BMC

JPME2

JBR1

JPME1

JRK1

RAID KEY-1

JSDCARD1

JBT1

JP2

S-SATA5

SP1

JWD1

JVRM1

BT1

U45

I-SATA0~3

I-SATA4~7

S-SATA0~3

S-SATA4

JSD1

JSD2

USB2(3.0)

JUSBA1

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

T-SGPIO3

FAN3

FAN2

FAN1

FAN4

FAN5FAN6FAN7

FAN8

P1-DIMMF1

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMB1

P1-DIMMC1

JL1

P2_NVMe1

P2_NVMe2

NVME12

NVME13

P2-DIMMM1

P2-DIMML1

P2-DIMMK1

P2-DIMMK2

P2-DIMMG2

P2-DIMMG1

P2-DIMMH1

P2-DIMMJ1

VPP_CPU2

JNVI2C2

JF1

LE2

P1_NVMe1

JNVI2C1

P1_NVMe2

NVME 10

NVME11

GPU PWR3

JGPW3

GPU PWR1

JGPW1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR2

(not drawn to scale)

Chapter 1: Introduction

Note: Components not documented are for internal testing only.

11

Super X11DPU-X/-XLL User's Manual

IPMI CODE

BIOS

LICENSE

BAR CODE

DESIGNED IN USA

REV:1.01A

X11DPU-X

CPU2

CPU1

PCH

SXB1A

PCH_PORT1

SXB1_2

SXB1C

CPU1_PORT3

CPU2_PORT3

CPU2_PORT1A

SXB2

CPU2_DMI

SXB1

PSU1PSU2

SXB3BSXB3A

SXB3

CPU2_PORT2 CPU1_PORT1

CPU1_PORT2A

VPP_CPU1

SXB3C

JUIDB2

IPMI_LAN

COM1VGA

USB0/1(3.0)

LED1

UM5

BIOS

JIPMB1

IPMI

LEDM1

JPG1

JLAN1

BMC

JPME2

JBR1

JPME1

JRK1

RAID KEY-1

JSDCARD1

JBT1

JP2

S-SATA5

SP1

JWD1

JVRM1

BT1

U45

I-SATA0~3

I-SATA4~7

S-SATA0~3

S-SATA4

JSD1

JSD2

USB2(3.0)

JUSBA1

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

T-SGPIO3

FAN3

FAN2

FAN1

FAN4

FAN5FAN6FAN7

FAN8

P1-DIMMF1

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMB1

P1-DIMMC1

JL1

P2_NVMe1

P2_NVMe2

NVME12

NVME13

P2-DIMMM1

P2-DIMML1

P2-DIMMK1

P2-DIMMK2

P2-DIMMG2

P2-DIMMG1

P2-DIMMH1

P2-DIMMJ1

VPP_CPU2

JNVI2C2

JF1

LE2

P1_NVMe1

JNVI2C1

P1_NVMe2

NVME 10

NVME11

GPU PWR3

JGPW3

GPU PWR1

JGPW1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR2

Quick Reference

JLAN1

LED1

VGA

JUIDB2

COM1

JIPMB1

LEDM1

SXB1A

SXB2

JPG1

UM5 BMC

BIOS

JPME1

JBT1

SXB1B

PCH

BT1

SXB1C

I-SATA4~7

I-SATA0~3

USB3/4(3.0)

JSD1

JTPM1

TPM/PORT80

GPUPWR1

JGPW1

VPP_CPU2

JNVI2C2

JF1

LE2

GPUPWR3

JGPW3

JL1

NVME12

P2_NVMe1

P2_NVMe2

NVME13

FAN8

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec-

tions.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for testing only.

P2-DIMMM1

P2-DIMML1

P2-DIMMK1

P2-DIMMK2

FAN6

FAN7

CPU

FAN5

P2-DIMMG2

IPMI_LAN

S-SATA0~3

JVRM1

P2-DIMMG1

P2-DIMMJ1

P2-DIMMH1

P1-DIMMF1

USB0/1(3.0)

JSDCARD1

JBR1

JPME2

JP2

RAID KEY-1
JRK1

SP1

JWD1

JSD2

JUSBA1 USB2(3.0)

P1-DIMME1

P1-DIMMD2

P1-DIMMD1

FAN4

FAN3

SXB3C

CPU

SXB3A

S-SATA4
S-SATA5
SXB3B

P1_NVMe1
NVME 10

P1-DIMMA2

P1-DIMMA1

PSU2

FAN2

JNVI2C1
VPP_CPU1

P1-DIMMC1

P1-DIMMB1

FAN1

PSU1

P1_NVMe2
NVME 11

BP PWR2
JPW4

BP PWR1
JPW3

BP PWR4
JPW4

BP PWR3
JPW3

GPU PWR4
JGPW4

T-SGPIO3

GPU PWR2
JGPW2

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

12

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JPME2 Manufacturing Mode Pins 1-2 (Normal)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)

LED Description Status

LE2 Standby PWR LED Green: Standby Power On

LED1 UID LED Solid Blue: Unit Identied

LEDM1 BMC Heartbeat LED Blinking Green: Normal

Connector Description

BT1 Onboard CMOS Battery

COM1 COM Port

FAN1 ~ FAN8 System/CPU Fan Headers (FAN1: CPU Fan)

IPMI_LAN JLAN1 IPMI-Dedicated LAN Port

I-SATA0 ~ I-SATA7 SATA 3.0 ports supported by Intel PCH

JF1 Front Control Panel Header

JGPW1 - JGPW4 (GPU PWR1 - GPU PWR4) Power connectors used for GPU and VGA devices

JIPMB1 System Management Bus Header for IPMI 2.0

JL1 Chassis Intrusion Header

JNVI2C1, JNVI2C2 VPP_CPU1, VPP-CPU2 - System Management Bus

JP2 Complex Programmable Logic Device (CPLD) header

JPW1 - JPW4 (BP PWR1 - BP PWR4) Backplane power connectors for hard drives

JRK1 Intel RAID key header for NVMe Solid State Devices (SSD)

JSDCARD1 SD Card Socket

JSD1 - JSD2 SATA Disk-on-module (DOM) Power Connectors

JTPM1 TPM/PORT80 Trusted Platform Module/Port 80 Connector

JUIDB2 Unit Identier (UID) Switch

JUSB3 USB3/4(3.0) Internal USB header for two USB 3.0 connections (USB Port 3/Port 4)

JUSBA1 USB2(3.0) Type A USB 3.0 header (Port 2)

JVRM1 VRM programming header (reserved for internal use only)

NVME10, NVME11 P1_NVMe1, P1_NVMe2; On-Board NVMe 1 and 2 for high speed PCI-E storage devices on CPU1

NVME12, NVME13 P2_NVMe1, P2_NVMe2; On-Board NVMe 1 and 2 for high speed PCI-E storage devices on CPU2

PSU1 Power Supply Unit 1

PSU2 Power Supply Unit 2

SATA 4,5 (Powered) SATA connectors with power-pins built-in with support of SuperDOM

SP1 Internal Speaker/Buzzer

S-SATA0-3 (SATA DOM) SATA 3.0 ports supported by Intel SCU

13

Super X11DPU-X/-XLL User's Manual

Connector Description

SXB1 WIO Left Riser Slot

SXB2 WIO Right Riser Slot

SXB3 Ultra Riser Slot

T-SGPIO3 Serial General Purpose Input/Output Header for SATA/SAS connections

USB0/1 (3.0) Back panel Universal Serial Bus (USB) 3.0 Port

VGA VGA Port

14

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Dual 81xx/61xx/51xx/41xx/31xx series processors (Socket P); each processor supports Socket P and Intel® UltraPath

Interconnect (UPI) of up to 10.4 G/s

Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on page 18 to determine which slots or devices may be a󰀨ected.

Memory

• For X11DPU-X, the integrated memory controller supports up to 2TB of 3DS LRDIMM (3DS Load Reduced DIMM), LRDIMM

(Load Reduced DIMM), 3DSRDIMM (3DS Registered DIMM), RDIMM (Registered DIMM), NV-DIMM (Non-Volatile DIMM)

DDR4 (288-pin) ECC 2666/2400/2133 MHz memory modules in 16 slots.

• For X11DPU-XLL, the integrated memory controller supports up to 2TB of LRDIMM (Load Reduced DIMM), RDIMM

(Registered DIMM), ECC 2666/2400/2133 MHz memory modules in 16 slots. NV-DIMM (Non-Volatile DIMM) DDR4 (288-

pin), 3DSLRDIMM and 3DSRDIMM are supported when requested by OEM only.

DIMM Size

• Up to 128GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel® C621

Expansion Slots

• 1 PCI-E 3.0 (x16 + x16) WIO left riser card support

• 1 PCI-E 3.0 x8 (in x16) WIO center right hand riser

• 1 PCI-E 3.0 (x16 + x16 + x8) far right Ultra IO Riser Slot

• 4NVMe (x4) PCIe slots)

Network

• BMC RJ45 ports and LAN options via Ultra Riser

BaseBoard Management Controller (BMC)

• ASpeed AST 2500 Baseboard Controller (BMC) supports IPMI 2.0

• One (1) IPMI_dedicated_LAN located on the rear IO backpanel

Graphics

• Graphics controller via ASpeed AST2500

Note: The table above is continued on the next page.

15

Super X11DPU-X/-XLL User's Manual

Motherboard Features

I/O Devices

• Serial (COM) Port • One (1) serial-port header

• Total of 14 SATA 3 ports:

• SATA 3.0

• SAS 3.0 • SAS3 expansion AOM via Ultra Riser

Peripheral Devices

• Two (2) USB 3.0 ports on the rear I/O panel (USB 0/1)

• One (1) type-A USB 3.0 connector for front access (USB 2)

• One (1) internal USB 3.0 header with two (2) USB connections on the motherboard for front access (USB 3/4)

BIOS

• 64 MB SPI AMI BIOS

®

SM Flash UEFI BIOS

• ACPI 3.0 or later, PCI F/W 3.0, SMBIOS 2.7 or later

• Eight (8) SATA 3.0 ports supported by Intel PCH C621 (I-SATA 0-7)

• One (1) SATA 3.0 vertical connector with 4 connections (S-SATA 0-3)

• Two (2) SATA 3.0 SuperDOM connectors (S-SATA4, S-SATA5)

Power Management

• ACPI power management (S1, S4, S5)

• Power-on mode for AC power recovery

• Wake-On-LAN

System Health Monitoring

• Onboard voltage monitoring for +3.3V, +5V, +12V, CPU Core, PCH 1.05V, +3.3V standby, VBAT, Memory, PCH Temp,

System Temp, Memory Temp

• 6 CPU (# of switching-phase voltage regulator)

• CPU/system overheat LED and control

• CPU Thermal Trip support

• PECI / TSI

• CPU Thermal Design Power (TDP) support of up to 205W

Fan Control

• Eight 4-pin fan headers

• Fan speed control

System Management

• Trusted Platform Module (TPM) support

• Watch Dog / Non-makable interrupt

• RoHS

• BMC SD Card Slot

• Chassis intrusion header and detection (JL1)

16

Motherboard Features

LED Indicators

• CPU/Overheating

• Power/Suspend-state indicator

• Fan Failure

• UID/Remote UID

• HDD Activity

• LAN Activity

Dimensions

• 16.80" (L) x 17.00" (W) (426.72 mm x 431.80 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and

heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Chapter 1: Introduction

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC log-in information upon initial
system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf

17

Super X11DPU-X/-XLL User's Manual

System Block Diagram

Figure 1-3.

DDR4

VGA

32MB BMC

SPI FLASH

64MB BIO S

SPI FLASH

TPM

x8

x4

Port B Port B

Upper Lower

10.4G/s

Polarity Inversion

Header

x4 x4

Port B

0~7

Ultra IO

Port B
8~15

#1

#2

G

8GB/s

#1

K

DIMM

DDR4

WIO

Upper

x16

UPI

32GB/s

32GB/s

32GB/s

PE1 PE3 PE2 UPI1 UPI0

DMI

CPU 1

PROCESSOR

VCCP1 12v

VR13
6+1 PHASE
255W

P2_NVMe1

x4

P2_NVMe2

x4

#1 #2

#1

L

DIMM

DIMM

M

DDR4

DDR4

DDR4

VGA

SPI

PE

SPI USB

MUX

SPI USB2.0 [6,7]

PE[5]

PE[0..3]

#1

H

DIMM

DIMM

J

DDR4

DDR4

NCSI

BMC

AST2500

HWM

LPC/eSPI

LPC/eSPI

PCH

SATA Gen3 [0..3]

SATA Gen3 [4..7]

sSATA Gen3 [0..3]

sSATA Gen3 [4, 5]

USB2.0 [8, 9,10,12,13]

USB3.0 [1,2,3,4,6]

#1 #1 #1

DIMM

DDR4

PHY

LAN

RTL8211F

UART

COM1

I-SATA3

I-SATA7

I-SATA3

I-SATA4

port 3 port 0,1

DMI

REAR

DIMM

F

DDR4

JS1

JS1

I-SATA2

JS1

I-SATA1

I-SATA0

JS2

JS2

I-SATA6

JS2

I-SATA5

I-SATA4

JS3

JS3

I-SATA2

JS3

I-SATA1

I-SATA0

I-SATA5

TYPE-A

#1 #2

DIMM

DDR4

IPMI LAN
RJ45

Port A

x8

NIC

Port A

0~7

P1_NVMe1

x4

P1_NVMe2

port 4,5

FRONT

8GB/s

#1

D

DIMM

DDR4

x4

32GB/s

32GB/s

32GB/s

PE2 PE1 PE3 UPI1 UPI0

DMI

CPU 0

PROCESSOR

VCCP0 12v

VR13
6+1 PHASE
255W

JS1

JS2

JS3

E

NCSI

Ultra IO

Port C

Port C

0~10

Port C

x16

x16

32GB/s

Lower

UPI

Port C

11~15

WIO

10.4G/s

Polarity Inversion

#1

#2

A

#1

B

DIMM

DDR4

DIMM

DIMM

C

DDR4

DDR4

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

18

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx series
processors (Socket P) and the Intel C621 chipset, the X11DPU-X/-XLL motherboard

provides superb system performance, e󰀩cient power management, and a rich feature

set based on cutting edge technology to address the needs of next-generation computer
users. With support of Intel® UltraPath Interconnect (UPI) of up to 10.4 G/s and new Intel®

AVX-512 instructions, this motherboard o󰀨ers an innovative solution with maximum system

performance to meet the ongoing demands of High Performance Computing (HPC) platforms.
This motherboard is optimized for HFT servers, remote work stations, software license
working servers, CPU encoding/decoding servers and rendering servers. The Intel Xeon
81xx/61xx/51xx/41xx/31xx series processor and the Intel C621 chipset support the following
features:

• Intel® AVX-512 support with memory bandwidth increase to 6 channels

• High availability interconnect between multiple nodes

• Rich set of available IOs, full exibility in usage model, and software stack

• Dedicated subsystems for customer innovation

• Integrated solution for real-time compression, streaming write & read performance in-

creases from gen-to-gen

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Single standard server development (Accelerate NFV transition) consolidating application,

control, and data plane workloads, reducing total platform investment needs

1.3 Special Features

This section describes the health monitoring features of the X11DPU-X/-XLL motherboard.
The motherboard has an onboard System Hardware Monitor chip that supports system health
monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to

remain powered o󰀨 (in which case you must press the power switch to turn it back on), or

for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

19

Super X11DPU-X/-XLL User's Manual

1.4 System Health Monitoring

This section describes the health monitoring features of the X11DPU-X/-XLL motherboard.
The motherboard has an onboard Baseboard Management Controller (BMC) chip that
supports system health monitoring. Once a voltage becomes unstable, a warning is given or

an error message is sent to the screen. The user can adjust the voltage thresholds to dene

the sensitivity of the voltage monitor.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. Users can

adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time readings

of these voltage levels are all displayed in BIOS.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of

the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be

turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

20

Chapter 1: Introduction

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system

and application software. This enables the system to automatically turn on and o󰀨 peripherals

such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with
Windows 10, and Windows 2012/R2 operating systems.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas

where noisy power transmission is present, you may choose to install a line lter to shield

the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.

1.7 Super I/O

The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power

Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

21

Super X11DPU-X/-XLL User's Manual

1.8 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power

management for maximum energy e󰀩ciency. Although IPNM Specication Version 2.0/3.0

is supported by the BMC (Baseboard Management Controller), your system must also have

IPNM-compatible Management Engine (ME) rmware installed to use this feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides

Server Platform Services (SPS) to your system. The services provided by SPS are di󰀨erent

from those provided by the ME on client platforms.

22

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following

measures are generally su󰀩cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

23

Super X11DPU-X/-XLL User's Manual

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

2.2 Motherboard Installation

All motherboards have standard mounting holes to t di󰀨erent types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that

the metal stando󰀨s click in or are screwed in tightly.

Phillips Screwdriver (1)

Tools Needed

JGPW1

GPU PWR1

SXB1

SXB1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

SXB2

CPU2_PORT1A

CPU2_DMI

SXB1C

Phillips Screws (13)

JUIDB2

LED1

COM1VGA

IPMI_LAN

USB0/1(3.0)

JIPMB1

JPG1

PCH_PORT1

I-SATA0~3

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI

JSDCARD1

JVRM1

SP1

JLAN1

RAID KEY-1

JWD1

JBR1

JP2

JRK1

IPMI CODE

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

Stando󰀨s (13)

Only if Needed

SXB3

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

P2_NVMe2

FAN8

NVME12

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 12 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

P2-DIMMK2

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

24

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMF1

FAN4

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

T-SGPIO3

GPU PWR2

FAN1

Chapter 2: Installation

Chassis

Chassis

Motherboard

Chassis

Motherboard

Chassis

Installing the Motherboard

1. Install the I/O shield into the back of the chassis if needed.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install stando󰀨s in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 6 to insert Phillips head #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or com-

ponents might look di󰀨erent from those shown in this manual.

25

Super X11DPU-X/-XLL User's Manual

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should

be assembled together rst to form the Processor Heatsink Module (PHM), and then install

the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

The Intel 81xx/61xx/51xx/41xx/31xx Series Processors

Note: The Intel 81xx/61xx/51xx/41xx/31xx processors contain two models - the F

model processors and the Non-F modle processors. This motherboard supports Non­F processors only.

Note: All graphics, drawings and pictures shown in this manual are for illustrating
purposes only. The components that came with your machine may or may not look
exactly like the components shown in this manual.

81xx/61xx/51xx/41xx/31xx Processor

26

Chapter 2: Installation

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the 81xx/61xx/51xx/41xx/31xx Processor

2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.

1. 81xx/61xx/51xx/41xx/31xx Processor

81xx/61xx/51xx/41xx/31xx Processor

2. Narrow processor clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

27

Super X11DPU-X/-XLL User's Manual

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) 81xx/61xx/51xx/41xx/31xx processor.

1. Heatsink

2. Narrow processor clip

3. The 81xx/61xx/51xx/41xx/31xx Processor

Processor Heatsink Module (PHM)

(Bottom View)

28

Chapter 2: Installation

A

Attaching the Processor to the Narrow Processor Clip to Create
the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 or notch A (a triangle cutout) on the top of the narrow processor clip. Also
locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A) - a printed triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and

sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

B

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

Align Notch C of the CPU

C

and Notch C of the Processor Clip

A

Pin 1

C

CPU/Heatsink Package
(Upside Down)

B

Allow Notch C to
latch on to CPU

C

A

B

Allow Notch B to
latch on to CPU

Processor Package Carrier (w/CPU mounted on the

Processor Clip)

29

Super X11DPU-X/-XLL User's Manual

Attaching the Processor Package Assembly to the Heatsink to
Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of the thermal grease

as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

CPU and Processor Clip

(Upside Down)

b

3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

Triangle on the CPU

Triangle on the
Processor Clip

On Locations (A, B), the notches
snap onto the heatsink’s sides

d

D

Heatsink

(Upside Down)

D

c

B

a

C

A

On Locations of (C, D), the notches

snap onto the heat sink’s

B

mounting holes

C

A

Make sure Mounting

Notches snap into place

30

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dust Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

CPU Socket

31

Super X11DPU-X/-XLL User's Manual

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 29 or page 30, you are ready to install the processor heatsink
module (PHM) into the CPU socket on the motherboard. To install the PHM into the
CPU socket, follow the instructions below.

2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the

corner of the PHM that is closest to "1." (If you have di󰀩culty locating pin 1 of the PHM,

turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)

3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.

4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.

5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

32

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,

1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in
the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

33

Super X11DPU-X/-XLL User's Manual

2.4 Memory Support and Installation

Notes: Check the Supermicro website for recommended memory modules. Exercise

extreme care when installing or removing DIMM modules to prevent any damage.

Memory Support

The X11DPU-X supports up to 2TB of 3DS LRDIMM (3DS Load Reduced DIMM), LRDIMM
(Load Reduced DIMM), 3DSRDIMM (3DS Registered DIMM), RDIMM (Registered DIMM),
NV-DIMM (Non-Volatile DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz memory modules
in 16 slots. The X11DPU-XLL supports up to 2TB of LRDIMM (Load Reduced DIMM), RDIMM
(Registered DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz memory modules in 16 slots
(Note: NV-DIMM, 3DSLRDIMM and 3DSRDIMM are supported when requested by OEM
only). The black DIMM slots are reserved for future NVDIMM support. Populating the DIMM

slots in a 2DPC (two DIMMs per channel) conguration with pairs of memory modules of the

same type, speed and size will result in interleaved memory, which improves performance.

Notes: 1. When installing DIMMs in a 2DPC memory conguration, rst populate the
blue memory slot, which is the rst slot of a channel, followed by the black slot. 2.

Using an unbalanced memory topology by installing two DIMMs in one channel while
installing one DIMM in another channel will result in reduced memory performance. 3.
Memory speed is dependent on the type of processors used in your system.

DDR4 Memory Support (for 2-Slot Per-Channel Conguration)

Ranks

DIMM Capacity

Type

RDIMM SRx4 8 GB 16 GB 2666 2666

RDIMM SRx8 4 GB 8 GB 2666 2666

RDIMM DRx8 8 GB 16 GB 2666 2666

RDIMM DRx4 16 GB 32 GB 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666

LRDIMM QRx4 32 GB 64 GB 2666 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666 2666

8Rx4 N/A 4H-128 GB 2666 2666

(GB)

4 Gb 8 Gb 1.2 V 1.2 V

DDR4 Memory Support (for 1-Slot Per-Channel Conguration)

Ranks

DIMM Capacity

Type

RDIMM SRx4 8 GB 16 GB 2666

RDIMM SRx8 4 GB 8 GB 2666

RDIMM DRx8 8 GB 16 GB 2666

RDIMM DRx4 16 GB 32 GB 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666

LRDIMM QRx4 32 GB 64 GB 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666

8Rx4 N/A 4H-128 GB 2666

(GB)

4 Gb 8 Gb 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

2 Slots per Channel

1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

1 Slot per Channel

1DPC (1-DIMM per Channel)

34

Chapter 2: Installation

DIMM Population Requirements for the
81xx/61xx/51xx/41xx/31xx series Processors

For optimal memory performance, follow the tables below when populating memory modules.

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),

D (1RX8), E (2RX8)

• 3DS RDIMM Raw Cards: A/B (4RX4)

• non-3DS LRDIMM Raw Cards: D/E (4RX4)

• 3DS LRDIMM Raw Cards: A/B (8RX4)

General Population Requirements

DIMM Mixing Rules

• Please populate all memory modules with DDR4 DIMMs only.

• X4 and X8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across di󰀨erent channels, and across

di󰀨erent sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across di󰀨erent channels, and across

di󰀨erent sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed Not Allowed Allowed

35

Super X11DPU-X/-XLL User's Manual

CPU2

CPU1

PCH

SXB1A

PCH_PORT1

SXB1_2

SXB1C

CPU1_PORT3

CPU2_PORT3

CPU2_PORT1A

SXB2

CPU2_DMI

SXB1

PSU1PSU2

SXB3BSXB3A

SXB3

CPU2_PORT2 CPU1_PORT1

CPU1_PORT2A

VPP_CPU1

SXB3C

JUIDB2

IPMI_LAN

COM1VGA

USB0/1(3.0)

LED1

UM5

BIOS

JIPMB1

IPMI

LEDM1

JPG1

JLAN1

BMC

JPME2

JBR1

JPME1

JRK1

RAID KEY-1

JSDCARD1

JBT1

JP2

S-SATA5

SP1

JWD1

BT1

U45

I-SATA0~3

I-SATA4~7

S-SATA0~3

S-SATA4

JSD1

JSD2

USB2(3.0)

JUSBA1

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

T-SGPIO3

FAN3

FAN2

FAN1

FAN4

FAN5FAN6FAN7

FAN8

P1-DIMMF1

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMB1

P1-DIMMC1

JL1

P2_NVMe1

P2_NVMe2

NVME12

NVME13

P2-DIMMM1

P2-DIMML1

P2-DIMMK1

P2-DIMMK2

P2-DIMMG2

P2-DIMMG1

P2-DIMMH1

P2-DIMMJ1

VPP_CPU2

JNVI2C2

JF1

LE2

P1_NVMe1

JNVI2C1

P1_NVMe2

NVME 10

NVME11

GPU PWR3

JGPW3

GPU PWR1

JGPW1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR2

IPMI CODE

BIOS

LICENSE

BAR CODE

DESIGNED IN USA

REV:1.01A

X11DPU-X

JVRM1

DIMM Installation

1. Insert DIMM modules in the following
order: P1-DIMMA1, P1-DIMMD1, then P1­DIMMB1, P1-DIMME1, then P1-DIMMC1,
P1-DIMMF1. For the system to work
properly, please use memory modules
of the same type and speed on the
motherboard.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

DIMM Removal

Reverse the steps above to remove the DIMM
modules from the motherboard.

Notches

Release Tabs

Press both notches
straight down into
the memory slot.

36

Chapter 2: Installation

2.5 Rear I/O Ports

See Figure 2-2 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JUSBA1

JSD2

JPG1

S-SATA4

X11DPU-X

JIPMB1

IPMI

JBT1

S-SATA5

DESIGNED IN USA

REV:1.01A

BAR CODE

JSDCARD1

JVRM1

SP1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

LICENSE

IPMI CODE

BIOS

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

JF1

VPP_CPU2

LE2

JL1

P2_NVMe1

FAN8

JNVI2C2

JGPW3

GPU PWR3

NVME12

P2_NVMe2

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

P1-DIMMF1

FAN4

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

CPU1

FAN3

Back panel I/O Port Locations and Denitions

2

3

1

54

Back Panel I/O Ports

No. Description No. Description

1. USB 0 (USB 3.0) 4. COM1

2. USB 1 (USB 3.0) 5. Unit Identier Switch (UID)

3. IPMI LAN 6. VGA

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

6

37

Super X11DPU-X/-XLL User's Manual

VGA Port

The onboard VGA port is located next to IPMI LAN port on the I/O back panel. Use this
connection for VGA display.

Serial Port

There is one COM port (COM1) on the I/O back panel. The COM port provides serial

communication support. See the table below for pin denitions.

COM Port

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

1

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

CPU2

PCH_PORT1

I-SATA0~3

LEDM1

I-SATA4~7

LED1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

JUIDB2

JUSBA1

BMC

U45

JSD2

COM1VGA

JIPMB1

JPG1

IPMI

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI_LAN

JSDCARD1

SP1

JVRM1

2

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

1. VGA Port

2. COM1

VPP_CPU1

NVME 10

P1_NVMe1

JNVI2C1

CPU1

PSU1PSU2

NVME11

P1_NVMe2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

FAN8

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

38

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB0/1) on the I/O back panel. There is also one USB 3.0
header (USB3/4) on the motherboard to provide front access USB connection and a Type A
USB 3.0 header (USB2). The onboard headers can be used to provide front side USB access
with a cable (not included).

Back Panel USB 0/1 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB_N

A3 D+ B3 USB_P

A4 GND B4 GND

A5 Stda_SSRX- B5 USB3_RN

A6 Stda_SSRX+ B6 USB3_RP

A7 GND B7 GND

A8 Stda_SSTX- B8 USB3_TN

A9 Stda_SSTX+ B9 USB3_TP

JUIDB2

LED1

PCH_PORT1

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JUSBA1

COM1VGA

JPG1

S-SATA4

JSD2

DESIGNED IN USA

X11DPU-X

REV:1.01A

JIPMB1

IPMI

JBT1

S-SATA5

2

BAR CODE

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

CPU2

IPMI_LAN

JSDCARD1

JVRM1

JLAN1

SP1

JBR1

RAID KEY-1

JWD1

IPMI CODE

USB0/1(3.0)

JP2

JRK1

BIOS

LICENSE

JPME2

CPU1_PORT2A

1

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

Type A USB 2 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 5 SSRX-

2 USB_N 6 SSRX+

3 USB_P 7 GND

4 Ground 8 SSTX-

9 SSTX+

Front Panel USB 3/4 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1

VBUS 19 Power

2

Stda_SSRX- 18 USB3_RN

3

Stda_SSRX+ 17 USB3_RP

4

GND 16 GND

5

Stda_SSTX- 15 USB3_TN

6

SXB3

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

Stda_SSTX+ 14 USB3_TP

7

GND 13 GND

8

D- 12 USB_N

9

D+ 11 USB_P

1. USB0/1 (3.0)

2. USB2 (3.0)

3. USB3/4 (3.0)

CPU1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

FAN8

NVME12

P2_NVMe2

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

FAN5FAN6FAN7

P2-DIMMG2

P2-DIMMG1

P2-DIMMJ1

P2-DIMMH1

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

39

Super X11DPU-X/-XLL User's Manual

1 2

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch (JUIDB2) and a UID LED Indicator (LED1) are located on the

I/O back panel. The UID LED is located on pin 7 of the front control panel (JF1) . When you
press the UID switch, the UID LED indicator will be turned on. Press the UID switch again

to turn o󰀨 the LED. The UID Indicator provides easy identication of a system unit that may

be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

UID Switch

Pin Denitions

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

Ethernet Ports

An IPMI-dedicated LAN that supports GbE LAN is located next to USB 0/1 ports on the
backplane. All Ethernet ports accept RJ45 type cables. Please refer to the LED Indicator
Section for LAN LED information..

2

JF1

JL1

P2_NVMe1

VPP_CPU2

LE2

GPU PWR3

P2_NVMe2

FAN8

GPU PWR1

JNVI2C2

NVME12

NVME13

1

JUIDB2

LED1

LEDM1

I-SATA4~7

FAN5FAN6FAN7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

P2-DIMMG2

BMC

U45

JUSBA1

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

COM1VGA

JPG1

S-SATA4

JSD2

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

CPU2

JGPW3

P2-DIMMM1

P2-DIMMK2

P2-DIMMK1

P2-DIMML1

JIPMB1

IPMI

JBT1

S-SATA5

IPMI_LAN

JSDCARD1

JVRM1

JLAN1

SP1

RAID KEY-1

JWD1

IPMI CODE

3

USB0/1(3.0)

JBR1

JP2

JRK1

LICENSE

JPME2

BIOS

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

P1-DIMMF1

FAN4

SXB3BSXB3A

SXB3C

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

Power Button

PWR

Reset

Reset Button

3.3V

1

SXB3

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

x

NMI

VPP_CPU1

JNVI2C1

NVME 10

P1_NVMe1

NVME11

P1_NVMe2

PSU1PSU2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

x

Ground

19

20

1. UID LED1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

T-SGPIO3

2. JUIDB2

3. IPMI LAN

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

40

Chapter 2: Installation

19

20

1 2

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

SXB1A

CPU2_PORT3

CPU1_PORT3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

CPU2

SXB1

SXB1_2

SXB1C

SXB2

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

LEDM1

I-SATA4~7

LED1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

JUIDB2

BMC

U45

JUSBA1

JSD2

COM1VGA

JPG1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

JBT1

IPMI

JSDCARD1

JVRM1

IPMI_LAN

JLAN1

SP1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

LICENSE

IPMI CODE

BIOS

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3C

SXB3BSXB3A

SXB3

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

T-SGPIO3

JL1

P2_NVMe1

FAN8

GPU PWR3

NVME12

P2_NVMe2

NVME13

JGPW3

PWR

Reset

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

FAN5FAN6FAN7

P2-DIMMG2

P2-DIMMH1

P2-DIMMG1

P2-DIMMJ1

P1-DIMMF1

FAN4

Figure 2-3. JF1 Header Pins

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

x

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

x

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

NMI

Ground

41

Super X11DPU-X/-XLL User's Manual

1 2

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/o󰀨 the system. This button can also be congured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn o󰀨 the power when the system

is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

1

2

Reset

PWR

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

Ground

Ground

Power Fail LED

OH/Fan Fail LED

1. PWR Button

NIC2 Active LED

2. Reset Button

NIC1 Active LED

HDD LED

3.3V Stby

NMI

x

19

PWR LED

x

Ground

20

42

Chapter 2: Installation

1 2

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

Fan Fail and UID LED

Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. The
blue LED on pin 7 works as the front panel UID LED indicator. Refer to the tables below for

pin denitions.

PWR

Reset

Power Button

Reset Button

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue UID LED

8 OH/Fan Fail LED

3.3V

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

OH/Fan Fail Indicator

Status

State Denition

O󰀨 Normal

On Overheat

Flashing Fan Fail

1. Power Fail LED

1

2

2. OH/Fan Fail LED

3.3V Stby

x

NMI

19

PWR LED

x

Ground

20

43

Super X11DPU-X/-XLL User's Manual

1 2

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition Pin# Denition

9 +3.3V 10 NIC 2 Activity LED

11 +3.3V 12 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

PWR

Reset

Power Button

Reset Button

UID LED

3.3V Stby

3.3V

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

1

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

1. NIC2 LED

3.3V Stby

3.3V Stby

3.3V Stby

x

NIC1 Active LED

HDD LED

3

PWR LED

x

2

2. NIC1 LED

3. HDD LED

NMI

19

Ground

20

44

Chapter 2: Installation

1 2

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

PWR

Reset

Power Button

Reset Button

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

2

3.3V

x

NMI

19

20

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

x

Ground

1. PWR LED

2. NMI

1

45

Super X11DPU-X/-XLL User's Manual

2.7 Connectors

Power Connectors

PSU1 and PSU2 Power Connectors

Two SMCI-proprietary power supply units (PSU1/PSU2) are located on the motherboard to
provide main power supply to your system.

HDD Power Connectors

Four 8-pin HDD backplane power connectors (JPW1 - JPW4) are used to provide power to

hard drives and other backplane devices. See the table below for pin denitions.

12V 8-pin Backplane Power

Connector Pin Denitions

Pins Denition

1 through 4

5/6

7/8

Ground

+12V

+5V

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW1

SXB1

SXB1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

CPU2

SXB2

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

LEDM1

I-SATA4~7

LED1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

JUIDB2

BMC

U45

JSD2

JUSBA1

COM1VGA

JIPMB1

JPG1

IPMI

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI_LAN

JSDCARD1

SP1

JVRM1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

LICENSE

IPMI CODE

BIOS

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

1. PSU1 (Power Supply 1)

2. PSU2 (Power Supply 2)

3. JPW1 (Backplane Power 1)

4. JPW2 (Backplane Power 2)

5. JPW3 (Backplane Power 3)

6 JPW4 (Backplane Power 4)

SXB3

NVME11

P1_NVMe2

1

PSU1PSU2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

SXB3BSXB3A

SXB3C

2

VPP_CPU1

JNVI2C1

CPU1

NVME 10

P1_NVMe1

4

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

3

6

5

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

FAN8

NVME13

P2-DIMMM1

P2-DIMMK2

P2-DIMMK1

P2-DIMML1

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

46

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

GPU Power Connectors

Four power connectors for GPU and VGA devices are located at JGPW1, JGPW2, JGPW3
and JGPW4. Connect an appropriate cable to each GPU power connector to provide power
for your GPU/VGA devices.

8-pin GPU PWR

Connector Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

SATA DOM Power Connectors

Two power connectors for SATA DOM (Disk_On_Module) devices are located at JSD1 and
JSD2. Connect appropriate cables to JSD1 and JSD2 to provide power for your SATA DOM
devices.

DOM PWR

Pin Denitions

Pin# Denition

1 +5V

2 Ground

3 Ground

1

JGPW1

GPU PWR1

SXB1

SXB1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

SXB2

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

LEDM1

I-SATA4~7

5

LED1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

JUIDB2

BMC

U45

JSD2

JUSBA1

COM1VGA

JIPMB1

JPG1

IPMI

JBT1

S-SATA4

S-SATA5

6

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI_LAN

JSDCARD1

SP1

JVRM1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

1. GPU Power Connector 1

2. GPU Power Connector 2

3. GPU Power Connector 3

4. GPU Power Connector 4

5. SATA DOM Power Connector 1

6. SATA DOM Power Connector 2

SXB3

NVME 10

P1_NVMe1

NVME11

P1_NVMe2

PSU1PSU2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

SXB3BSXB3A

SXB3C

VPP_CPU1

JNVI2C1

JF1

VPP_CPU2

JNVI2C2

LE2

3

JL1

P2_NVMe1

FAN8

JGPW3

GPU PWR3

NVME12

P2_NVMe2

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

CPU2

FAN5FAN6FAN7

P2-DIMMG2

P2-DIMMH1

P2-DIMMG1

P2-DIMMJ1

47

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

FAN1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

4

2

Super X11DPU-X/-XLL User's Manual

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

Headers

Onboard Fan Header

Eight 4-pin fan headers (FAN1~6, FANA, FANB) are located on the motherboard to provide
CPU/system cooling. These fan headers support both 3-pin fans and 4-pin fans; however,
onboard fan speed control is available only when all 4-pin fans are used in the motherboard.
Fan speed control is supported by a thermal management setting in the BMC (Baseboard

Management Controller). See the table below for pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

JF1

LE2

JL1

P2_NVMe1

FAN8

GPU PWR1

VPP_CPU2

JNVI2C2

JGPW3

GPU PWR3

NVME12

P2_NVMe2

NVME13

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

CPU2

P2-DIMMM1

P2-DIMMK2

P2-DIMMK1

P2-DIMML1

LEDM1

I-SATA4~7

FAN5FAN6FAN7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

P2-DIMMG2

P2-DIMMG1

BMC

U45

S-SATA4

JSD2

JUSBA1

P2-DIMMJ1

P2-DIMMH1

JPG1

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JSDCARD1

JBT1

S-SATA5

JVRM1

JLAN1

SP1

JBR1

RAID KEY-1

JWD1

IPMI CODE

USB0/1(3.0)

JP2

JRK1

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

SXB3

P1-DIMMD2

VPP_CPU1

JNVI2C1

CPU1

FAN3

NVME 10

P1_NVMe1

NVME11

P1_NVMe2

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

PSU1PSU2

P1-DIMMC1

FAN2

1. FAN1

2. FAN2

3. FAN3

4. FAN4

5. FAN5

6. FAN6

7. FAN7

8. FAN8

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

4

7

6

5

3

2

18

48

Chapter 2: Installation

VRM Programming Header (JVRM1)

A 3-pin Programming header, located at JVRM1, is used for VRM programming in the
manufactory. Please note that this header is reserved for Supermicro internal use only. Please

see the table below for pin denitions.

VRM

Jumper Settings

Jumper Setting Denition

Pin 1 VRM Clock

Pin 2 VRM Data

Pin 3 Ground

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

LEDM1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA4~7

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JSDCARD1

JVRM1

JLAN1

SP1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

RAID KEY-1

1

IPMI CODE

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

VPP_CPU1

JNVI2C1

NVME 10

P1_NVMe1

1. JVRM1

PSU1PSU2

NVME11

P1_NVMe2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

NVME13

FAN8

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

49

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

Super X11DPU-X/-XLL User's Manual

TPM/Port 80

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which
is available from a third-party vendor. A TPM/Port 80 connector is a security device
that supports encryption and authentication in hard drives. It allows the motherboard
to deny access if the TPM associated with the hard drive is not installed in the system.
See the table below for pin definitions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8

9 +3.3V Stdby 10 SPI_IRQ

JF1

VPP_CPU2

LE2

JGPW1

GPU PWR1

JNVI2C2

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

SXB2

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

S-SATA4

1

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

CPU2

JIPMB1

IPMI

JSDCARD1

JBT1

S-SATA5

JVRM1

JLAN1

RAID KEY-1

SP1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

1. TPM/Port 80 Header

SXB3

SXB3BSXB3A

VPP_CPU1

NVME 10

SXB3C

JNVI2C1

CPU1

P1_NVMe1

NVME11

P1_NVMe2

PSU1PSU2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

NVME13

FAN8

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

50

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

RAID Key Header

A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support
RAID settings for S-SATA connections.

SGPIO Header

The T-SGPIO3 (Serial General Purpose Input/Output) header is used to communicate with
the enclosure management chip on the backplane.

SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 DATA Out

5 Load 6 Ground

7 Clock 8 NC

NC = No Connection

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

CPU2

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

S-SATA4

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JBT1

S-SATA5

JSDCARD1

SP1

JVRM1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

1. RAID Key

2. Serial General Purpose Header

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

T-SGPIO3

2

JGPW3

GPU PWR3

JL1

P2_NVMe1

P2_NVMe2

FAN8

NVME12

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

P1-DIMMF1

51

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

FAN4

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

Super X11DPU-X/-XLL User's Manual

4-pin BMC External I2C Header

A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable here to use the IPMB I2C connection on your system. Refer to the table below for pin

denitions.

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin denitions.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

LEDM1

SXB2

SXB1A

CPU2_PORT3

CPU1_PORT3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

CPU2

SXB1_2

SXB1C

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JUSBA1

JSD2

JIPMB1

JPG1

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI

1

JSDCARD1

JVRM1

JLAN1

SP1

JBR1

RAID KEY-1

JWD1

IPMI CODE

USB0/1(3.0)

JP2

JRK1

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3C

SXB3BSXB3A

SXB3

1. BMC External I2C Header

2. Chassis Intrusion

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

T-SGPIO3

JGPW3

GPU PWR3

JL1

2

P2_NVMe1

P2_NVMe2

FAN8

NVME12

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

FAN5FAN6FAN7

P2-DIMMG2

P2-DIMMH1

P2-DIMMG1

P2-DIMMJ1

P1-DIMME1

P1-DIMMF1

FAN4

52

P1-DIMMD1

P1-DIMMD2

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

IPMI CODE

BIOS

LICENSE

BAR CODE

DESIGNED IN USA

REV:1.01A

X11DPU-X

CPU2

CPU1

PCH

SXB1A

PCH_PORT1

SXB1_2

SXB1C

CPU1_PORT3

CPU2_PORT3

CPU2_PORT1A

SXB2

CPU2_DMI

SXB1

PSU1PSU2

SXB3BSXB3A

SXB3

CPU2_PORT2 CPU1_PORT1

CPU1_PORT2A

VPP_CPU1

SXB3C

JUIDB2

IPMI_LAN

COM1VGA

USB0/1(3.0)

LED1

UM5

BIOS

JIPMB1

IPMI

LEDM1

JPG1

JLAN1

BMC

JPME2

JBR1

JPME1

JRK1

RAID KEY-1

JSDCARD1

JBT1

JP2

S-SATA5

SP1

JWD1

JVRM1

BT1

U45

I-SATA0~3

I-SATA4~7

S-SATA0~3

S-SATA4

JSD1

JSD2

USB2(3.0)

JUSBA1

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

T-SGPIO3

FAN3

FAN2

FAN1

FAN4

FAN5FAN6FAN7

FAN8

P1-DIMMF1

P1-DIMME1

P1-DIMMD1

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMB1

P1-DIMMC1

JL1

P2_NVMe1

P2_NVMe2

NVME12

NVME13

P2-DIMMM1

P2-DIMML1

P2-DIMMK1

P2-DIMMK2

P2-DIMMG2

P2-DIMMG1

P2-DIMMH1

P2-DIMMJ1

VPP_CPU2

JNVI2C2

JF1

LE2

P1_NVMe1

JNVI2C1

P1_NVMe2

NVME 10

NVME11

GPU PWR3

JGPW3

GPU PWR1

JGPW1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR2

NVMe I2C SMBus Headers

NVMe SMBus (I2C) headers (JNVI2C1 and JNVI2C2), used for PCI-E SMBus clock and data
connections, provide hot-plug support via a dedicated SMBus interface. This feature is only
available for a Supermicro complete system with an SMCI-proprietary NVMe add-on card

and cable installed. See the table below for pin denitions.

NVMe SMBus Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 VCCIO

NVMe Slots

Use the four NVMe slots (NVME10, NVME11, NVME12 and NVME13) to attach high-speed
PCI-E storage devices.

1. JNVI2C1 Management Header

2. JNVI2C2 Management Header

3. NVME10 slot (CPU1)

2

4. NVME11 slot (CPU1)

5. NVME12 slot (CPU2)

6. NVME13 slot (CPU2)

354

1

6

53

Super X11DPU-X/-XLL User's Manual

I-SATA 3.0 and S-SATA 3.0 Ports

The X11DPU-X/-XLL motherboard has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) and
six S-SATA ports (S-SATA0-3, S-SATA4, S-SATA5) on the motherboard. These SATA ports
are supported by the Intel C621 chipset. S-SATA4/S-SATA5 can be used with Supermicro
SuperDOMs which are yellow SATA DOM connectors with power pins built in, and do not
require external power cables. Supermicro SuperDOMs are backward-compatible with regular
SATA HDDs or SATA DOMs that need external power cables. All these SATA ports provide
serial-link signal connections, which are faster than the connections of Parallel ATA. Please
note that X11DPU-XLL motherboard does not support onboard SATA.

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

LEDM1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA4~7

I-SATA0~3

USB3/4(3.0)

JUSB3

1

2

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

3

BMC

U45

4

JSD2

JUSBA1

S-SATA4

JPG1

JBT1

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JSDCARD1

5

JVRM1

JLAN1

RAID KEY-1

SP1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

VPP_CPU1

JNVI2C1

1. I-SATA0-3

2. I-SATA4-7

3. S-SATA0-3

4. S-SATA4

5. S-SATA5

PSU1PSU2

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

NVME13

FAN8

P2-DIMMM1

P2-DIMMK2

P2-DIMMK1

P2-DIMML1

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

54

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

Chapter 2: Installation

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional

settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is o󰀨 the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

55

Super X11DPU-X/-XLL User's Manual

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper

consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

S-SATA4

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JBT1

S-SATA5

JSDCARD1

1

JVRM1

JLAN1

SP1

RAID KEY-1

JWD1

IPMI CODE

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

JBT1 contact pads

SXB3

1. Clear CMOS

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

P2_NVMe2

FAN8

NVME12

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

56

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

Management Engine (ME) Recovery

Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource

allocation for essential system operation only in order to maintain normal power operation
and management. In the single operation mode, online upgrade will be available via Recovery

mode. See the table below for jumper settings.

Manufacturer Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal

Pins 2-3 ME Recovery

Manufacturing Mode Select

Close JPME2 to bypass SPI ash security and force the system to use the Manufacturing
Mode, which will allow you to ash the system rmware from a host server to modify system
settings. See the table below for jumper settings.

Manufacturing Mode Select

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

CPU2

LEDM1

I-SATA4~7

UM5

BIOS

JPME1

1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

S-SATA4

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JSDCARD1

JBT1

S-SATA5

JVRM1

SP1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

LICENSE

IPMI CODE

JPME2

BIOS

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3C

2

SXB3

SXB3BSXB3A

Jumper Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacturing Mode

1. ME Recovery

2. Manufacturing Mode Select

VPP_CPU1

NVME 10

P1_NVMe1

JNVI2C1

CPU1

Jumper Settings

PSU1PSU2

NVME11

P1_NVMe2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

FAN8

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

57

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

Super X11DPU-X/-XLL User's Manual

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.

Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

JF1

VPP_CPU2

LE2

JGPW1

GPU PWR1

JNVI2C2

SXB1

SXB1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

CPU2

SXB2

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

LEDM1

I-SATA4~7

USB2(3.0)

JUIDB2

LED1

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

BMC

U45

JSD2

JUSBA1

COM1VGA

JIPMB1

JPG1

IPMI

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI_LAN

JSDCARD1

SP1

JVRM1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

1

BIOS

LICENSE

IPMI CODE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

1. Watch Dog

VPP_CPU1

NVME 10

P1_NVMe1

JNVI2C1

CPU1

PSU1PSU2

NVME11

P1_NVMe2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

NVME13

FAN8

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

58

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR2

FAN1

2.9 LED Indicators

Chapter 2: Installation

IPMI-Dedicated LAN LEDs

An IPMI dedicated LAN is located on the I/O
Backplane of the motherboard. The amber LED
on the right indicates activity, while the green LED
on the left indicates the speed of the connection.
See the tables at right for more information.

1

COM1VGA

JIPMB1

JPG1

IPMI

JBT1

S-SATA4

S-SATA5

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

IPMI_LAN

JSDCARD1

SP1

JVRM1

1

JLAN1

RAID KEY-1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

BIOS

LICENSE

IPMI CODE

JUIDB2

LED1

SXB1

LEDM1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

PCH_PORT1

CPU2_DMI

I-SATA0~3

I-SATA4~7

USB2(3.0)

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

BMC

U45

JSD2

JUSBA1

IPMI LAN

Link LED

Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color State Denition

Link (Left) Green: Solid 100 Mbps

Activity (Right) Amber: Blinking Active

JPME2

CPU1_PORT2A

SXB3

1. IPMI LAN LEDs

CPU2_PORT2 CPU1_PORT1

PSU1PSU2

SXB3BSXB3A

VPP_CPU1

NVME 10

SXB3C

JNVI2C1

P1_NVMe1

NVME11

P1_NVMe2

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

FAN8

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

59

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

FAN3

P1-DIMMA1

P1-DIMMA2

P1-DIMMB1

P1-DIMMC1

FAN2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

Super X11DPU-X/-XLL User's Manual

BMC Heartbeat LED

LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

Onboard Power LED

The Onboard Power LED is located at LE2 on the motherboard. When this LED is on, the

system is on. Be sure to turn o󰀨 the system and unplug the power cord before removing or

installing components. Refer to the table below for more information.

Onboard Power LED Indicator

LED Color Denition

System O󰀨

O󰀨

Green System On

(power cable not

connected)

JUIDB2

LED1

COM1VGA

IPMI_LAN

SXB1

SXB2

SXB1A

CPU2_PORT1A

CPU2_PORT3

PCH_PORT1

CPU1_PORT3

CPU2_DMI

SXB1_2

SXB1C

I-SATA0~3

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

JF1

VPP_CPU2

JNVI2C2

LE2

2

CPU2

LEDM1

1

I-SATA4~7

UM5

BIOS

JPME1

PCH

BT1

S-SATA0~3

JSD1

USB2(3.0)

BMC

U45

JSD2

JUSBA1

JPG1

S-SATA4

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

IPMI

JSDCARD1

JBT1

S-SATA5

JVRM1

JLAN1

SP1

JBR1

RAID KEY-1

JWD1

IPMI CODE

USB0/1(3.0)

JP2

JRK1

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

1. BMC Heartbeat LED

2. Onboard Power LED

PSU1PSU2

VPP_CPU1

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JNVI2C1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

CPU1

T-SGPIO3

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

FAN8

NVME13

P2-DIMMM1

P2-DIMMK1

P2-DIMML1

P2-DIMMK2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

60

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN3

FAN2

GPU PWR2

FAN1

Chapter 2: Installation

Unit ID LED

A rear UID LED indicator at LED1 is located near the UID switch on the I/O back panel. This

UID indicator provides easy identication of a system.unit that may need service.

UID LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

1

JUIDB2

LED1

COM1VGA

IPMI_LAN

IPMI

JSDCARD1

JVRM1

JLAN1

SP1

JWD1

USB0/1(3.0)

JBR1

JP2

JRK1

RAID KEY-1

IPMI CODE

BIOS

LICENSE

JPME2

CPU1_PORT2A

CPU2_PORT2 CPU1_PORT1

SXB3BSXB3A

SXB3C

SXB3

VPP_CPU1

JNVI2C1

1. UID LED

PSU1PSU2

NVME 10

NVME11

P1_NVMe2

P1_NVMe1

JPW1JPW2 JPW3 JGPW4 JGPW2JPW4

SXB1

LEDM1

SXB2

SXB1A

CPU2_PORT1A

PCH_PORT1

CPU2_DMI

I-SATA0~3

BIOS

PCH

BT1

I-SATA4~7

USB2(3.0)

CPU2_PORT3

CPU1_PORT3

SXB1_2

SXB1C

USB3/4(3.0)

JUSB3

TPM/PORT80

JTPM1

JGPW1

GPU PWR1

UM5

BMC

JPME1

U45

S-SATA0~3

JSD1

JUSBA1

JPG1

S-SATA4

JSD2

DESIGNED IN USA

X11DPU-X

REV:1.01A

BAR CODE

JIPMB1

JBT1

S-SATA5

JF1

VPP_CPU2

JNVI2C2

LE2

JGPW3

GPU PWR3

JL1

P2_NVMe1

NVME12

P2_NVMe2

NVME13

FAN8

P2-DIMMM1

P2-DIMMK2

P2-DIMMK1

P2-DIMML1

CPU2

P2-DIMMG2

FAN5FAN6FAN7

P2-DIMMJ1

P2-DIMMH1

P2-DIMMG1

61

P1-DIMME1

P1-DIMMD1

P1-DIMMF1

FAN4

P1-DIMMD2

CPU1

FAN3

P1-DIMMA1

P1-DIMMC1

P1-DIMMA2

P1-DIMMB1

FAN2

GPU PWR4BP PWR3BP PWR4BP PWR1BP PWR2

T-SGPIO3

GPU PWR2

FAN1

Super X11DPU-X/-XLL User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink and connect the internal speaker and the power LED to the

motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully

seated.)

7. Use the correct type of onboard CMOS battery (CR2032) as recommended by the
manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and o󰀨 to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

62

Chapter 3: Troubleshooting

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.

Note: If you are a system integrator, VAR or OEM, a POST diagnostics card is recom­mended. For I/O port 80h codes, refer to Appendix B.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-

tacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

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Super X11DPU-X/-XLL User's Manual

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD/DVD and CD/DVD-ROM.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

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Chapter 3: Troubleshooting

3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

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Super X11DPU-X/-XLL User's Manual

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X11DPU-X motherboard supports up to 2TB of 3DS LRDIMM (3DS Load

Reduced DIMM), LRDIMM (Load Reduced DIMM), 3DSRDIMM (3DS Registered DIMM),
RDIMM (Registered DIMM), NV-DIMM (Non-Volatile DIMM) DDR4 (288-pin) ECC
2666/2400/2133 MHz memory modules in 16 slots. The X11DPU-XLL motherboard supports
up to 2TB of LRDIMM (Load Reduced DIMM) and RDIMM (Registered DIMM) DDR4 (288­pin) ECC 2666/2400/2133 MHz memory modules in 16 slots. (Note: NV-DIMM, 3DSLRDIMM
and 3DSRDIMM are supported when requested by OEM only). See Section 2.4 for details
on installing memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn o󰀨 the power using the momentary power on/o󰀨 switch?

Answer: The instant power o󰀨 function is controlled in BIOS by the Power Button Mode
setting. When the On/O󰀨 feature is enabled, the motherboard will have instant o󰀨 capabilities

as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen
that appears when the system is turned on), the momentary on/o󰀨 switch must be held for

more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

3.4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

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Chapter 3: Troubleshooting

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of

products. During the warranty period, contact your distributor rst for any product problems.

3.5 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power o󰀨 your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Important: When replacing a battery, be sure to only replace it with the same type.

LITHIUM BATTERY

BATTERY HOLDER

LITHIUM BATTERY

OR

BATTERY HOLDER

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Super X11DPU-X/-XLL User's Manual

Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the X11DPU-X/-XLL motherboard. The

BIOS is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A "" indicates a submenu. Highlighting such an item and pressing the <Enter> key will open
the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.

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Chapter 4: BIOS

4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:

System Date/System Time

Use this item to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the

arrow keys to move between elds. The date must be entered in Day MM/DD/YYYY format.

The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.

Supermicro X11DPU-X/-XLL

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This item displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.

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Memory Information

Total Memory

This item displays the total size of memory available in the system.

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Chapter 4: BIOS

4.3 Advanced Setup Congurations

Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect
DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore the setting to the manufacture default setting.

Performance Tuning (For X11DPU-X only)

Cores Enabled

Use this item to select how man CPU cores will be enabled. For example: if the CPU has 8
cores, then 1 to 8 cores can be enabled and the values available would be 0,1,2,3,4,5,6 and

7. The value chosen equals to the number of cores enabled, henceforth, selecting "3" would

enable three cores and selecting "5" would enable ve cores. The only exception to this is

selecting "0" which enables all cores. The default value is: 0 (all cores).

Hyper-Speed

Use this item to select the hardware acceleration level of the machine. CPU, Memory, PCIe,
and related-components will be accelerated in lockstep. Please note that an improper hyper­speed setting may impede the stability of your machine. The options are Disabled, Level 1,
and Level 2.

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Super X11DPU-X/-XLL User's Manual

Performance Tuning (For X11DPU-XLL only)

Cores Enabled

Use this item to select how man CPU cores will be enabled. For example: if the CPU has 8
cores, then 1 to 8 cores can be enabled and the values available would be 0,1,2,3,4,5,6 and

7. The value chosen equals to the number of cores enabled, henceforth, selecting "3" would

enable three cores and selecting "5" would enable ve cores. The only exception to this is

selecting "0" which enables all cores. The default value is: 0 (all cores).

Hyper-Speed

Use this item to select the hardware acceleration level of the machine. CPU, Memory, PCIe,
and related-components will be accelerated in lockstep. Please note that an improper hyper­speed setting may impede the stability of your machine. The options are Disabled, Level 1,
and Level 2.

Hyper-Turbo

Use this item to select the level to maximize the power of the Turbo-Mode feature embedded
in the CPU. Please note that an improper hyper-turbo setting may impede the stability of your
machine. The options are Enabled Disabled.



Boot Feature

Quiet Boot

Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

Note: POST message is always displayed regardless of the item setting.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are O󰀨 and On.

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.

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Chapter 4: BIOS

INT19 Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB support

EHCI needs to be supported in order for USB 2.0 to work properly during the installation
of Windows 7; however EHCI support was removed from Intel Skylake Platforms. When
enabled, this feature will allow USB keyboard and mouse to work properly during installation
of Windows 7. After installation of Windows 7 and all the drivers please disable this feature.
The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Disabled and Enabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for

the system power to remain o󰀨 after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system
to resume its last power state before a power loss. The options are Power-On,
Stay-O󰀨 and Last State.

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Super X11DPU-X/-XLL User's Manual

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4

Seconds Override for the user to power o󰀨 the system after pressing and holding the power
button for 4 seconds or longer. Select Instant O󰀨 to instantly power o󰀨 the system as soon

as the user presses the power button. The options are Instant O󰀨 and 4 Seconds Override.

Throttle on Power Fail

When enabled, this feature decreases system power by throttling CPU frequency when power
supply has failed. The options are Disabled and Enabled.



CPU Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.



Processor Conguration

The following CPU information will be displayed:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

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Chapter 4: BIOS

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Disabled and Enabled.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where

it cannot, thus preventing a worm or a virus from ooding illegal codes to overwhelm the

processor, damaging the system during a virus attack. The options are Disable and Enable.
(Refer to Intel and Microsoft websites for more information.)

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI

tables. This feature o󰀨ers fully-protected I/O resource-sharing across the Intel platforms,

providing the user with greater reliability, security and availability in networking and data­sharing. The settings are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

Hardware Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Enable and Disable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Enable and
Disable.

Note: Please power o󰀨 and reboot the system for the changes you've made to take
e󰀨ect. Please refer to Intel’s website for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data
streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing
and processing for CPU performance enhancement. The options are Enable and Disable.

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Super X11DPU-X/-XLL User's Manual

DCU IP Prefetcher

If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

LLC Prefetch

If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.

Extended APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Disable and Enable.

Advanced Power Management Conguration

Power Technology

This feature allows for switching between stored CPU Power Management proles. The
options are Disable, Energy E󰀩cient and Custom.

CPU P State Control

SpeedStep (PStates)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an e󰀨ort to reduce power consumption and heat

dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.

EIST PSD Function (Available when SpeedStep is set to Enable)

Use this item to congure the processor's P-State coordination settings. During a P-State,

the voltage and frequency of the processor will be reduced when it is in operation. This

makes the processor more energy e󰀩cient, resulting in further energy gains. The options

are HW_ALL, SW_ALL and SW-ANY.

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Chapter 4: BIOS

Turbo Mode (Available when SpeedStep is set to Enable)

Select Enable for processor cores to run faster than the frequency specied by the

manufacturer. The options are Disable and Enable.

Hardware PM (Power Management) State Control

Hardware P-States

If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Disable
and Enable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned o󰀨. The options are Disable,
Enable, Auto.

Enhanced Halt State (C1E)

Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the

CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

Package C State Control

Package C State

Use this feature to set the limit on the C-State package register. The options are C0/C1
state, C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.

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Super X11DPU-X/-XLL User's Manual

CPU T State Control

Software Controlled T-States

Select Enable to support Software Controlled Throttling states for CPUs installed on the
motherboard. Such throttling states control the running time of CPUs with the goal of cooling
down CPUs and preventing them from burning out. The options are Disable and Enable.

Chipset Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

UPI (Ultra Path Interconnect) Conguration

This section displays the following UPI General Conguration information:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI PCI-E Conguration Base/Size

Degrade Precedence

Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in

conict. Select Feature Precedent to degrade UPI topology if system options are in conict.

The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.

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Chapter 4: BIOS

Link L1 Enable

Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.

IO Directory Cache

Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,
Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

SNC

Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into
clusters based on address range. Each cluster is connected to a subset of the memory
controller. Enabling SNC improves average latency and reduces memory access congestion
to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on IMC
interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The options
are Disable, Enable, and Auto.

XPT Prefetch

XPT Prefetch speculatively makes a copy to the memory controller of a read request being
sent to the LLC. If the read request maps to the local memory address and the recent
memory reads are likely to miss the LLC, a speculative read is sent to the local memory
controller. The options are Disable and Enable.

KTI Prefetch

KTI Pretech enables memory read to start early on a DDR bus, where the KTI Rx path
will directly create a Memory Speculative Read command to the memory controller. The
options are Disable and Enable.

Local/Remote Threshold

This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal, which
handles hardware interruptions. The features are Disable, Enable, Auto, Low, Medium,
and High.

Stale AtoS

This feature optimizes A to S directory. When all snoop responses found in directory A
are found to be RspI, then all data is moved to directory S and is returned in S-state. The
options are Disable, Enable, and Auto.

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Super X11DPU-X/-XLL User's Manual

LLC dead line alloc

Select Enable to optimally ll dead lines in LLC. Select Disable to never ll dead lines in

LLC. The options are Disable, Enable, and Auto.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.

Memory Conguration

Enforce POR

Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The
options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.

Data Scrambling for NVDIMM

Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are Auto, Disable, and Enable.

Data Scrambling for DDR4

Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. The options are Auto, Disable, and Enable.

tCCD_L Relaxation

If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column
to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.
The options are Disable and Auto.

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.

2X Refresh

This option allows the user to select 2X refresh mode. The options are Auto, Enabled, and
Disabled. The options are Auto and Enable.

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Chapter 4: BIOS

Page Policy

This feature allows the user to determine the desired page mode for IMC. When Auto is
selected, the memory controller will close or open pages based on the current operation.
Closed policy closes that page after reading or writing. Adaptive is similar to open page

policy, but can be dynamically modied. The default is Auto.

IMC Interleaving

This feature allows the user to congure Integrated Memory Controller (IMC) Interleaving

settings.The options are Auto, 1-way Interleave, and 2-way Interleave.

Turn o󰀨 Memory Error LED

This feature allows the user to turn o󰀨/on the Memory Error LED indicator on the next

system reset. The options are Do Nothing or Yes, Next reset.

Memory Topology

This item displays the information of onboard memory modules as detected by the
BIOS.

• P1 DIMMA1

• P1 DIMMB1

• P1 DIMMC1

• P1 DIMMD1

• P1 DIMME1

• P1 DIMMF1

• P2 DIMMA1

• P2 DIMMB1

• P2 DIMMC1

• P2 DIMMD1

• P2 DIMME1

• P2 DIMMF1

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Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Disable and Enable.

Mirror Mode

Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode, which
will create a duplicate copy of data stored in the memory to increase memory security, but
it will reduce the memory capacity into half. The options are Disable, Mirror Mode 1LM
and Mirror Mode 2LM.

UEFI ARM Mirror

Select Enable to support the UEFI-based address range mirroring with setup option. The
options are Disable and Enable. The options are Disable and Enable.

Memory Rank Sparing

Select Enable to support memory-rank sparing to optimize memory performance. The
options are Disable and Enable.

Note: This item will not be available when memory mirror mode is enabled.

Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.

SDDC Plus One

Select Enable for SDDC (Single Device Data Correction) Plus One support, which will
increase the reliability and serviceability of your system memory. The options are Disable
and Enable.

ADDDC (Adaptive Double Device Data Correction) Sparing

Select Enable for ADDDC sparing support to enhance memory performance. The options
are Disable and Enable.

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Chapter 4: BIOS

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache line
every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Disable and Enable.

Patrol Scrub Interval

Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.

Note: This item is hidden when Patrol Scrub item is set to Disable.

IIO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.

CPU1 Conguration

IOU0 (IIO PCIe Br1)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

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MCP1 (IIO PCIe Br5)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

AOC-2UR68-i4G SLOT3

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

AOC-2UR68-i4G SLOT1

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

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Chapter 4: BIOS

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

CPU1 PcieBr2D02F0 - Port 2C

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

CPU1 PcieBr2D02F0 - Port 2D

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

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• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for a

PCI-E device specied by to user to enhance system performance. The options are 128B,

256B and Auto.

RSC-R2UW-2E8E16+ SLOT1

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

CPU2 Conguration

IOU0 (IIO PCIe Br1)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

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Chapter 4: BIOS

IOU1 (IIO PCIe Br2)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

MCP1 (IIO PCIe Br5)

This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

P2_NVMe0

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

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P2_NVMe1

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

AOC-2UR68-i4G SLOT2

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

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Chapter 4: BIOS

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

RSC-R1UW-2E16 SLOT2

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The options

are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Clocking

The options are Distinct and Common.

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value for

a PCI-E device specied by to user to enhance system performance. The options are

128B, 256B and Auto.

IOAT Conguration

Disable TPH (TLP Processing Hint)

TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are No and Yes.

Prioritize TPH (TLP Processing Hint)

Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.

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Super X11DPU-X/-XLL User's Manual

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain transactions to
violate the strict-ordering rules of PCI and to be completed prior to other transactions that
have already been enqueued. The options are Disable and Enable.

Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR

ACPI tables. This feature o󰀨ers fully-protected I/O resource sharing across Intel platforms,

providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.

PassThrough DMA

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.

ATS

Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d
engine to enhance system performance. The options are Enable and Disable.

Posted Interrupt

Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve

virtualization e󰀩ciency by simplifying interrupt migration and lessening the need of physical

interrupts. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.

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Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU1

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT6 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe­cic root port. The options are Disable and Enable.

Chapter 4: BIOS

CPU SLOT4 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1D. The options
are Disable and Enable.

VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT5 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)

Select Enable to use the Intel Volume Management Device Technology for this spe­cic root port. The options are Disable and Enable.

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Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 2A~2D. The options
are Disable and Enable.

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT2 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

CPU SLOT1 PCI-E 3.0 X4 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 3A~3D. This will allow
the user to replace the components without shutting down the system. The options
are Disable and Enable.

Intel® VMD for Volume Management Device on CPU2

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT3 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)

Select Enable to enable hot plug support for the Intel Volume Management Device
Technology for this specic root port. The options are Disable and Enable.

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Chapter 4: BIOS

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 3A~3D. The options
are Disable and Enable.

IIO-PCIE Express Global Options

PCI-E Completion Timeout Disable

Select Enable to enable PCI-E Completion Timeout support for electric tuning. The op­tions are Yes, No, and Per-Port.

South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.

XHCI Hand-O󰀨

This is a work-around solution for operating systems that do not support XHCI (Extensible

Host Controller Interface) hand-o󰀨. The XHCI ownership change should be claimed by the

XHCI driver. The options are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Disabled and Enabled.

PCIe PLL SSC

Use this feature to enable PCIE PLL spread spectrum clocking (SSC). The options are
Disable and Enable.

Server ME (Management Engine) Conguration

This feature displays the following General ME Conguration settings.

Operational Firmware Version

Backup Firmware Version

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Recovery Firmware Version

ME Firmware Status #1

ME Firmware Status #2

Current State

Error Code



PCH SATA Conguration (For X11DPU-X only)

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.

Congure SATA as (Available when the item above: SATA Controller is set to

enabled)

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Enable and Disable.

SATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

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Chapter 4: BIOS

SATA Port 0 - SATA Port 7

Hot Plug

Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA

port specied by the user to start a COMRESET initialization. The options are Enable and

Disable.

SATA Device Type

Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.



PCH sSATA Conguration (For X11DPU-X only)

When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the sSATA controller and displays the following items:

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI

and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

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Support Aggressive Link Power Management

When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 - sSATA Port 5

Hot Plug

Select Enable to support Hot-plugging for the device installed on an sSATA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the

sSATA port specied by the user to start a COMRESET initialization. The options are

Enable and Disable.

sSATA Device Type

Use this item to specify if the device installed on the sSATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Disabled and Enabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Disabled and
Enabled.

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Chapter 4: BIOS

MMIO High Base

Use this item to select the base memory size according to memory-address mapping for the
IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
48T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

PCI PERR/SERR Support

Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Disabled and Enabled.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned

to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.

NVMe Firmware Source

This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned

to PCI devices. The options are Vendor Dened Firmware and AMI Native Support.

VGA Priority

Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Auto, Onboard and O󰀨board.

RSC-R1UW-2E16 SLOT(1-2) PCI-E X16 OPROM

Select Disabled to deactivate the selected slots, Legacy to activate the slot in legacy mode,
and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.

AOC-2UR68-i4G SLOT2/3/1 PCI-E 3.0 x16/x8 OPROM

Select Disabled to deactivate the selected slots, Legacy to activate the slot in legacy mode,
and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.

Onboard LAN Option ROM Type

Use this to select rmware type to be loaded for onboard LANs. The options are Legacy
and EFI.

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Onboard LAN(1-4) Option ROM

Use this to select rmware function to be loaded for onboard LAN(1-4). The options are

Disabled, PXE and iSCSI.

Onboard NVME1/NVME2/NVME3/NVME4 Option ROM

Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware Interface)

device installed on the NVME connector specied by the user. Select Legacy to allow the
user to boot the computer using a legacy device installed on the NVME connector specied

by the user. The options are Disabled, Legacy and EFI.

Onboard Video Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled,
Legacy and EFI.

Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Disabled and Enabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Disabled and Enabled.

Ipv6 PXE Support

Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.

Ipv6 HTTP Support

Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.

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Chapter 4: BIOS

Media Detect Count

Select this to assign the number of times presence of media will be checked. The default is 1.

Super IO Conguration

Super IO Chip AST2500

Serial Port 1 Conguration

Serial Port 1

Select Enabled to enable the onboard serial port specied by the user. The options are

Disabled and Enabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial

port specied by the user.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to

a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Conguration

Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options are

Disabled and Enabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial

port specied by the user.

Note: This item is hidden when Serial Port 2 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specied. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;

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Super X11DPU-X/-XLL User's Manual

IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h;
IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are SOL and COM.

Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options
are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for conguration:

Console Redirection Settings (for COM1)

Terminal Type

Use thid feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8 and ANSI.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

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