Supermicro X11DPU, X11DPG-QT, X11DPX-T User Manual

X11DPU

USER’S MANUAL

Revision 1.0

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0

Release Date: August 10, 2017

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DPU motherboard.

About This Motherboard

The Super X11DPU motherboard supports dual Intel® Xeon® scalable processors (in Socket
P). With the Intel® C621 chipset built-in, this motherboard supports RDIMM/LRDIMM/
NVDIMM DDR4 ECC memory of up to 2666 MT/s in 24 slots with four NVMe slots onboard.
The X11DPU provides maximum performance, system cooling, and PCI-E capacity, and is
ideal for WIO server platforms. Please note that this motherboard is intended to be installed
and serviced by professional technicians only. For processor/memory updates, please refer
to our website at http://www.supermicro.com/products/.

Manual organization

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel® C621 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C contains UEFI BIOS Recovery instructions.

Appendix D lists standardized warning statements in various languages.

3

Super X11DPU User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

1.1 Processor and Chipset Overview .......................................................................................18

1.2 Special Features ................................................................................................................18

Recovery from AC Power Loss .........................................................................................18

1.3 System Health Monitoring ..................................................................................................19

Onboard Voltage Monitors ................................................................................................19

Fan Status Monitor with Firmware Control .......................................................................19

Environmental Temperature Control .................................................................................19

System Resource Alert......................................................................................................19

1.4 ACPI Features ....................................................................................................................19

1.5 Power Supply .....................................................................................................................20

1.6 Super I/O ............................................................................................................................20

1.7 Advanced Power Management ..........................................................................................20

Intel® Intelligent Power Node Manager (IPNM).................................................................20

Management Engine (ME) ................................................................................................21

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................22

Precautions .......................................................................................................................22

Unpacking .........................................................................................................................22

2.2 Motherboard Installation .....................................................................................................23

Tools Needed ....................................................................................................................23

Location of Mounting Holes ..............................................................................................23

Installing the Motherboard.................................................................................................24

2.3 Processor and Heatsink Installation ...................................................................................25

The Intel 81xx/61xx/51xx/41xx/31xx Series Processors ...................................................25

Overview of the Processor Socket Assembly ...................................................................26

Overview of the Processor Heatsink Module (PHM) ........................................................27

Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the

Processor Package Assembly ...........................................................................................28

Attaching the F Model Processor to the Narrow Processor Clip to Create the Processor

Package Assembly ............................................................................................................29

Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the

5

Super X11DPU User's Manual

Processor Heatsink Module (PHM) ...................................................................................30

Attaching the F Model Processor Package Assembly to the Heatsink to Form the

Processor Heatsink Module (PHM) ...................................................................................31

Preparing the CPU Socket for Installation ........................................................................32

Removing the Dust Cover from the CPU Socket .............................................................32

Installing the Processor Heatsink Module (PHM) ............................................................33

Installing an HFI Carrier Card for Host Fabric Interface (HFI) Support as Needed

(Available when the F Model CPU is Used) .....................................................................34

Removing the Processor Heatsink Module (PHM) from the Motherboard .......................35

2.4 Memory Support and Installation .......................................................................................36

Memory Support ................................................................................................................36

DIMM Module Population Conguration ...........................................................................36

DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx Series Processors ..37

DIMM Installation ..............................................................................................................40

DIMM Removal .................................................................................................................40

2.5 Rear I/O Ports ....................................................................................................................41

2.6 Front Control Panel ............................................................................................................45

2.7 Connectors .........................................................................................................................49

Power Connections ...........................................................................................................49

Headers .............................................................................................................................50

2.8 Jumper Settings .................................................................................................................58

How Jumpers Work ...........................................................................................................58

2.9 LED Indicators ....................................................................................................................61

2.10 NVM Express Connections ...............................................................................................64

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................65

3.2 Technical Support Procedures ...........................................................................................69

3.3 Frequently Asked Questions ..............................................................................................70

3.4 Battery Removal and Installation .......................................................................................71

3.5 Returning Merchandise for Service ....................................................................................72

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................73

Starting the Setup Utility ...................................................................................................73

6

Preface

4.2 Main Setup .........................................................................................................................74

4.3 Advanced Setup Congurations .........................................................................................76

4.4 Event Logs .......................................................................................................................110

4.5 IPMI ..................................................................................................................................112

4.6 Security .............................................................................................................................115

4.7 Boot ..................................................................................................................................118

4.8 Save & Exit .......................................................................................................................120

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................124

B.2 SuperDoctor® 5 .................................................................................................................125

Appendix C UEFI BIOS Recovery

Appendix D Standardized Warning Statements

Battery Handling ..............................................................................................................131

Product Disposal .............................................................................................................133

7

Super X11DPU User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an acknowledged leader
in the industry. Supermicro motherboards are designed with the utmost attention to detail to
provide you with the highest standards in quality and performance.

The X11DPU motherboard was designed to be used with a Supermicro-proprietary chassis
as an integrated server platform. It is not to be used as a stand-alone product and will not
be shipped independently in a retail box. No motherboard shipping package will be provided
in your shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website

for possible updates to the manual revision level.

8

Figure 1-1. X11DPU Motherboard Image

Chapter 1: Introduction

Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

9

Super X11DPU User's Manual

JPB1

LED_P2_F1

P2_NVMe1

LED_P2_F2

LED_P2_E1

LED_P2_E2

LED_P2_D1

P2_NVMe0

LED_P2_D2

Figure 1-2. X11DPU Motherboard Layout

(not drawn to scale)

IPMI_LAN

USB0/1

SXB1A

SXB1B

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

CPU2_PORT3C

VGA

SXB2

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

JTPM1

S-SATA0~3

USB3/4 (3.0)

GPU PWR3

GPU PWR4

LED1

LEDM1

S-UM12

I-SATA0~3

JUIDB2

UID

PCH

JHFI2

LED_P2_A2

BMC

JSDCARD1

I-SATA4~7

GPU PWR2

LED_P2_A1

COM1

JPG1

S-SATA4

LED_P2_B2

JIPMB1

JVGA2

BT1

JBT1

S-SATA5

JSD1JSD2

USB2 (3.0)

DESIGNED IN USA

X11DPU

REV:1.10

BAR CODE

LED_P2_B1

JVRM2

LED_P2_C2

JVRM1

LED_P2_C1

JRK1

SP1

JWD1

LAN
CTRL

IPMI CODE

LED_P1_F1

BIOS
LICENSE

LED_P1_F2

(3.0)

LED_P1_E1

LED_P1_E2

SXB3A

SXB3B

CPU1_PORT2C

LED_P1_D1

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

LED_P1_D2

SXB3C

JHFI1

JNVI2C1

PSU2

GPU PWR1

P1_NVMe0 P1_NVMe1

LED_P1_A2

PSU1

BP PWR4

BP PWR3

LED_P1_A1

LED_P1_B2

LED_P1_B1

BP PWR2 BP PWR1

LED_P1_C2

LED_P1_C1

T-SGPIO3

JF1

PWR

ON

RST

FAIL

PS

LED

UID NIC

2 1

NIC

LED

HDD PWR

LED

X NMI

JNVI2C2

JF1

LEDPWR

JL1

FAN8

CPU2

CPU1

P1-DIMMF2

P1-DIMMF1

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

P2-DIMMD2

P2-DIMMD1

FAN4

FAN6

FAN7

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

FAN3

FAN5

Note: Components not documented are for internal testing only.

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

FAN2

FAN1

10

Quick Reference

SXB1A

SXB2

SXB1B

SXB1C

S-SATA0~3

S-SATA4

USB3/4

LED_P2_E1

LED_P2_F2

LED_P2_F1

GPU PWR3

P2_NVMe0

LED_P2_E2

LED_P2_D2

LED_P2_D1

P2_NVMe1

LEDM1

CPU2_PORT1A

JSDCARD1

CPU2_PORT3C

CPU2_PORT3A

PCH_PORT1 CPU2_DMI

JTPM1

CPU2_PORT2C CPU2_PORT2A

I-SATA0~3

GPU PWR4

LED1

UID

VGA

I-SATA4~7

JSD2

JHFI2

GPU PWR2

LED_P2_A2

COM1

BT1

JBT1

JSD1

DESIGNED IN USA

X11DPU

REV:1.10

LED_P2_B2

LED_P2_B1

LED_P2_A1

IPMI_LAN

SP1

JWD1

JVRM2

S-SATA5

USB2

BAR CODE

LED_P1_F1

LED_P2_C2

LED_P2_C1

USB0/1

JRK1

JVRM1

BIOS
LICENSE

IPMI CODE

LED_P1_E1

LED_P1_F2

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

SXB3C

LED_P1_E2

LED_P1_D2

LED_P1_D1

JIPMB1
JPG1

JVGA2

SXB3A

SXB3B

JHFI1

JNVI2C1

GPU PWR1

Chapter 1: Introduction

P1_NVMe0

P1_NVMe1

PSU1PSU2

LED_P1_B1

LED_P1_C1

LED_P1_C2

BP PWR2
BP PWR1

T-SGPIO3

BP PWR4
BP PWR3

LED_P1_A2

LED_P1_B2

LED_P1_A1

JNVI2C2

JF1

LEDPWR

CPU2

JF1

PWR

ON

RST

FAIL

PS

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

X NMI

CPU1

JL1

FAN6

FAN7FAN8

FAN4

FAN1FAN2

FAN3FAN5

P2-DIMME2

P2-DIMME1

P2-DIMMF2

P2-DIMMF1

P2-DIMMD1

P2-DIMMD2

P2-DIMMB1

P2-DIMMB2

P2-DIMMA1

P2-DIMMA2

P2-DIMMC2

P1-DIMMF2

P1-DIMMF1

P2-DIMMC1

P1-DIMME2

P1-DIMME1

P1-DIMMD2

P1-DIMMD1

P1-DIMMA2

P1-DIMMC1

P1-DIMMC2

P1-DIMMB1

P1-DIMMB2

P1-DIMMA1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-

nections.

• " " indicates the location of Pin 1.

• Components/jumpers/LED indicators not documented are reserved for internal testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

11

Super X11DPU User's Manual

Quick Reference Table

Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JWD1 Watch Dog Pins 1-2 (Reset)

Connector Description

BP PWR1/2/3/4 8-pin Power Connectors 1/2/3/4 for Backplane Use

BT1 Onboard Battery

COM1 COM Port (COM1) on the I/O Backplane

FAN1 ~ FAN8 System/CPU Fan Headers

GPU PWR1/2/3/4 8-pin Power Connectors 1/2/3/4 Used for GPU Devices

IPMI_LAN Dedicated IPMI LAN Port

I-SATA0~3, I-SATA4~7 Intel® PCH SATA 3.0 Ports (0-3, 4-7)

JF1 Front Control Panel Header

JHFI1/JHFI2

(*Notes below)

JIPMB1 4-pin BMC External IC Header (for an IPMI card)

JL1 Chassis Intrusion Header

JNVI2C1/2 VPP Headers for NVMe Add-on Cards 1 & 2

JRK1 RAID_Key for Onboard NVMe Devices

JSD1/JSD2 SATA DOM Power Connectors 1/2

JSDCARD1 Micro SD Card Slot

JTPM1 Trusted Platform Module/Port 80 Connector

JUIDB2 UID (Unit Identier) Switch

JVGA2 Front VGA Port

JVRM1/JVRM2 VRM I2C headers

P1_NVMe0/1 & P2_

NVMe0/1

PSU1/PSU2 Power Supply Unit (PSU) Connector 1/Power Supply Unit Connector 2

S-SATA0~3 SATA 3.0 Ports 0~3 Supported by Intel® SCU Chip

S-SATA4/S-SATA5 SATA3.0 Ports with Power-pin Built-in w/support of SuperDOM (Device-On Module)

SP1 Internal Speaker/Buzzer

SXB1A/SXB1B/SXB1C

SXB2 PCI-E 3.0 x8 (in x16) Slot Supported by CPU2 for Center Right Riser Card Support

SXB3A/SXB3B/SXB3C PCI-E 3.0 (x16 + x16 + x8) Slot from CPU1 for Far_right Ultra Riser (SAS3 AOM & LAN options)

Host Fabric Interface (HFI) sideband connection headers used for the HFI carrier card (when the F

model processor is used) (JHFI1: for CPU1, JHFI2: for CPU2)

Non-Volatile Memory Express (NVMe) 3.0 Devices 0/1 Supported by CPU1 & CPU2

PCI-E 3.0 (x16 + x16) Slot Supported by CPU2 for SMCI- Proprietary Riser Card (w/left riser card

support)

Notes: 1. For the HFI sideband carrier card to function properly, please install the HFI
card to an appropriate PCI-E slot of your choice, and install an F model processor in
the CPU socket. 2. Connect an HFI cable from the HFI card to JHFI (HFI headers)
and connect an IFP cable from the HFI card to the processor. (See Pages 34 and 52
in Chapter 2 for more information.)

12

Chapter 1: Introduction

Connector Description

T-SGPIO3 Serial_Link General Purpose I/O header for S-SATA4/5

USB0/1 Backplane Universal Serial Bus (USB) 3.0 Ports 0/1

USB3/4 Front Accessible USB 3.0 Header for USB 3/4 Connections

USB2 USB 3.0 Type A Header

VGA VGA Port

LED Description Status

LED1 UID (Unit Identier) LED Solid Blue: Unit Identied

LEDM1 BMC Heartbeat LED Blinking Green: BMC Normal

LEDPWR Onboard Power LED Solid Green: Power On

Memory LED Description Status

LED_P1_A1/LED_P1_A2

LED_P1_B1/LED_P1_B2

LED_P1_C1/LED_P1_C2

LED_P1_D1/LED_P1_D2

LED_P1_E1/LED_P1_E2

LED_P1_F1/LED_P1_F2

LED_P2_A1/LED_P2_A2

LED_P2_B1/LED_P2_B2

LED_P2_C1/LED_P2_C2

LED_P2_D1/LED_P2_D2

LED_P2_E1/LED_P2_E2

LED_P2_F1/LED_P2_F2

Memory Fault LEDs for Memory Module P1_A1/

Memory Module P1_A2

Memory Fault LEDs for Memory Module P1_B1/

Memory Module P1_B2

Memory Fault LEDs for Memory Module P1_C1/

Memory Module P1_C2

Memory Fault LEDs for Memory Module P1_D1/

Memory Module P1_D2

Memory Fault LEDs for Memory Module P1_E1/

Memory Module P1_E2

Memory Fault LEDs for Memory Module P1_F1/

Memory Module P1_F2

Memory Fault LEDs for Memory Module P2_A1/

Memory Module P2_A2

Memory Fault LEDs for Memory Module P2_B1/

Memory Module P2_B2

Memory Fault LEDs for Memory Module P2_C1/

Memory Module P2_C2

Memory Fault LEDs for Memory Module P2_D1/

Memory Module P2_D2

Memory Fault LEDs for Memory Module P2_E1/

Memory Module P2_E2

Memory Fault LEDs for Memory Module P2_F1/

Memory Module P2_F2

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

Solid Red: Memory Error Occurs

13

Super X11DPU User's Manual

Motherboard Features

Motherboard Features

CPU

• Dual Intel® Xeon® scalable processors (in Socket P); Dual Intel® Xeon® processor with Intel® Omni-Path Fabric

Note 1: The Intel® Xeon® Processor Scalable Family includes Intel® Xeon® Platinum 8100 processor, Intel® Xeon®

Gold 6100/5100 processor, Intel® Xeon® Silver 4100 processor, and Intel® Xeon® Bronze 3100 processor.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Memory

• Integrated memory controller supports up to 768 GB or 1.5 TB of Load Reduced DIMM (LRDIMM), Registered DIMM

(RDIMM), DDR4 (288-pin) ECC 2666/2400/2133 MT/s modules in 24 slots

Note: The memory capacity support will differ according to the SKUs.

DIMM Size

• Up to 128 GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel® C621

Expansion Slots

• One (1) PCI Express 3.0 (x16 + x16) slot supported by CPU2 for left riser card use (SXB1A/SXB1B/SXB1C)

• One (1) Express 3.0 x8 in x16 slot supported by CPU2 (SXB2) for center right hand riser card use

• One (1) PCI Express 3.0 (x16 + x16 + x8) slot supported by CPU1 for far_right ultra riser card (used for SAS3 AOM

expansion and LAN options via ultra riser) (SXB3A/SXB3B/SXB3C)

Non Volatile Memory Express (NVMe) Slots

• Four (4) NVMe PCI-E slots (P1-NVMe1/P1-NVMe2 supported by CPU1 & P2-NVMe1/P2-NVMe2 supported by CPU2)

• RAID 0/1/5/10 using Intel® VROC (option RAID key)

BaseBoard Management Controller (BMC)

• ASpeed AST 2500 Baseboard Controller (BMC) supports IPMI 2.0

• One (1) IPMI_dedicated_LAN located on the rear IO backpanel

Graphics

• Graphics controller via AST 2500 BMC

Note: The table above is continued on the next page.

14

Chapter 1: Introduction

Motherboard Features

I/O Devices

• Serial (COM) Port • One (1) Fast UART 16550 port on the I/O back panel

• Eight (8) SATA 3.0 connections supported by Intel® PCH (I-SATA 0-3, 4-7)

• SATA 3.0

• Four (4) SATA 3.0 connections supported by Intel® SCU (S-SATA 0-3)

• Two (2) SATA 3.0 ports with power-pin built-in, w/support of Supermicro

SuperDOM (S-SATA4/S-SATA5)

• RAID (PCH) • RAID 0/1/5/10 (RSTe 5.0)

Peripheral Devices

• Two (2) USB 3.0 ports on the rear I/O panel (USB 0/1)

• One (1) internal USB 3.0 header with two (2) USB connections on the motherboard for front access (USB 3/4)

• One (1) Type A USB 3.0 connector for front access (USB 2)

BIOS

• 64 MB SPI AMI BIOS

• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, and

SMBIOS 2.7 or later

®

SM Flash UEFI BIOS

Power Management

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 4.0 (available when the Supermicro Power Manager [SPM] is installed and a

special power supply is used. See the note on page 22.)

• Management Engine (ME)

System Health Monitoring

• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, CPU core, memory, chipset, BMC, PCH,

and battery voltages

• CPU System LED and control

• CPU Thermal Trip support

• Status monitor for speed control

• Status monitor for on/off control

• CPU Thermal Design Power (TDP) support of up to 165W (See Note 1 on next page.)

Fan Control

• Fan status monitoring via IPMI connections

• Dual cooling zone

• Low-noise fan speed control

• Pulse Width Modulation (PWM) fan control

System Management

• Trusted Platform Module (TPM) support

• PECI (Platform Environment Control Interface) 2.0 support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5, Watch Dog, NMI

• Chassis intrusion header and detection

Note: The table above is continued on the next page.

15

Super X11DPU User's Manual

LED Indicators

• CPU/Overheating

• Fan Failure

• UID/remote UID.

• HDD activity. LAN activity.

Dimensions

• 17.00" (L) x 16.80" (W) (431.80 mm x 426.72 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and

heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Motherboard Features

Note 3: It is strongly recommended that you change BMC log-in information upon initial

system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf

16

Figure 1-3.

System Block Diagram

Chapter 1: Introduction

DDR4

VGA

32MB BMC
SPI FLASH

32MB BIOS
SPI FLASH

x8

x4

UPI

TPM
Header

Upper

Lower

x4

10.4G/11.2G T/s
Polarity Inversion

G

#1

#2

WIO

x4

P2_NVMe2P2_NVMe1

x4

8GB/s

32GB/s

#1

#1

#1

#2

#2

L

M

DDR4 DIMM

DDR4 DIMM

PE1

#2

DMI

K

DDR4 DIMM

Upper

x16

Lower

x16

32GB/s

32GB/s

PE2 PE3 UPI1 UPI0

CPU 1 CPU 0

VCCP1 12v

VR13
5+1 PHASE
165W

DDR3

VGA

SPI COM1

PE LPC/eSPI

SPI USB

MUX

SPI

x4

PE [0..3]

USB2.0 [8,9,10,12,13]

#1

#2

H

DDR4 DIMM

DDR4 DIMM

BMC

AST2500

HWM

USB2.0 [6,7]

LPC/eSPIPE [5]

SATA Gen3 [0..3]

SATA Gen3 [4..7]

sSATA Gen3 [0..3]

sSATA Gen3 [4,5]

PCH

USB3.0 [1,2,3,4,6]

#1

#2

J

DDR4 DIMM

UART

DMI

NCSI

LAN

PHY

RTL8211F

port 0,1

REAR

#1

#2

F

DDR4 DIMM

JS1

I-SATA0~3

JS2

I-SATA4~7

JS3

S-SATA0~3

S-SATA4

S-SATA5

#1

DDR4 DIMM

port 3

E

IPMI LAN

RJ45

P1_NVMe1

P1_NVMe2

port 4,5

FRONTTYPE-A

#1

#2

8GB/s

D

DDR4 DIMM

x4

x4

x8

3bit

5bit

32GB/s

32GB/s

32GB/s

PE1 PE2 PE3 UPI1 UPI0

DMI

VCCP0 12v

VR13
5+1 PHASE
165W

Ultra IO

x8

x8

x8

x8

UPI

Port A

NIC

Port A 0~7

Port B

Port B 0~7

Port B

Port B 8~15

NCSI

Port C

Port C 0~10

Port C

Port C 11~15

10.4G/11.2G T/s
Polarity Inversion

A

#1

#2

B

DDR4 DIMM

#1

#1

#2

#2#2

C

DDR4 DIMM

DDR4 DIMM

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

17

Super X11DPU User's Manual

1.1 Processor and Chipset Overview

Built upon the functionality and capability of the Intel® Xeon® scalable processors (in Socket
P) and the Intel® C621 chipset, the X11DPU motherboard provides system performance,

power efciency, and feature sets to address the needs of next-generation computer users.

This motherboard is ideal for general purpose, cloud computing, and is optimized for server
platforms used in data centers.

With support of the new Intel® Omni-Path Fabric support, the X11DPU drastically increases
system performance for a multitude of server applications.

The Intel® C621 chipset provides Enterprise SMbus support and includes the following
features:

• DDR4 288-pin memory support on Socket P

• Support for MCTP Protocol

• Support for Management Engine (ME)

• Support of SMBus speeds of up to 400KHz for BMC connectivity

• Improved I/O capabilities to high-storage-capacity congurations

• SPI enhancements

• Intel® Node Manager 4.0 for advanced power monitoring, capping, and management for

BMC enhancement

• The BMC supports remote management, virtualization, and the security package for en-

terprise platforms

Note: Node Manager 4.0 support is dependent on the power supply used in the system.

1.2 Special Features

This section describes the health monitoring features of the X11DPU motherboard. The
motherboard has an onboard ASpeed 2500 Baseboard Management Controller (BMC) that
supports system health monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

18

Chapter 1: Introduction

1.3 System Health Monitoring

This section describes the health monitoring features of the X11DPU motherboard. The
motherboard has an onboard Baseboard Management Controller (BMC) chip that supports
system health monitoring. Once a voltage becomes unstable, a warning is given or an error

message is sent to the screen. The user can adjust the voltage thresholds to dene the

sensitivity of the voltage monitor.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. The user

can adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time

readings of these voltage levels are all displayed in BIOS.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of

the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be

turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

1.4 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.

19

Super X11DPU User's Manual

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with
Windows server 2012/R2 and Windows server 2016 operating systems.

1.5 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas

where noisy power transmission is present, you may choose to install a line lter to shield

the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.

1.6 Super I/O

The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power

Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

1.7 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power

management for maximum energy efciency. Although IPNM Specication Version 2.0/3.0

is supported by the BMC (Baseboard Management Controller), your system must also have

IPNM-compatible Management Engine (ME) rmware installed to use this feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

20

Chapter 1: Introduction

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.

21

Super X11DPU User's Manual

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the motherboard from the antistatic bag.

• Handle the motherboard by its edges only; do not touch its components, peripheral chips,

memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

22

Chapter 2: Installation

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

X NMI

PWR

ON

JF1

RST

PS

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

CPU2_PORT3C

REV:1.10

2.2 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Tools Needed

Philips
Screwdriver
(1)

Philips Screws
(14)

Standoffs (14)
Only if Needed

Location of Mounting Holes

Note: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary

measures to avoid damaging these components when installing the motherboard to
the chassis.

23

Super X11DPU User's Manual

Installing the Motherboard

1. Install the I/O shield into the back of the chassis.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert Pan head #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or
components might look different from those shown in this manual.

24

Chapter 2: Installation

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should

be assembled together rst to form the Processor Heatsink Module (PHM), and then install

the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

The Intel 81xx/61xx/51xx/41xx/31xx Series Processors

Note: The 81xx/61xx/51xx/41xx/31xx processors contain two models-the F model pro-

cessors and the Non-F model processors. The installation instructions for the F model
processors differ from the installation instructions for the Non-F model processors. For
this reason, two sets of instructions (one for the F model, and the other, for the Non­F model) are provided in this section.

Intel Processor (Non-F Model) Intel Processor (F Model)

Note: All graphics, drawings, and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same
as those shown in this manual.

25

Super X11DPU User's Manual

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx processor,

2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.

1. The 81xx/61xx/51xx/41xx/31xx
Processor

(The 81xx/61xx/51xx/41xx/31xx Processor)

2. Narrow processor clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

(for the non-F Model)

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

26

Chapter 2: Installation

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) the 81xx/61xx/51xx/41xx/31xx processor.

1. Heatsink

2. Narrow processor clip

3. Intel Processor

Processor Heatsink Module (PHM)

(Bottom View for the non-F Model) (Bottom View for the F Model)

27

Super X11DPU User's Manual

A

Allow Notch B to
latch on to CPU

Attaching the Non-F Model Processor to the Narrow Processor
Clip to Create the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and

sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

C

Align Notch C of the CPU
and Notch C of the Processor Clip

B

Allow Notch C to
latch on to CPU

A

Pin 1

C

C

B

CPU/Heatsink Package
(Upside Down)

B

A

Processor Package Carrier (w/CPU mounted

on the Processor Clip)

28

Chapter 2: Installation

Attaching the F Model Processor to the Narrow Processor Clip
to Create the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and

sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch C of the CPU
and Notch C of the Processor Clip

Align Notch B of the CPU
and Notch B of the Processor Clip

C

B

Align CPU Pin 1

D

A

Pin 1

Align Notch D of the CPU
and Notch D of the Processor Clip

D

C

B

CPU/Heatsink Package
(Upside Down)

A

Allow Notch D to
latch on to CPU

D

Processor Package Carrier (w/CPU mounted on the

Processor Clip)

29

C

Allow Notch C to
latch on to CPU

Allow Notch B to
latch on to CPU

B

A

Super X11DPU User's Manual

Attaching the Non-F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of the thermal grease

as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

Triangle on the CPU

Triangle on the
Processor Clip

Non-Fabric CPU and Processor Clip

(Upside Down)

b

d

B

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

snap onto the heat sink’s

B

c

C

mounting holes

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

30

D

A

On Locations (A, B), the notches
snap onto the heatsink’s sides

C

Make sure Mounting

Notches snap into place

Chapter 2: Installation

Attaching the F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of the thermal grease

as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

Fabric CPU and Processor Clip

(Upside Down)

b

3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

Triangle on the CPU

Triangle on the
Processor Clip

d

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

B

D

A

On Locations (A, B), the notches
snap onto the heatsink’s sides

c

B

C

snap onto the heat sink’s

mounting holes

C

Make sure Mounting

Notches snap into place

31

Super X11DPU User's Manual

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dusk Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

CPU Socket

32

Chapter 2: Installation

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 29 or page 30, you are ready to install the processor heatsink
module (PHM) into the CPU socket on the motherboard. To install the PHM into the
CPU socket, follow the instructions below.

2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the

corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,

turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)

3. Carefully align pin 1 (the triangle) on the PHM against pin 1 (the triangle) on the CPU
socket.

4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.

5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

33

Super X11DPU User's Manual

1. Install the F model CPU(s)

B

C

Installing an HFI Carrier Card for Host Fabric Interface (HFI)
Support as Needed (Available when the F Model CPU is Used)

Note: Two host fabric interface carrier card headers (JHFI1/JHFI2) are located on

the motherboard. Install an HFI card on an appropriate PCI-E slot of your choice and
F model CPU(s) on CPU socket(s) to use this feature. (For more information on the
JHFI1/JHFI2 headers, please refer to page 51.)

Installation Instructions

1. Locate CPU socket(s) on the motherboard. Install the F model CPU(s) on this socket as
shown below (marked 1. below) if you have not done so.

2. Locate the PCI-E slots. Install an Host Fabric Interface (HFI) card on an appropriate
PCI-E slot of your choice as shown below (marked 2. below).

3. Connect the HFI connector(s) (marked C) on the HFI cable to the onboard JHFI
header(s) as show below (marked 3. below.)

4. Connect the other end of the HFI cable to the connector (marked A) on the HFI card as
shown below. (marked 4. below.)

5. Connect the plug (marked 5. below) on one end of the Internal_Faceplate_to_the_
Processor (IFP) cable to the connector (marked B) on the HFI card as shown below.

6. Connect the other end of IFP cable (marked 6. below) to the F model CPU installed in
the CPU socket as shown below.

IFP Cable (Optional)

6. Connect the other end of
the IFP cable to the

4. Connect another end of
the HFI Y cable to the
connector (A)
of the HFI card.

HFI Carrier

Card

HFI (Host Fabric

Interface) Sideband

Y Cable

5. Connect one end of
the IFP cable to the
connector (B)

A

of the HFI card.

2. Install
an HFI card to
a PCI-E slot.

F model CPU.

JHFI2 Header
(for CPU2)

F Model

Processor

CPU2_PORT3C

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

DESIGNED IN USA

X11DPU

REV:1.10

JHFI2

on CPU socket(s).

BIOS
LICENSE

IPMI CODE

BAR CODE

CPU1_PORT1A

JHFI1 Header

CPU1_PORT3A

(for CPU1)

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

JHFI1

3. Connect the HFI connector(s) (C)
on the HFI Y cable to the
onboard JHFI header(s).

34

JF1
PWR

ON

RST

FAIL
PS

LED

UIDNIC

2 1

NIC

LED

HDDPWR

LED

XNMI

CPU2

CPU1

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,

1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in
the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

35

Super X11DPU User's Manual

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules. Exercise

extreme care when installing or removing DIMM modules to prevent any damage.

Memory Support

The X11DPU supports up to 1536 GB of Load Reduced DIMM (LRDIMM),
Registered DIMM (RDIMM), Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC
2666/2400/2133/1866/1600/1333 MT/s modules in 24 slots memory slots. Populating

the DDR4 memory module in 2DPC system conguration on this MBD will affect memory

bandwidth performance. Populating these DIMM modules with a pair of memory modules
of the same type and size will result in interleaved memory, which will improve memory
performance.

Notes: 1. Be sure to use the memory modules of the same type and speed on the
motherboard. Mixing of memory modules of different types and speeds is not allowed.

2. When installing memory modules, be sure to populate the rst DIMM module on
the blue memory slot, which is the rst memory slot of a memory channel, and then
populate the second DIMM in the black slot if 2DPC memory conguration is used. 3.

Using unbalanced memory topology by populating two DIMMs in one channel while
populating one DIMM in another channel will result in reduced memory performance.

4. Memory speed is dependent on the type of processors used in your system. 5.
Using unbalanced memory topology such as populating two DIMMs in one channel
while populating one DIMM in another channel on the same motherboard will result in

reduced memory performance.

DIMM Module Population Conguration

For optimal memory performance, follow the table below when populating memory.

DDR4 Memory Support for the Intel Xeon Scalable Processor Platform

Ranks

Type

RDIMM SRx4 8 GB 16 GB 2666 2666

RDIMM SRx8 4 GB 8 GB 2666 2666

RDIMM DRx8 8 GB 16 GB 2666 2666

RDIMM DRx4 16 GB 32 GB 2666 2666

RDIMM 3Ds

LRDIMM QRx4 32 GB 64 GB 2666 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666 2666

8RX4 N/A 4H-128GB 2666 2666

QRX4 N/A 2H-64GB 2666 2666

8Rx4 N/A 4H-128 GB 2666 2666

DIMM Capacity

(GB)

4 Gb 8 Gb 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

2 Slots per Channel

1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)

36

Chapter 2: Installation

DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx
Series Processors

For optimal memory performance, follow the tables below when populating memory modules.

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),

D (1RX8), E (2RX8)

• 3DS RDIMM Raw Cards: A/B (4RX4)

• non-3DS LRDIMM Raw Cards: D/E (4RX4)

• 3DS LRDIMM Raw Cards: A/B (8RX4)

General Population Requirements

DIMM Mixing Rules

• Please populate all memory modules with DDR4 DIMMs only.

• X4 and X8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across

different sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across

different sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed NotAllowed Allowed

37

Super X11DPU User's Manual

(DDR4 Only) Socket Level Population Requirements

• There should be at least one DDR4 DIMM per socket.

• If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.

• Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.

(DDR4 Only) Memory Populations with Possible Mixes

DDR4 RDIMM DIMM0/DIMM1

Within

IMC

DIMM

Popula-

tion

3DS LRDIMM or 3DS RDIMM DIMM0/DIMM1 Cong. Set A Possible Mixes

Within IMC

DIMM Popu-

DDR0 x8, None, x8, x8 x4, None, x4, x4 x8, x4, or x4, x8 Single Rank, None

DDR1 None or same as

DDR2 None or same as

DDR1 (excludes

DIMM 1 in 5DIMM

(DDR4 Only) Memory Populations with Possible Mixes

DDR0 x4, None, x4, x4 Quad Rank, None

lation

DDR1 None or same as DDR0

DDR2 None or same as DDR1

DDR4 Socket Level Minimum Population Requirements

Cong. Set A

DDR0

congurations)

DIMM0/DIMM1

Cong. Set B

None or same as

DDR0

None or same as

DDR1 (excludes

DIMM 1 in 5DIMM

congurations)

DIMM0/DIMM1 Con-

g. Set C

None or same as

DDR0

None or same as

DDR1 (excludes DIMM

1 in 5DIMM congura-

tions)

Possible Mixes

DIMM0/DIMM1

Single Rank, Single Rank

Dual Rank, Single Rank,

Dual Rank, None

Dual Rank, Dual Rank,

Single Rank, Single Rank

DIMM0/DIMM1

Quad Rank, Quad Rank

Cannot mix 3DS LRDIMM and RDIMM

LRDIMMs DIMM0/DIMM1 Possible Mixes

Within IMC

DIMM Popu-

lation

DIMM Population

within an IMC

(Note: Uniformly

populate with x8
DRAMs DIMMs)

DIMM Population

within an IMC

(Note: Non-equal

in rank pair of x8

DIMMs)

(DDR4 Only) Memory Populations with Possible Mixes

DIMM0/DIMM1

DDR0 x4, None, x4, x4 Quad Rank, None

DDR1 None or same as DDR0

DDR2 None or same as DDR1

Quad Rank, Quad Rank

Note: Requirements
*Match DIMM types installed across DDR

channels within an IMC

*Always populate iMC0 rst

(DDR4 Only) 2SPC Memory Conguration with x8 DIMMs

Total # of

DIMMs

1 x8 DIMM Must be installed on iMC0 DDR Channel 0 1 N/A

2 x8 DIMMs DDR0: Populate with 1 DIMM

3 x8 DIMMs DDR0: Populate with 1 DIMM

4 x8 DIMMs DDR0: Populate with 2 DIMMs

5 x8 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x8 DIMMs Populate 2 DIMMs per DDR channel x SVLS

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1

(5DIMMs)

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

DDR0: Populate with 1 DIMM

mance)

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1

of Ranks

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

Virtual

Lock Step

38

DIMM Popula­tion within an

IMC

Note: Uniformly

populate with x4

DRAMs/DIMMs

Chapter 2: Installation

(DDR4 Only) 2SPC Memory Conguration with x4 DIMMs

Total # of

DIMMs

1 x4 DIMM Must be installed on iMC0 DDR Channel 0 1 Y, only Bank VLS

2 x4 DIMMs DDR0: Populate with 1 DIMM

3 x4 DIMMs DDR0: Populate with 1 DIMM

4 x4 DIMMs DDR0: Populate with 2 DIMMs

5 x4 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x4 DIMMs Populate 2 DIMMs per DDR channel x Y

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

of Ranks

Adaptive Virtual

Lock Step

>1 Y

1 Y, only Bank VLS

>1 Y

1 Y, only Bank VLS

>1 Y

x Y

>1 Y

DIMM Popula­tion within an

IMC

Note: Non-

equal in rank

pair of x4

DIMMs)

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1
(5DIMMs)

DDR0: Populate with 1 DIMM

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

mance)

DDR1

>1 Y

>1 Y

x Y

>1 Y

(DDR4 Only) 2SPC Memory Conguration with x8/x4 DIMMs Mixed

DDR4 RDIMM Total # of DIMMs DDR Channel ADDC/SDDC

DIMM Popula-

tion within an

IMC

1 pair of x8, x4 DDR0: Populate with 1 DIMM

2 pairs of x8, x4 Populate with 1 pair of DIMMs on DDR0,

3 pairs of x8, x4 A pair of DIMMs on DDR0, and identical pair on

DDR1: Populate the second DIMM (for best perfor-

mance)

and identical pair on DDR1

DDR1, and DDR2

Features

No

No

No

39

Super X11DPU User's Manual

DIMM Installation

1. Insert the desired number of DIMMs into
the memory slots, starting with P1-DIMM
A1. For the system to work properly,
please use memory modules of the same
type and speed on the motherboard.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.

CPU2_PORT1A

CPU2_PORT3C

CPU2_PORT3A

PCH_PORT1 CPU2_DMI

CPU2_PORT2C CPU2_PORT2A

JF1
PWR

ON

RST

FAIL
PS

LED

UIDNIC

2 1

NIC

LED

HDDPWR

LED

XNMI

CPU2

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

DESIGNED IN USA

BIOS

X11DPU

LICENSE

REV:1.10

IPMI CODE

BAR CODE

CPU1

Notches

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

DIMM Removal

Reverse the steps above to remove the DIMM
modules from the motherboard.

Release Tabs

Press both notches

straight down into

the memory slot.

40

Chapter 2: Installation

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

CPU2_PORT3C

REV:1.10

2.5 Rear I/O Ports

See Figure 2-2 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

Figure 2-2. I/O Port Locations and Denitions

2

1

3

4

Rear I/O Ports

# Description

1. USB 0 (3.0)

2. USB 1 (3.0)

3. IPMI Dedicated LAN

4. COM Port 1

5. VGA

5

41

Super X11DPU User's Manual

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

CPU2_PORT3C

REV:1.10

VGA Port

One VGA port is located next to COM Port 1 on the I/O back panel. Use this connection for
VGA display.

Serial Port

There is one COM port (COM1) on the I/O back panel on the motherboard. This COM port

provides serial communication support. See the table below for pin denitions.

COM Port

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

1

2

1. VGA Port

2. COM Port 1

2

1

42

Chapter 2: Installation

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

CPU2_PORT3C

REV:1.10

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB0/1) located on the I/O back panel. The motherboard also
has a front access USB 3.0 header that supports two USB connections (USB3/4). A USB
Type A header (USB2), located next to GPU PWR2, provides also USB 3.0 support. The
onboard headers can be used to provide front side USB access with a cable (not included).

Back Panel USB (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 10 Power

2 D- 11 USB 2.0 Differential Pair

3 D+ 12

4 Ground 13 Ground of PWR Return

5 StdA_SSRX- 14 SuperSpeed Receiver

6 StdA_SSRX+ 15 Differential Pair

7 GND_DRAIN 16 Ground for Signal Return

8 StdA_SSTX- 17 SuperSpeed Transmitter

9 StdA_SSTX+ 18 Differential Pair

2
1

Front Panel USB 3.0

Header Pin Denitions

Pin# Denition Pin# Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 Ground

1. USB0 (3.0)

2. USB1 (3.0)

3. USB3/4 (USB 3.0)

4. Type A USB2 (USB 3.0)

3

4

2

1

43

Super X11DPU User's Manual

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

FAIL

LED

UIDNIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

CPU1_PORT1A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

CPU2_PORT3C

REV:1.10

Power Button

OH/Fan Fail LED

1

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

UID LED

Ground

Ground

19 20

3.3V

X

Ground

NMI

X

Vcc

Vcc

X

X NIC2 Activity LED

NIC1 Activity LED

Unit Identier Switch/UID LED Indicator

A rear Unit Identier (UID) switch (JUIDB2) and an rear LED Indicator (LED1) are located

on the rear side of the system. The front UID LED is located on Pin 7 of the Front Control
Panel (JF1). When you press the UID switch, both front and rear UID LED indicators will be
turned on. Press the UID switch again to turn off the LEDs. The UID Indicators provide easy

identication of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

UID Switch

Pin Denitions

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

Color Status

Blue: On Unit Identied

UID LED

Pin Denitions

3

IPMI LAN Port

An IPMI_Dedicated LAN that supports Gigabit LAN is located next to USB 0/1 ports on the
back panel. This LAN port is supported by the onboard AST 2500 BMC and accepts an RJ45
type cable. Refer to the LED Indicator Section for LAN LED information.

Note: For additional LAN connections, please install an appropriate Ultra riser card on
Slot SXB3A/3B/3C. Please refer to the AOC list posted at http://www.supermicro.com/
support/resources/aoc/aoc_compatibility_ultra.cfm for more information.

LAN Ports

Pin Denitions

Pin# Denition Pin# Denition

1 P2V5SB 10 SGND

2 TD0+ 11 Act LED

3 TD0- 12 P3V3SB

TD1+

4

1

2

4

1. UID

2. IPMI_LAN

3. Front UID LED

TD1-

5

6 TD2+ 15 Ground

7 TD2- 16 Ground

8 TD3+ 17 Ground

Link 100 LED (Yellow,

13

+3V3SB)

Link 1000 LED (Yel-

14

low, +3V3SB)

9 TD3- 18 Ground

4. LED1

2

44

Chapter 2: Installation

T-SGPIO3

JPB1

19 20

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

IPMI_LAN

USB0/1

JNVI2C2

LED_P2_F1

P2_NVMe1

LED_P2_F2

LED_P2_E1

LED_P2_E2

LED_P2_D1

LED_P2_D2

P2_NVMe0

SXB1A

SXB1B

SXB1C

VGA

SXB2

LEDM1

CPU2_PORT1A

CPU2_PORT3C

CPU2_PORT3A

PCH_PORT1 CPU2_DMI

JTPM1

CPU2_PORT2C CPU2_PORT2A

S-SATA0~3

USB3/4 (3.0)

GPU PWR3

GPU PWR4

LED1

S-UM12

I-SATA0~3

PCH

JHFI2

LED_P2_A2

UID

BMC

I-SATA4~7

JPG1

JSDCARD1

S-SATA4

GPU PWR2

LED_P2_B2

LED_P2_A1

JIPMB1

JVGA2

BT1

JBT1

S-SATA5

JSD1JSD2

USB2 (3.0)

DESIGNED IN USA

X11DPU

REV:1.10

BAR CODE

LED_P2_B1

COM1

JUIDB2

LED_P2_C2

JVRM2

JVRM1

LED_P2_C1

(3.0)

LAN
CTRL

CPU1_PORT1A

IPMI CODE

LED_P1_F1

BIOS
LICENSE

LED_P1_F2

LED_P1_E1

LED_P1_E2

SXB3A

SXB3B

LED_P1_D1

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

LED_P1_A2

PSU1

BP PWR4

BP PWR3

LED_P1_A1

LED_P1_B2

LED_P1_B1

LED_P1_C2

BP PWR2 BP PWR1

LED_P1_C1

PSU2

CPU1_PORT2C

SXB3C

JHFI1

JNVI2C1

P1_NVMe0 P1_NVMe1

GPU PWR1

LED_P1_D2

JRK1

SP1

JWD1

JF1

LEDPWR

JF1

PWR

ON

RST

FAIL

PS

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

X NMI

JL1

FAN8

P2-DIMMF1

P2-DIMMF2

P2-DIMME1

P2-DIMME2

P2-DIMMD2

P2-DIMMD1

CPU2

P1-DIMMF1

FAN7

FAN6

FAN5

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

P1-DIMMF2

P1-DIMME1

P1-DIMME2

FAN4

P1-DIMMD1

P1-DIMMD2

CPU1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMA1

FAN3

FAN2

FAN1

Figure 2-3. JF1 Header Pins

2

1

Power Button

Reset Button

3.3V

UID LED

PWR

Reset

Ground

Ground

Power Fail LED

OH/Fan Fail LED

X NIC2 Activity LED

X

Vcc

Vcc

X

NIC1 Activity LED

HDD LED

FP PWRLED

X

NMI

Ground

45

Super X11DPU User's Manual

NMI Button

The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the

table below for pin denitions.

Power LED

Pin Denitions (JF1)

Pin# Denition

19 NMI

20 Ground

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pin# Denition

15 Vcc

16 FP PWR LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable here to indicate
the status of HDD-related activities, including IDE, SATA activities. See the table below for

pin denitions.

Power LED

Pin Denitions (JF1)

Pin# Denition

13 Vcc

14 HDD LED

2

Power Button

Reset Button

PWR

Reset

1

Ground

Ground

1. NMI

2. FP PWR LED

3. HDD LED

3.3V

UID LED

X NIC2 Activity LED

X

Vcc

Power Fail LED

OH/Fan Fail LED

NIC1 Activity LED

HDD LED

3

Vcc

X

NMI

1

19 20

FP PWRLED

X

Ground

2

46

Chapter 2: Installation

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pin 12 of
JF1, and LAN port 2 is on pin 10. Attach the NIC LED cables here to display network activity.

Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

10 NIC2 Activity LED

12 NIC1 Activity LED

UID/Overheat (OH)/Fan Fail

Connect an LED cable to UID/OH/Fan Fail connections on pins 7 and 8 of JF1 to provide
front UID LED indication and warnings for chassis overheat/fan failure. Refer to the table

below for pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

7 Front UID LED

8 OH/Fan Fail LED

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

1. NIC1 LED

2. NIC2 LED

3. Front UID LED

4. OH/Fan Fail LED

5. PWR Fail LED

Power Button

Reset Button

UID LED

3

2

1

PWR

Reset

3.3V

X NIC2 Activity LED

Ground

Ground

Power Fail LED

OH/Fan Fail LED

5

4

2

X

Vcc

Vcc

X

NMI

19 20

NIC1 Activity LED

HDD LED

FP PWRLED

X

Ground

1

47

Super X11DPU User's Manual

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/off the system. This button can also be congured to function as a suspend

button (with a setting in the BIOS - see Chapter 4). To turn off the power in the suspend

mode, press the button for at least 4 seconds. Refer to the table below for pin denitions.

Power Button

2

Reset Button

1

3.3V

UID LED

2

1

PWR

Reset

X NIC2 Activity LED

X

Vcc

Vcc

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC1 Activity LED

HDD LED

FP PWRLED

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

1. Reset Button

2. Power Button

X

NMI

19 20

X

Ground

48

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

2.7 Connectors

Power Connections

SMCI-Propietary Main Power Supply Units

Two SMCI-proprietary main power supply units are located at PSU1 & PSU2. Connect
appropriate power supply units to these two headers to provide adequate power to your
system.

Backplane Power Connectors & GPU Power Connectors

In addition to the two SMCI-proprietary main power supply units located at PSU1/PSU2, eight
8-pin power connectors are also located on the motherboard to supply power to onboard
devices. GPU Power Connectors 1-4 are used for GPU devices, while BP PWR 1-4 are used
for backplane devices. Connect these connectors to your power supply to provide adequate
power to your onboard devices.

Warning: To provide adequate power to your system and to avoid damaging the power sup­ply or the motherboard, be sure to connect all power connectors mentioned above to the
power supply. Failure in doing so may void the manufacturer warranty on your power supply
and motherboard.

8-pin GPU Power

Pin Denitions

Pin# Denition

1 - 3 +12V

4 - 8 Ground

8-pin Backplane Power

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 6 +12V

7 - 8 +5V

1. PSU1 (Required)

2. PSU2 (Required)

3. BP PWR1 (Required)

10

9

2

8

7

1

6

5

4

3

4. BP PWR2 (Required)

5. BP PWR3 (Required)

6. BP PWR4 (Required)

7. GPU PWR1 (Required)

8. GPU PWR2 (Required)

9. GPU PWR3 (Required)

10. GPU PWR4 (Required)

49

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

Headers

Fan Headers

There are eight fan headers on the motherboard. These are 4-pin fan headers; pins 1-3
are backward compatible with traditional 3-pin fans. The onboard fan speeds are controlled
by Thermal Management (via Hardware Monitoring) in the BIOS. When using Thermal
Management setting, please use all 3-pin fans or all 4-pin fans.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

Internal Speaker/Buzzer

The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep

codes. See the table below for pin denitions.

7

6

8

Internal Buzzer

Pin Denitions

Pin# Denition

1 Pos (+) Beep In

2 Neg (-) Alarm Speaker

9

4

50

1. FAN1

2. FAN2

3. FAN3

4. FAN4

5. FAN5

6. FAN6

7. FAN7

8. FAN8

9. Internal Speaker

35

12

Chapter 2: Installation

JPB1

Host Fabric Interface (HFI) Carrier Card Sideband Headers (for the F Model CPU
Only)

Two Host Fabric Interface (HFI) carrier card headers are located at JHFI1/JHFI2 on the
motherboard. The JHFI headers are used when the F model processor is installed on the
CPU socket on the motherboard. Use an HFI sideband cable to connect the carrier card to the
JHFI headers, and use an appropriate IFP (Internal-Faceplate-to-Processor) cable (optional)
to connect the carrier card to the F model processor to enhance system performance (See
Note below). See page 34 for the installation instructions. Please note that in a dual-processor
system, JHFI1 is used for CPU1, and JHFI2 is for CPU2. Refer to the table below for the
pin-out descriptions.

Note: For the HFI carrier card to function properly, please purchase the appropriate
IFP cable from Supermicro. Please refer to Supermicro's website at www.supermicro.

com for the part number of the IFP cable specied for your system.

JNVI2C2

LED_P2_F1

LED_P2_F2

P2_NVMe1

LED_P2_E1

LED_P2_E2

HFI Carrier Card Sideband Header

Pin# Denition Pin# Denition

1 Ground 2 SMB_HFI_0_SCL

3 HFI0_MODPRST_N 4 SMB_HFI_0_SDA

5 LED_HFI0_N 6 HFI0_RESET_N

7 Ground 8 HFI0_INT_N

9 Ground 10 SMB_HFI_1_SCL

11 HFI1_MODPRST_N 12 SMB_HFI_1_SDA

13 LED_HFI1_N 14 HFI1_RESET_N

15 Ground 16 HFI1_INT_N

17 Reserved 18 P3V3

19 P2V5_PWRGD 20 P3V3

21 P2V5 22 PCIe_SMBCLK

23 Ground 24 PCIe_SMBDAT

P2_NVMe0

LED_P2_D2

LED_P2_D1

SXB1B

SXB1A

SXB1C

VGA

LED1

SXB2

LEDM1

CPU2_PORT1A

S-UM12

CPU2_PORT3C

CPU2_PORT3A

PCH_PORT1 CPU2_DMI

JTPM1

CPU2_PORT2C CPU2_PORT2A

S-SATA0~3

I-SATA0~3

USB3/4 (3.0)

GPU PWR3

GPU PWR4

2

PCH

JUIDB2

JHFI2

UID

BMC

LED_P2_A2

JSDCARD1

I-SATA4~7

GPU PWR2

LED_P2_A1

IPMI_LAN

USB0/1

JIPMB1

JVGA2

BT1

JBT1

S-SATA5

USB2 (3.0)

DESIGNED IN USA

X11DPU

REV:1.10

BAR CODE

LED_P2_B1

LED_P2_C2

JVRM2

JVRM1

LED_P2_C1

(3.0)

LAN
CTRL

CPU1_PORT1A

SXB3A

JRK1

CPU1_PORT3A

SXB3B

CPU1_PORT3C CPU1_PORT2A

SP1

JWD1

CPU1_PORT2C

BIOS
LICENSE

IPMI CODE

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

COM1

JPG1

S-SATA4

JSD1JSD2

LED_P2_B2

SXB3C

PSU2

JHFI1

JNVI2C1

1

Pin Denitions

PSU1

BP PWR4

P1_NVMe0 P1_NVMe1

GPU PWR1

LED_P1_A2

BP PWR3

LED_P1_A1

LED_P1_B2

LED_P1_B1

LED_P1_C2

BP PWR2 BP PWR1

1. JHFI1 (for CPU1)

2. JHFI2 (for CPU2)

LED_P1_C1

T-SGPIO3

JF1

LEDPWR

JF1

PWR

ON

RST

FAIL

PS

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

JL1

FAN8

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

P2-DIMMD2

P2-DIMMD1

CPU2

FAN6

FAN7

FAN5

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

P1-DIMMF2

P1-DIMMF1

P1-DIMME1

FAN4

P1-DIMMD1

P1-DIMME2

P1-DIMMD2

CPU1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMA1

FAN3

FAN2

FAN1

51

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

T-SGPIO3 Header

A Serial General Purpose Input/Output header (T-SGPIO3) is located on the motherboard.
This header is used to communicate with the enclosure management chip on the backplane.

See the table below for pin denitions.

SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 DATA Out

5 Load 6 Ground

7 Clock 8 NC

NC = No Connection

Disk-On-Module Power Connector

The Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to a
solid-state DOM storage devices connected to one of the SATA ports. See the table below

for pin denitions.

DOM Power

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

1. T-SGPIO3

2. JSD1

23

3. JSD2

1

52

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

TPM Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from a third-party vendor. A TPM/Port 80 connector is a security device that supports
encryption and authentication in hard drives. It allows the motherboard to deny access if the
TPM associated with the hard drive is not installed in the system. See the table below for

pin denitions.

Trusted Platform Module/Port 80 Header

Pin Denitions

Pin# Denition Pin# Denition

1 P3V3 2 SPI_TPM_CS_N

3 PCIE_RESET_N# 4 SPI_PCH_MISO

5 SPI_PCH_CLK# 6 Ground

7 SPI_PCH_MOSI 8 N/A

9 JTPM1_P3V3A 10 IRQ_TPM_SPIN_N

1. TPM/Port 80 Header

1

53

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

4-pin BMC External I2C Header

A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect a cable to this
header to use the IPMB I2C connection on your system. See the table below for pin denitions.

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to the header to inform you when the chassis is opened.

Chassis Intrusion

Pin Denitions

Pins Denition

1 Intrusion Input

2 Ground

2

1

1. BMC External I2C
Header

2. Chassis Intrusion

54

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

I-SATA 3.0 and S-SATA 3.0 Ports

The X11DPU has eight I-SATA 3.0 ports (I-SATA0~3, I-SATA4~7) which are supported by
the Intel® C621 chipset. In addition, it also has six S-SATA 3.0 ports (S-SATA0~3, S-SATA4/
S-SATA5) that are supported by the Intel® SCU. S-SATA4/5 can be used with Supermicro
SuperDOMs which are yellow SATA DOM connectors with power pins built in, and do not
require external power cables. Supermicro SuperDOMs are backward-compatible with regular
SATA HDDs or SATA DOMs that need external power cables. All these SATA ports provide
serial-link signal connections, which are faster than the connections of Parallel ATA.

SATA 3.0 Port

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

1. I-SATA0-3

2. I-SATA4-7

3. S-SATA0-3

1 2

5

4

3

4. S-SATA4

5. S-SATA5

55

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

RAID Key Header

A RAID_Key header is located at JRK1 on the motherboard. RAID key is used to support
onboard NVMe connections. Please refer to the layout below for the location.

RAID Key Header

Pin Denitions

Pin# Denition

1 Ground

2 RAID_KEY_PU

3 Ground

4 PCH_RAID_KEY

Front VGA Port

One VGA port is located at JVGA2 on the motherboard. This VGA port provides front
accessible video display. Please refer to the layout below for JVGA2 location

2

1. RAID Key

2. Front VGA Port

1

56

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

Micro SD Card Slot

Insert a micro SD memory card into the expansion slot at JSDCARD1 for additional memory
or OS image. Please refer to the layout below for the location.

NVMe I2C Header

JNVI2C1 and JNVI2C2 are management headers for the Supermicro AOC NVMe PCI-E
peripheral cards. Please connect the I2C cable to the connector.

1

2

2

1. Micro SD Card Slot

2. NVMe I2C Header

57

Super X11DPU User's Manual

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional

settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram
below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper

consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JBT1 contact pads

58

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

VGA Enable/Disable

JPG1 allows you to enable or disable the VGA port supported by the onboard graphics
controller. The default setting is Enabled.

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

1

1. VGA Enable/Disable

2. CMOS Clear

2

59

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.

Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

I2C Bus for VRM

Jumpers JVRM1 and JVRM2 allow the BMC or the PCH to access CPU and memory VRM

controllers. See the table below for jumper settings.

VRM

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC (Normal)

Pins 2-3 PCH

1. Watch Dog

2. JVRM1

3

1

2

3. JVRM2

60

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

2.9 LED Indicators

IPMI-Dedicated LAN LEDs

A dedicated IPMI LAN is also included on the motherboard. The amber LED on the right of
the IPMI LAN port indicates activity, while the green LED on the left indicates the speed of
the connection. See the table below for more information.

IPMI LAN LEDs

Color Status Denition

IPMI LAN

Off Off

Activity LEDLink LED

Green:

Solid

Amber

Blinking

Link/Speed

(Left)

Activity

(Right)

Unit ID LED

A rear UID LED indicator at LED1 is located near the UID switch on the I/O back panel. This

UID indicator provides easy identication of a system unit that may need service.

No

Connection

100 Mb/s

Active

UID LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

2

1

1. IPMI-Dedicated LAN LED

2. UID LED

1

61

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

Onboard Power LED

LEDPWR is an Onboard Power LED. When this LED is lit, it means that power is present
on the motherboard. In suspend mode, this LED will blink on and off. Be sure to turn off the
system and unplug the power cord(s) before removing or installing components.

Onboard Power LED Indicator

LED Color Denition

System Off

Off

(power cable not

connected)

Green System On

BMC Heartbeat LED

LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

1. Onboard Power LED

2

2. BMC Heartbeat LED

1

62

Chapter 2: Installation

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

Memory Fault Indication LEDs

The memory fault LEDs provide visual notication to a service technician which memory

DIMM slot(s) are at fault due to un-correctable memory errors during POST (Power-On Self­Test). A memory fault LED will remain "on" even after system reboots (or repeated "power
cycling") until it is reset manually by the technician using the BIOS setup menu to turn it off.
This feature allows the technician to easily identify and replace any bad DIMMs that may be
at fault in the system.

Memory Fault LED Indicators

LED

LED_P1_A1-A2 Memory Fault LEDs for Memory Module P1_A1-A2 Red: on (memory errors)

LED_P1_B1-B2 Memory Fault LEDs for Memory Module P1_B1-B2 Red: on (memory errors)

LED_P1_C1-C2 Memory Fault LEDs for Memory Module P1_C1-C2 Red: on (memory errors)

LED_P1_D1-D2 Memory Fault LEDs for Memory Module P1_D1-D2 Red: on (memory errors)

LED_P1_E1-E2 Memory Fault LEDs for Memory Module P1_E1-E2 Red: on (memory errors)

LED_P1_F1-F2 Memory Fault LEDs for Memory Module P1_F1-F2 Red: on (memory errors)

LED_P2_A1-A2 Memory Fault LEDs for Memory Module P2_A1-A2 Red: on (memory errors)

LED_P2_B1-B2 Memory Fault LEDs for Memory Module P2_B1-B2 Red: on (memory errors)

LED_P2_C1-C2 Memory Fault LEDs for Memory Module P2_C1-C2 Red: on (memory errors)

LED_P2_D1-D2 Memory Fault LEDs for Memory Module P2_D1-D2 Red: on (memory errors)

LED_P2_E1-E2 Memory Fault LEDs for Memory Module P2_E1-E2 Red: on (memory errors)

LED_P2_F1-F2 Memory Fault LEDs for Memory Module P2_F1-F2 Red: on (memory errors)

Description Status

1. LED_P1_A1-A2

2. LED_P1_B1-B2

6 5 4

987

1 32

11

12

10

3. LED_P1_C1-C2

4. LED_P1_D1-D2

5. LED_P1_E1-E2

6. LED_P1_F1-F2

7. LED_P2_A1-A2

8. LED_P2_B1-B2

9. LED_P2_C1-C2

10. LED_P2_D1-D2

11. LED_P2_E1-E2

12. LED_P2_F1-F2

63

Super X11DPU User's Manual

PSU2

PSU1

X11DPU

DESIGNED IN USA

BAR CODE

IPMI CODE

CPU2

CPU1

BIOS
LICENSE

COM1

LAN
CTRL

LED_P1_D2

LED_P1_D1

LED_P1_E2

LED_P1_E1

LED_P1_F2

LED_P1_F1

LED_P1_A2

LED_P1_A1

LED_P1_C2

LED_P1_B1

LED_P1_B2

LED_P1_C1

LED_P2_F2

LED_P2_F1

LED_P2_E2

LED_P2_E1

LED_P2_D2

LED_P2_D1

LED_P2_C2

LED_P2_C1

LED_P2_B2

LED_P2_B1

LED_P2_A2

LED_P2_A1

JRK1

S-UM12

JVGA2

BT1

JBT1

JL1

JUIDB2

JF1

JPG1

JVRM1

JWD1

FAN8

FAN7

FAN6

FAN5

FAN4

FAN3

FAN2

FAN1

JIPMB1

JNVI2C1

JNVI2C2

SP1

JSD1JSD2

T-SGPIO3

LED1

LEDM1

LEDPWR

JVRM2

JTPM1

SXB3B

SXB1B

SXB2

FAIL

LED

UID NIC

2 1

NIC

LED

HDDPWR

LED

XNMI

PWR

ON

JF1

RST

PS

P2_NVMe1

P2_NVMe0

P2-DIMMF2

P2-DIMMF1

P2-DIMME1

P2-DIMME2

SXB1A

CPU2_PORT3A

CPU2_PORT2C CPU2_PORT2A

SXB1C

P2-DIMMD2

P2-DIMMD1

CPU2_PORT1A

PCH_PORT1 CPU2_DMI

USB3/4 (3.0)

S-SATA0~3

S-SATA4

P2-DIMMA2

S-SATA5

P2-DIMMA1

UID

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

I-SATA0~3

P2-DIMMC1

I-SATA4~7

GPU PWR2

USB2 (3.0)

P1-DIMMF2

SXB3C

P1-DIMMF1

CPU1_PORT1A

SXB3A

CPU1_PORT3A

CPU1_PORT3C CPU1_PORT2A

CPU1_PORT2C

P1-DIMMD1

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMA2

P1-DIMMA1

P1-DIMMC1

P1-DIMMC2

P1-DIMMB2

P1-DIMMB1

P1_NVMe0 P1_NVMe1

BP PWR4

VGA

IPMI_LAN

USB0/1

(3.0)

BMC

JSDCARD1

PCH

GPU PWR3

GPU PWR4

GPU PWR1

BP PWR2 BP PWR1

BP PWR3

CPU2_PORT3C

JPB1

REV:1.10

JHFI2

JHFI1

2.10 NVM Express Connections

NVM Express Connections

Four NVM Express ports are located on the motherboard. These NVM ports provide
PCI-Exp. 3.0 x4 connections. P1_NVME0/1 are supported by CPU1. P2_NVME0/1 are
supported by CPU2. The NVM Express ports provide high-speed low-latency connections
directly from the CPU to NVMe Solid State (SSD) drives. This greatly increases SSD data-

throughput performance and signicantly reduces PCI-E latency by simplifying driver/software

requirements resulting from direct PCI-E interface from the CPU to the NVMe SSD drives.

4 3

1. P1_NVME0

2. P1_NVME1

3. P2_NVME0

4. P2_NVME1

1 2

64

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the

motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully

seated.)

7. Use the correct type of onboard CMOS battery (CR2032) as recommended by the
manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

65

Super X11DPU User's Manual

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and

contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

66

Chapter 3: Troubleshooting

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

67

Super X11DPU User's Manual

3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

68

Chapter 3: Troubleshooting

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

69

Super X11DPU User's Manual

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X11DPU motherboard supports up to 64 GB of DDR4 2400 MHz ECC UDIMM

memory. See Section 2.4 for details on installing memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn off the power using the momentary power on/off switch?

Answer: The instant power off function is controlled in the BIOS by the Power Button Mode

setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen

that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

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3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Note: When replacing a battery, be sure to only replace it with the same type.

OR

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3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service is rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4: BIOS

Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the X11DPU motherboard. The BIOS

is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that the AMI BIOS has default text messages built in. We retain the option to include,
omit, or change any of these text messages.) Settings printed in Bold are the default values.

A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F2>, <F3>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time
during the setup navigation process.

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4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in MM/DD/YYYY format. The time

is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2015 after RTC reset.

Supermicro X11DPU

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This item displays the Complex Programmable Logic Device version.

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Memory Information

Total Memory

This item displays the total size of memory available in the system.

Chapter 4: BIOS

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4.3 Advanced Setup Congurations

Use the arrow keys to select Boot Setup and press <Enter> to access the submenu items.

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high
DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When
this occurs, revert to the default to the manufacture default settings.

Boot Feature

Quiet Boot

Use this feature to select the screen display between the POST messages and the OEM logo
upon bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display
the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by
the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the <Numlock> key. The options are On and Off.

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Wait For "F1" If Error

Use this feature to force the system to wait until the 'F1' key is pressed if an error occurs.
The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this item is enabled, the BIOS will automatically reboot the system from a specied boot

device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB support

Enable this feature to use the USB keyboard and mouse during the Windows 7 installation,
since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive.
USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has been
installed in Windows. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to support the emulation of Port 61h bit-4 toggling in SMM (System
Management Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on
jumper settings when it is expired for more than 5 minutes. The options are Disabled and
Enabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay Off, Power On,
and Last State.

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Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are Instant Off and 4 Seconds Override.

Throttle on Power Fail

Throttling improves reliability and reduces power consumption in the processor via automatic
voltage control during processor idle states. Select Enabled to decrease the system power
by throttling CPU frequency when one power supply is failed. The options are Disabled and
Enabled.

CPU Conguration

This submenu displays the information of the CPU as detected by the BIOS. It also allows

the user to conguration CPU settings:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ration

• Processor Min Ration

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

Hyper-Threading [All] (Available when supported by the CPU)

Select Enabled to support Intel® Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.

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Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable the Execute-Disable Bit which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor or

damage the system during an attack. (Please refer to Intel's website for more information.)
The options are Disable and Enable.

Intel Virtualization Technology (Available when supported by the CPU)

Select Enable to use Intel® Virtualization Technology so that I/O device assignments will be
reported directly to the VMM (Virtual Memory Management) through the DMAR ACPI Tables.
This feature offers fully-protected I/O resource-sharing across the Intel® platforms, providing
the user with greater reliability, security and availability in networking and data-sharing. The
options are Disable and Enable.

Note: If a change is made to this setting, you will need to reboot the system for the
change to take effect. Refer to Intel’s website for detailed information.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

Hardware Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the L2 cache to improve CPU performance. The options
are Enable and Disable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disable. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The
options are Enable and Disable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enabled to enable Intel® CPU Advanced Encryption Standard (AES) Instructions for
CPU to enhance data integrity. The options are Enable and Disable.

DCU IP Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the DCU (Data Cache Unit) IP prefetcher will prefetch IP
addresses in advance to improve network connectivity and system performance. The options
are Enable and Disable.

LLC Prefetch

Select Enable to support the LLC prefetch on all threads. The options are Disable and Enable.

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Extended APIC

Select Enable to use the extended APIC (Advanced Programmable Interrupt Control) support
to enhance power management. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel® Advanced Encryption Standard (AES) New Instructions (NI)
to ensure data security. The options are Disable and Enable.

Advanced Power Management Conguration

CPU P State Control

SpeedStep (Pstates)

EIST (Enhanced Intel® SpeedStep™ Technology) allows the system to automatically

adjust processor voltage and core frequency to reduce power consumption and heat

dissipation. The options are Disable and Enable.

EIST PSD Function

This feature allows the user to change the P-State (Power-Performance State) coordina­tion type. P-State is also known as "SpeedStep" for Intel® processors. Select HW_ALL to
change the P-State coordination type for all hardware components only. Select SW_ALL
to change the P-State coordination type for all software installed in the system. Select
SW_ANY to change the P-State coordination type for a particular software program

specied by the user in the system. The options are HW_ALL, SW_ALL, and SW_ANY.

Turbo Mode (Available when Intel® EIST Technology is enabled)

Select Enable to use the Turbo Mode to boost system performance. The options are
Disable and Enable.

Hardware PM State Control

Hardware P-States

This feature enables the hardware P-States support. The options are Disable, Native
Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State
Use this feature to enable the autonomous core C-State control. The options are Dis-

able and Enable.

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CPU C6 report

Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are

Disable, Enable, and Auto.

Enhanced Halt State (C1E)

Select Enable to use Enhanced Halt-State technology, which will signicantly reduce

the CPU's power consumption by reducing the CPU's clock cycle and voltage during a
Halt-state. The options are Disable and Enable.

Package C State Control

Package C State

This feature allows the user to set the limit on the C-State package register. The options
are C0/C1 state, C2 state, C6 (non Retention) state, C6 (Retention) state, No Limit, and
Auto.

CPU T State Control

Software Controlled T-States

This feature enables the software controlled T-States support. The options are Disable
and Enable

Chipset Conguration

Warning: Setting the wrong values in the following features may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the following North Bridge settings.

UPI Conguration

UPI Conguration

The following information will be displayed:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

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• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI Pci-e Conguration Base/Size

Degrade Precedence

Select Topology Precedence to degrade features if system options are in conict. Select
Feature Precedence to degrade topology if system options are in conict. The options

are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for the QPI to enter the L0p state for power saving. The options are Dis­able, Enable, and Auto.

Link L1 Enable

Select Enable for the QPI to enter the L1 state for power saving. The options are Dis­able, Enable, and Auto.

IO Directory Cache (IODC)

Use this feature to enable the IO Directory Cache (IODC) support. The options are Dis­able, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Re­mote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) require­ments. This feature is especially important for Virtualization Technology. The options are
Disable, Enable, and Auto.

Memory Conguration

Integrated Memory Controller (iMC)

Enforce POR

Select Enable to enforce POR restrictions on DDR4 frequency and voltage programming.
The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules.
The options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.

Data Scrambling for NVMDIMM

Select Enable to enable data scrambling to enhance system performance and data in­tegrity. The options are Auto, Disable, and Enable.

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Data Scrambling for DDR4

Use this feature to enable data scrambling for DDR4. The options are Auto, Disable,
and Enable.

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.

Refresh Options

Use this item to select the self refresh mode. The options are Accelerated Self Refresh
and 2x Refresh.

Memory Topology

The following information will be displayed: P1 DIMMA1/P1 DIMMB1/P1 DIMMC1/P1
DIMMD1/P1 DIMME1/P1 DIMMF1

Memory RAS (Reliability_Availability_Serviceability) Conguration

Memory RAS Conguration Setup

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support the static virtual lockstep mode. The options are Disable
and Enable.

Mirror Mode

Use this item to select the mirror mode. The options are Disable, Mirror Mode 1LM,
and Mirror Mode 2LM. If this item is set to Mirror Mode 1LM or Mirror Mode 2LM, the

available memory capacity will be reduced by 50 percent.

UEFI ARM Mirror

Select Enable to support the UEFI-based address range mirroring with setup option.
The options are Disable and Enable.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.

*If the item above "Memory Rank Sparing" is set to Enable, the following item
will be displayed:

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Multi Rank Sparing

Use this feature to set the multiple rank sparing number. The default setting and the
maximum is two ranks per channel. The options are One Rank and Two Rank.

Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default
setting is 10.

SDDC Plus One

Single Device Data Correction (SDDC) allows data to be reconstructed when one of
the memory devices fails on a DIMM. Use this feature to enable the SDDC support.

The options are Disable and Enable.

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC) Sparing detects the predetermined
threshold for correctable errors, copying the contents of the failing DIMM to spare
memory. The failing DIMM or memory rank will then be disabled. The options are Dis-

able and Enable.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected on a memory module and send the correction to the requestor (the original
source). When this item is set to Enable, read-and-write will be performed every 16K
cycles per cache line if there is no delay caused by internal processing. The options
are Disable and Enable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The Default setting is 24.

IIO Conguration

IIO Conguration

EV DFX Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces­sor will always remain clear during electric tuning. The options are Disable and Enable.

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CPU1 Conguration

IOU0 (IIO PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

MCP1 (IIO PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

P1_NVMe0

Link Speed

Use this feature to select the link speed for the PCIe port. The options are Auto,
Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

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P1_NVMe1

Link Speed

Use this feature to select the link speed for the PCIe port. The options are Auto,
Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

AOC-URN6-i2XT NVME2 (Available when the device is detected by

the system)

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

AOC-URN6-i2XT NVME3 (Available when the device is detected by

the system)

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

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PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

AOC-URN6-i2XT NVME4 (Available when the device is detected by

the system)

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

AOC-URN6-i2XT NVME5 (Available when the device is detected by

the system)

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

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PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

AOC-URN6-i2XT NVME6 (Available when the device is detected by

the system)

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

CPU2 Conguration

IOU0 (IIO PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

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Chapter 4: BIOS

MCP1 (IIO PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

RSC-UMR-8 SLOT1

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s)..

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

P2_NVMe0

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s)..

PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size -

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

P2_NVMe1

Link Speed

This feature allows the user to select PCI-E support for the device installed in the
system. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s)..

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PCI-E Port Link Status

PCI-E Port Link Max

PCI-E Port Link Speed

PCI-E Port Max Payload Size -

Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are 128B, 256B,
and Auto.

IOAT (Intel® IO Acceleration) Conguration

Disable TPH

Select Yes to deactivate TLP Processing Hint support. The options are No and Yes.

Prioritize TPH

Use this feature to enable the prioritize TPH support. The options are Enable and

Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain transactions
to violate the strict-ordering rules of PCI bus for a transaction to be completed prior
to other transactions that have already been enqueued. The options are Disable and
Enable.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel® Virtualization Technology support for Direct I/O VT-d support
by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through
the DMAR ACPI Tables. This feature offers fully-protected I/O resource sharing across
Intel® platforms, providing greater reliability, security and availability in networking and
data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.

PassThrough DMA

Select Enable to use the Non-Isoch VT_D engine pass through DMA support. The
options are Enable and Disable.

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ATS

Select Enable to use the Non-Isoch VT_D engine ATS support. The options are En­able and Disable.

Posted Interrupt

Use this feature to enable VT_D posted interrupt. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory
Access) to enhance system performance. The options are Enable and Disable.

Intel® VMD technology

The Intel® Volume Management Device (VMD) is a host bridge to a secondary PCIe
domain to provide more bus resources.

Intel® VMD for Volume Management Device on CPU1

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

P1_NVMe0 VMD (Available when the device is detected by the system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

P1_NVMe1 VMD (Available when the device is detected by the system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 1A~1D. The op­tions are Disable and Enable.

VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

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*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

AOC-URN6-i2XT NVME2 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 2A~2D. The op­tions are Disable and Enable.

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

AOC-URN6-i2XT NVME3 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

AOC-URN6-i2XT NVME4 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

AOC-URN6-i2XT NVME5 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

AOC-URN6-i2XT NVME6 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 3A~3D. The op­tions are Disable and Enable.

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Intel® VMD for Volume Management Device on CPU2

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

RSC-UMR-8 SLOT1 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

P2_NVMe0 VMD (Available when the device is detected by the system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

P2_NVMe1 VMD (Available when the device is detected by the system)

Select Enable to use the Intel® Volume Management Device Technology for this
device. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 1A~1D. The op­tions are Disable and Enable.

VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 2A~2D. The op­tions are Disable and Enable.

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel® Volume Management Device Technology for this
stack. The options are Disable and Enable.

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*If the item above "Intel® VMD for Volume Management Device" is set to
Enable, the following items will be displayed:

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable the hot plug support for PCIe root ports 3A~3D. The op­tions are Disable and Enable.

IIO-PCIE Express Global Options

PCI-E Completion Timeout Disable

Use this feature for PCI-E Completion Timeout support for electric tuning. The options
are Yes, No, and Per-Port.

South Bridge

The following South Bridge information will be displayed:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy
support if there are no legacy USB devices present. Select Disable to have all USB devices
available for EFI applications only. The options are Enabled, Disabled, and Auto.

XHCI Hand-off

This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The options are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which will provide complete legacy
USB keyboard support for the operating systems that do not support legacy USB devices.
The options are Disabled and Enabled..

Server ME Conguration

This feature displays the following system ME conguration settings.

• Operational Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

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• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCH SATA Conguration

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel® PCH chip.
The options are Disable and Enable.

Congure SATA as

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID.

SATA HDD Unlock

Select Enable to unlock the HDD password. The options are Disable and Enable.

Aggressive Link Power Management

When this item is set to Enable, the SATA AHCI controller manages the power usage of the
SATA link. The controller will put the link to a low power state when the I/O is inactive for an
extended period of time, and the power state will return to normal when the I/O becomes
active. The options are Disable and Enable.

*If the item above "Congure SATA as" is set to AHCI, the following items will be

displayed:

SATA Port 0~ Port 7

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Hot Plug (SATA Port 0~ Port 7)

Select Enabled to enable a SATA port specied by the user. The options are Disable and
Enable.

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Spin Up Device (SATA Port 0~ Port 7)

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

SATA Device Type (SATA Port 0~ Port 7)

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to RAID, the following items will be

displayed:

SATA RSTe Boot Info

Select Enable to provide the full int13h support for SATA controller attached devices. The
options are Disable and Enable.

Aggressive Link Power Management

When this item is set to Enable, the SATA AHCI controller manages the power usage of the
SATA link. The controller will put the link to a low power state when the I/O is inactive for an
extended period of time, and the power state will return to normal when the I/O becomes
active. The options are Disable and Enable.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0~ Port 7

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Hot Plug (SATA Port 0~ Port 7)

Select Enabled to enable a SATA port specied by the user. The options are Disable and
Enable.

Spin Up Device (SATA Port 0~ Port 7)

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

SATA Device Type (SATA Port 0~ Port 7)

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

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PCH sSATA Conguration

sSATA Controller

This item enables or disables the onboard SATA controller supported by the Intel® PCH chip.
The options are Enable and Disable.

Congure sSATA as

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID.

SATA HDD Unlock

Select Enable to unlock the HDD password. The options are Disable and Enable.

Aggressive Link Power Management

When this item is set to Enable, the SATA AHCI controller manages the power usage of the
SATA link. The controller will put the link to a low power state when the I/O is inactive for an
extended period of time, and the power state will return to normal when the I/O becomes
active. The options are Disable and Enable.

*If the item above "Congure sSATA as" is set to AHCI, the following items will be

displayed:

sSATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Hot Plug (sSATA Port 0~ Port 5)

Select Enabled to enable a SATA port specied by the user. The options are Disable and
Enable.

Spin Up Device (sSATA Port 0~ Port 5)

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

sSATA Device Type (sSATA Port 0~ Port 5)

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

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*If the item above "Congure SATA as" is set to RAID, the following items will be

displayed:

sSATA RSTe Boot Info

Select Enable to provide the full int13h support for SATA controller attached devices. The
options are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Hot Plug (sSATA Port 0~ Port 5)

Select Enabled to enable a SATA port specied by the user. The options are Disable and
Enable.

Spin Up Device (sSATA Port 0~ Port 5)

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

sSATA Device Type (sSATA Port 0~ Port 5)

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following information will be displayed:

• PCI Bus Driver Version

PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Disabled and Enabled.

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Chapter 4: BIOS

SR-IOV Support

Use this feature to enable or disable Single Root IO Virtualization support. The options are

Disabled and Enabled.

MMIO High Base

Use this item to select the base memory size according to memory-address mapping for the
IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
40T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

PCI PERR/SERR Support

Select Enabled to activate PCI Error and System Error report handling. The options are
Disabled and Enabled.

Maximum Read Request

Select Auto to allow the system BIOS to automatically set the maximum read request size
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this feature to select the default value for the PCI MMIO (Memory-Mapped IO) base
address. The options are 1G, 1.5G, 1.75G, 2G, 2.25G, and 3G.

NVMe Firmware Source

Use this item to select the NVMe rmware to support booting. The options are Vendor

Dened Firmware and AMI Native Support. The default option, Vendor Dened Firmware,
is pre-installed on the drive and may resolve errata or enable innovative functions for the
drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.

VGA Priority

Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Onboard and Offboard.

RSC-UMR-8 SLOT1 PCI-E x8 OPROM

RSC-UMR-8 M.2_PCIe OPROM

Select Disabled to deactivate the selected slot, Legacy to activate the slot in legacy mode,
and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.

Onboard LAN Option ROM Type

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Select an option to enable Option ROM support to boot the computer using a device specied

by the user. The options are Legacy and EFI.

Onboard LAN1 Option ROM

Onboard LAN2 Option ROM

Use the above four items to select the type of device installed in a LAN port specied by the

user for system boot. The default setting for Onboard LAN1 Option ROM is PXE, and the
default setting for Onboard LAN2 Option ROM is Disabled.

Onboard NVMe1 Option ROM

Onboard NVMe2 Option ROM

Onboard NVMe3 Option ROM

Onboard NVMe4 Option ROM

Use the above four items to select the type of the device installed on an NVMe port specied

by the user for system boot. The options are Disabled, Legacy, and EFI.

Onboard Video Option ROM

Select Legacy to boot the system using a legacy video device installed on the motherboard.
The options are Disabled, Legacy, and EFI.

Network Stack Conguration

Network Stack

Select Enabled to enable UEFI (Unied Extensible Firmware Interface) for network stack

support. The options are Disabled and Enabled.

*If the item above "Network Stack" is set to Enabled, the following items will be
displayed:

Ipv4 PXE Support

Select Enabled to enable Ipv4 PXE boot support. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable Ipv4 HTTP boot support. The options are Disabled and Enabled.

Ipv6 PXE Support

Select Enabled to enable Ipv6 PXE boot support. The options are Disabled and Enabled.

Ipv6 HTTP Support

Select Enabled to enable Ipv6 HTTP boot support. The options are Disabled and Enabled.

PXE boot wait time

Use this option to specify the wait time to press the ESC key to abort the PXE boot. Press
"+" or "-" on your keyboard to change the value. The default setting is 0.

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