Supermicro X11DPT-BH User Manual

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Page 1

X11DPT-BH

USER’S MANUAL

Revision 1.0a

Page 2

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes

no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/ or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: This product can expose you t o chemicals including lead, known to the State of California to cause cancer and birth defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0a

Release Date: July 31, 2019

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Printed in the United States of America

Page 3

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users. It provides information for the installation and use of the X11DPT-BH motherboard.

About This Motherboard

The X11DPT-BH motherboard supports dual Intel® Xeon Scalable-SP and 2nd Generation Intel® Xeon Scalable-SP processors (Socket P) with a TDP (Thermal Design Power) of up to 205W and three UPIs (UltraPath Interconnect) of up to 10.4 GT/s. With the Intel C621 built in, this motherboard supports up to 6TB of 3DS LRDIMM/RDIMM/NV-DIMM DDR-4 (288pin) ECC 2933*/2666/2400/2133 MHz memory in 24 DIMM slots (Note 2 below), and comes equipped with eight SATA 3.0 ports, one SATADOM port, two USB 3.0 rear connections, one SIOM networking slot, and multiple PCI-E 3.0 Riser Slot options. It also supports up to 9TB memory with DCPMM modules installed. This motherboard is optimized for PCI-Express

expansion with exible IO support, and is ideal for high-performance server platforms. Please

note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at http://www.supermicro. com/products/.

Notes: 1. UPI/memory speeds are dependent on the processors installed in your system. 2. Support for 2933MHz memory is dependent on the CPU SKU.

Manual organization

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel C621 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the processor, memory modules and other hardware components into the system.

Chapter 3 describes troubleshooting procedures for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes information.

Appendix B lists software program installation instructions.

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Appendix C lists standardized warning statements in various languages.

Appendix D contains UEFI BIOS Recovery instructions.

Appendix E provides information on how to congure VROC RAID settings.

Appendix F provides information on how to congure secure boot settings.

Appendix G provides information on how to congure iSCSI settings.

Appendix H provides information on how to congure Network Interface Card (NIC) settings.

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X11DPT-BH User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: +1 (408) 503-8000

Fax: +1 (408) 503-8008

Email: marketing@supermicro.com (General Information)

support@supermicro.com (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: +31 (0) 73-6400390

Fax: +31 (0) 73-6416525

Email: sales@supermicro.nl (General Information)

support@supermicro.nl (Technical Support)

rma@supermicro.nl (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: +886-(2) 8226-3990

Fax: +886-(2) 8226-3992

Email: support@supermicro.com.tw

Website: www.supermicro.com.tw

Page 6

Preface

Table of Contents

Chapter 1 Introduction

Quick Reference ...............................................................................................................11

Quick Reference Table ......................................................................................................12

Motherboard Features .......................................................................................................13

1.2 Processor and Chipset Overview .......................................................................................17

1.3 Special Features ................................................................................................................18

Recovery from AC Power Loss .........................................................................................18

1.4 System Health Monitoring ..................................................................................................18

Onboard Voltage Monitors ................................................................................................18

Fan Status Monitor with Firmware Control .......................................................................18

Environmental Temperature Control .................................................................................18

System Resource Alert......................................................................................................19

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................19

1.7 Advanced Power Management ..........................................................................................19

Intel® Intelligent Power Node Manager (IPNM).................................................................19

Management Engine (ME) ................................................................................................20

1.8 Intel® Optane DC Persistent Memory Overview ...............................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

Precautions .......................................................................................................................21

Unpacking .........................................................................................................................21

2.2 Motherboard Installation .....................................................................................................22

Tools Needed ....................................................................................................................22

Location of Mounting Holes ..............................................................................................22

Installing the Motherboard.................................................................................................23

2.3 Processor and Heatsink Installation ....................................................................................24

Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP Processors .....................24

Overview of the Processor Socket Assembly ...................................................................25

Overview of the Processor Heatsink Module ....................................................................26

Preparing the CPU Socket for Installation ........................................................................27

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X11DPT-BH User's Manual

Removing the Dust Cover from the CPU Socket .............................................................27

Attaching the Processor to the CPU/Heatsink Carrier ......................................................28

Attaching the CPU/Carrier Assembly to the Passive Heatsink to Form the Processor

Heatsink Module (PHM) ....................................................................................................29

Installing the Processor Heatsink Module (PHM) ............................................................30

Removing the Processor Heatsink Module (PHM) ...........................................................31

2.4 Memory Support and Installation .......................................................................................32

Memory Support ................................................................................................................32

Memory Installation Sequence ..........................................................................................32

General Memory Population Requirements ......................................................................32

DIMM Population Guidelines for Optimal Performance .....................................................34

Key Parameters for DIMM Conguration ..........................................................................34

DIMM Mixing Guidelines ...................................................................................................34

DIMM Population Table .....................................................................................................35

DIMM Installation ..............................................................................................................37

DIMM Removal .................................................................................................................37

2.5 Rear I/O Ports ....................................................................................................................38

2.6 Front Control Panel ............................................................................................................43

2.7 Headers ...............................................................................................................................48

2.8 Jumper Settings .................................................................................................................53

How Jumpers Work ...........................................................................................................53

2.9 LED Indicators ....................................................................................................................55

2.10 PCI-E 3.0 Slots ................................................................................................................57

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................59

Before Power On ..............................................................................................................59

No Power ..........................................................................................................................59

No Video ...........................................................................................................................60

System Boot Failure .......................................................................................................60

Memory Errors ..................................................................................................................60

Losing the System's Setup Conguration .........................................................................61

When the System Becomes Unstable ..............................................................................61

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3.2 Technical Support Procedures ...........................................................................................63

3.3 Frequently Asked Questions ..............................................................................................64

3.4 Battery Removal and Installation .......................................................................................65

Battery Removal ................................................................................................................65

Proper Battery Disposal ....................................................................................................65

Battery Installation .............................................................................................................65

3.5 Returning Merchandise for Service ....................................................................................66

Chapter 4 UEFI BIOS

4.1 Introduction .........................................................................................................................67

Starting the Setup Utility ...................................................................................................67

4.2 Main Setup .........................................................................................................................68

4.3 Advanced Setup Congurations .........................................................................................70

4.4 Event Logs .......................................................................................................................119

4.5 IPMI ..................................................................................................................................121

4.6 Security Settings ..............................................................................................................124

4.7 Boot Settings ....................................................................................................................128

4.8 Save & Exit .......................................................................................................................131

Appendix A BIOS Codes

Appendix C Standardized Warning Statements

Appendix D UEFI BIOS Recovery

Appendix E Conguring VROC RAID Settings

Appendix F Secure Boot Settings

Appendix G Conguring iSCSI Settings

Appendix H Conguring Network Interface Card (NIC) Settings

Page 9

Chapter 1: Introduction

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance.

Note: This motherboard was designed to be a part of an integrated server solution. No shipping package will be included in the shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: support@supermicro.com

This manual may be periodically updated without notice. Please check the Supermicro website for possible updates to the manual revision level.

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X11DPT-BH User's Manual

Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision

available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.

Page 11

Chapter 1: Introduction

FANC FANB

UID_LED1

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

X11DPT-BH Motherboard Layout

(not drawn to scale)

USB0/1(3.0)

BMC

BMC_HB_LED1

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

HDD_LED1

JBT1

FAN3

FAN4

JTPM1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

JUIDB1

SXB3_1

I-SATA6

IPMI_LAN

JSD1

JUSB1

JWD1

PCH

SXB4

PCI-E 3.0 X16

JNVI2C1

CPU2 PCI-E 3.0 X24

CPU1

SXB2

JF1

P2-DIMM

FAND

P2-DIMM

CPU2

FANA

P2-DIMM

Note: Components not documented are for internal testing only.

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X11DPT-BH User's Manual

JNVI2C1

Quick Reference

UID_LED1

JUIDB1

JPB1

JRK1

BMC_HB_LED1

SXB3_1

HDD_LED1

I-SATA6

JF2 JSD1

SXB1

JWD1

BT1

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

IPMI_LAN

UID_LED1

JUIDB1

IPMI_LAN

SXB3_1

I-SATA6

JSD1

JUSB1

USB0/1(3.0)

BMC

BMC_HB_LED1

JWD1

PCH

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

JBT1

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

JUSB1

JCOM1

JSDCARD FAN3 FAN4

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

VGA

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

JTPM1

JCPLD1

JNVI2C1

SXB4

JBT1

CPU2 PCI-E 3.0 X24

CPU1

SXB2

JF1

SXB2

P2-DIMM

JF1

P2-DIMM

FAND

FANC FANB

FANC

P2-DIMM

FAND

CPU2

FANA

FANB

P2-DIMM

FANA

P2-DIMM

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-

nections.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for internal testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

Page 13

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBT1 Clear CMOS Open (Normal)

JPME1 ME Recovery Pins 1-2 (Normal)

JWD1 Watch Dog Timer Enable Pins 1-2 (Normal)

JPB1 BMC Enable Pins 1-2 (Enabled)

Connector Description

Battery (BT1) Onboard CMOS battery

JCOM1 COM port 1

FANA~FAND System cooling fan headers

IPMI_LAN Dedicated IPMI LAN port

JF1 Front control panel header

JF2 PCI-E 3.0 x4 slot (CPU1)

JNVI2C1 NVMe I2C header

JRK1 Intel VROC RAID Key for onboard NVMe devices

JSD1 SATA DOM power connector

JSDCARD1 Micro SD card slot

JTPM1 Trusted Platform Module (TPM)/Port 80 connector

SIOM1 CPU1 PCI-E 3.0 x16 networking slot

SXB1 PCI-E 3.0 (x4 + x4) slot supported by CPU1 and SATA connections (I-SATA0~5 & S-SATA0~5)

SXB2 PCI-E 3.0 x24 (x16 + x8) slot for SMCI storage add-on card (AOC)

SXB3_1 PCI-E 3.0 x16 left hand riser slot supported by CPU1

SXB4 PCI-E 3.0 x16 right hand riser slot supported by CPU2

I-SATA0~5 I-SATA 3.0 connectors supported by the Intel PCH

S-SATA0~5 S-SATA 3.0 connectors supported by the Intel PCH

I-SATA6 SATADOM power

UID-SW UID switch

USB0/1 Back panel USB 3.0 ports

VGA Back panel VGA port

LED Description State Status

BMC_HB_LED1 BMC Heartbeat LED Green: Blinking BMC Normal

HDD_LED1 HDD Activity LED Green: Blinking HDD Normal

UID_LED1 Rear UID LED Blue: On Unit Identied

Note 1: For your PCI-E devices to work properly, be sure to use the add-on card devices that are compliant with the PCI-E standard on the motherboard.

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X11DPT-BH User's Manual

Motherboard Features

CPU

• This motherboard supports dual Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP processors (Socket P) with

support of 3 UPI (UltraPath Interconnect) links of up to 10.4 GT/s

Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on page 16 to determine which slots or devices may be a󰀨ected.

Memory

• Integrated memory controller supports up to 6TB of 3DS LRDIMM/RDIMM/NV-DIMM DDR-4 (288-pin) ECC

2933*/2666/2400/2133 MHz memory in 24 DIMM slots.

Notes: 1. Up to 9TB memory is supported with DCPMM modules installed. 2. Support for 2933MHz memory is

dependent on the CPU SKU..

DIMM Size

• Up to 128GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel C621

Expansion Slots

• One (1) PCI-E 3.0 x16 left and slot

• One (1) PCI-E 3.0 x16 right hand slot

• One (1) PCI-E 3.0 (x4 + x4) left hand riser slot

• One (1) PCI-E x24 (x16 + x8) SMCI storage slot

BaseBoard Management Controller (BMC)

• ASPEED AST 2500 Baseboard Management Controller (BMC) supports IPMI 2.0

• One (1) dedicated IPMI LAN located on the rear IO backpanel

Graphics

• Graphics controller via AST 2500 BMC (Baseboard Management Controller)

I/O Devices

Eight (8) SATA 3.0 ports

• SATA 3.0

• I-SATA0~5/S-SATA0~5, I-SATA6

• S-SATA4,S-SATA5 (SuperDOM support)

• RAID (PCH) • RAID 0, 1, 5, 10

Peripheral Devices

Note: The table above is continued on the next page.

Page 15

Chapter 1: Introduction

Motherboard Features

• Two (2) USB 3.0 ports on the rear I/O panel (USB0/1)

BIOS

• 256Mb Aten BIOS

• ACPI 3.0 or later, SPI dual/quad speed support, and SMBIOS 2.7 or later

• Riser Card auto detection support

• RTC (Real Time Clock) wakeup

Power Management

• ACPI power management

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 3.0 (available when the Supermicro Power Manager [SPM] is installed and a

special power supply is used. See the note on page 20.)

• Management Engine (ME)

System Health Monitoring

• Onboard voltage monitoring for +1.8V, +3.3V, +5V, +/-12V, +3.3V standby, +5V standby, HT, memory, PCH temperature,

system temperature, and memory temperature

• CPU 8-phase switching voltage regulator

• CPU thermal trip support

• CPU Thermal Design Power (TDP) support of up to 205W (See Note 1 on next page.)

• PECI/TSI

Fan Control

• Six 4-pin fan header

• Fan status monitoring via IPMI connections

• Low-noise fan speed control

System Management

• Trusted Platform Module (TPM) 2.0

• PECI (Platform Environment Control Interface) 2.0 support

• SuperDoctor® 5, Watch Dog, Non-maskable interrupt (NMI), RoHS

• IPMIView, SMCIPMITOOL, IPMICFG

LED Indicators

• CPU/Overheating

• Power/Suspend-state indicator

• Fan failure

• UID/remote UID

• LAN activity

Dimensions

• 7.6" (L) x 18.86" (W) (193.04 mm x 479.04 mm)

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X11DPT-BH User's Manual

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Conguration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC login information upon initial system power-on. The manufacturer default username is ADMIN and the password

is ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/ products/info/les/IPMI/Best_Practices_BMC_Security.pdf

Page 17

System Block Diagram

Chapter 1: Introduction

RJ45

DDR4

BMC Boot Flash

DIMMF1/2

SXB3

PCI-E X4

SXB1 M.2

PCI-E X4

JF2 M.2

LAN3

RTL8211F

SPI

DIMMD1/2

DIMME1/2

DDR4

2666/*2933

#3C

#3D

RGRMII

DIMMC1/2

SIOM

RMII/NCSI

NCSI

master

BMC

AST2500

DIMMA1/2

DIMMB1/2

DDR4

2666/*2933

PCI-E X16

IMC0 3CH

IMC1 3CH

PCI-E X1

SFI

PCI-E X1

USB 2.0

ESPI

VR13 5+1 PHASE 205W

SNB CORE DDR4

#3C

PE_UP DMI3

PCH_PCIE #4

SFI

NCSI

LBG-1G 15W LBG-4 w/ X8 UPLINK 4x 10G SFI NO QuickAssist 19W

PCH_PCIE #5

#12 USB2.0

UPI

10.4/11.2G

P2 P2

#3A #3A

3 I MD

DMI3

UPLINK PCI-E X8

SATA #0 - #11

UPI

SATA #12

#1 #2

VCCP1 12vVCCP0 12v

VR13 5+1 PHASE 205W

SNB CORE DDR4

PCI-E X8

6.0 Gb/S

USB 2.0

USB 3.0

2 #UPC1 #UPC

PCI-E X16

SATA-DOM

USB

IMC1 3CH

1 3: I CE P03: I CEP

1 : D I T E KCO S0 :DI TE KCO S

3 I MD

PCI-E X16

IMC0 3CH

SXB2

SXB1

DIMMG1/2

DIMMH1/2

DIMMJ1/2

DDR4

SXB4

2666/*2933

SXB2

DIMMK1/2

DIMML1/2

DIMMM1/2

DDR4

2666/*2933

Micro SD Card

VGA CONN

Connector

Temp Sensor

NCT7718W

COM1

SPI

ESPI

Header

BIOS

SPI

TPM HEADER

Debug Card

*Note: Support for 2933MHz memory is dependent on the CPU SKU..

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your motherboard.

Page 18

X11DPT-BH User's Manual

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the dual Intel Xeon Scalable-SP and 2nd Generation Intel Xeon Scalable-SP processors (Socket P) and the Intel C621 chipset, the

X11DPT-BH motherboard provides system performance, power e󰀩ciency, and feature sets to

address the needs of next-generation computer users. With 6-channel memory support and an on-motherboard SIOM (Super I/O Module) slot, the X11DPT-BH provides unmatched PCI-E versatility and networking scalability. This motherboard is optimized for high performance computing (HPC) and big data environments.

Features Supported by Intel Xeon Scalable-SP Processors

Intel Xeon Scalable-SP processors support the following features:

• Intel AVX-512 instruction support to handle complex workloads

• 1.5x memory bandwidth increased to 6 channels

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Rich set of available IOs with increased PCI-E lanes (48 lanes)

• Integrated Intel Ethernet Connection X722 with iWARP RDMA

New features supported by 2nd Generation Intel Xeon Scalable-SP Processors

2nd Generation Intel Xeon Scalable-SP processors support the following features:

• Higher performance for a wider range of workloads with per-core performance increase

• Support of Optane DC Persistent Memory (DCPMM) with a󰀨ordable, persistent, and

large capacity

• Up to 2993 MHz memory supported (Refer to Section 1.8 for details.)

• Vector Neural Network Instruction (VNNI) support for Accelerate Deep Learning & Arti-

cial Intelligence (AI) workloads

• Speed Select Technology provides multiple CPU proles that can be set in the BIOS.

(This feature is available on select CPU SKUs).

• Seamless hardware security mitigations & performance/frequency exibility

Note: Node Manager 3.0 support is dependent on the power supply used in the system.

Page 19

Chapter 1: Introduction

1.3 Special Features

This section describes the health monitoring features of the motherboard. The motherboard has an onboard ASPEED 2500 Baseboard Management Controller (BMC) that supports system health monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to

remain powered o󰀨 (in which case you must press the power switch to turn it back on), or

for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.

1.4 System Health Monitoring

This section describes the health monitoring features of the X11DPT-BH motherboard. The motherboard has an onboard Baseboard Management Controller (BMC) ASPEED AST2500 chip that supports system health monitoring.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage becomes unstable, it will give a warning or send an error message to the IPMI WebGUI and

IPMIView. The user can adjust the voltage thresholds to dene the sensitivity of the voltage

monitor. Real time readings of these voltage levels are all displayed in IPMI.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard processors and the system in real time via the IPMI interface. Whenever the temperature

of the CPU or the system exceeds the manufacturer-dened threshold, system/CPU cooling

fans will be turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

Page 20

X11DPT-BH User's Manual

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system

and application software. This enables the system to automatically turn on and o󰀨 peripherals

such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with appropriate Windows operating systems. For detailed information on OS support, please refer to our website at www.supermicro.com.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable operation, especially for processors that have high CPU clock rates.

1.7 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Intel's Intelligent Power Node Manager (IPNM) provides your system with real-time thermal

control and power management for maximum energy e󰀩ciency. Although IPNM Specication

Version 2.0/3.0 is supported by the BMC (Baseboard Management Controller), your system

must also have IPNM-compatible Management Engine (ME) rmware installed to use this

feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in the system.

Page 21

Chapter 1: Introduction

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides

Server Platform Services (SPS) to your system. The services provided by SPS are di󰀨erent

from those provided by the ME on client platforms.

1.8 Intel® Optane DC Persistent Memory Overview

2nd Generation Intel Xeon Scalable-SP processors support new DCPMM (Optane™ DC

Persistent Memory Modules) technology that o󰀨ers data persistence with higher capacity than

existing memory modules and lower latency than NVMe SSDs. DCPMM memory provides

hyper-speed storage capability for high performance computing platforms with exible conguration options.

Page 22

X11DPT-BH User's Manual

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your motherboard and your system, it is important to handle it very carefully. The following

measures are generally su󰀩cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.

Page 23

Chapter 2: Installation

FANC FANB

2.2 Motherboard Installation

All motherboards have standard mounting holes to t di󰀨erent types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that

the metal stando󰀨s click in or are screwed in tightly.

Phillips Screwdriver (1)

Tools Needed

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

CPU2 PCI-E 3.0 X24

Phillips Screws (12)

UID_LED1

JPB1

JUIDB1

JUSB1

IPMI_LAN

SXB3_1

JWD1

PCH

I-SATA6

JSD1

USB0/1(3.0)

BMC

BMC_HB_LED1

BT1

P1-DIMM

Stando󰀨s (12)

Only if Needed

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

HDD_LED1

JBT1

P1-DIMM

DESIGNED IN USA

JCPLD1

X11DPT-BH REV:1.00

CPU1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

JNVI2C1

SXB4

PCI-E 3.0 X16

P1-DIMM

SXB2

JF1

CPU2

P2-DIMM

FAND

P2-DIMM

FANA

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary measures to avoid damaging these components when installing the motherboard to the chassis.

Page 24

X11DPT-BH User's Manual

Installing the Motherboard

1. Locate the mounting holes on the motherboard. See the previous page for the location.

2. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.

3. Install stando󰀨s in the chassis as needed.

4. Install the motherboard into the chassis carefully to avoid damaging other motherboard components.

5. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on the motherboard and its matching mounting hole on the chassis.

6. Repeat Step 5 to insert #6 screws into all mounting holes.

7. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or

components might look di󰀨erent from those shown in this manual.

Page 25

Chapter 2: Installation

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the fan. Also, improper CPU installation or socket misalignment can cause serious

damage to the CPU or the motherboard that will require RMA repairs. Please read and follow

all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Make sure that you install the processor into the CPU socket before you install the CPU heatsink.

• If you buy a CPU separately, make sure that you use an Intel-certied multi-directional

heatsink only.

• Make sure to install the motherboard into the chassis before you install the CPU heatsink.

• When receiving a motherboard without a processor pre-installed, make sure that the plastic

CPU socket cap is in place and none of the socket pins are bent; otherwise, contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP Processors

Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP Processor

Note: All graphics, drawings and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same as those shown in this manual.

Page 26

X11DPT-BH User's Manual

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) Intel Xeon Scalable-SP or 2nd Generation Intel Xeon Scalable-SP processor, 2) CPU/heatsink carrier, 3) dust cover, and 4) CPU socket.

1. Intel Processor

2. CPU/Heatsink Carrier

3. Dust Cover

4. CPU Socket

WARNING!

CPU Socket Assembly

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

Page 27

Chapter 2: Installation

Overview of the Processor Heatsink Module

The processor heatsink module (PHM) contains 1) a passive heatsink, 2) a CPU/heatsink carrier, and 3) Intel Xeon Scalable-SP or 2nd Gen Intel Xeon Scalable-SP processor.

1. Passive Heatsink

2. CPU/Heatsink Carrier

3. Intel Processor

Processor Heatsink Module

(Bottom View)

Page 28

X11DPT-BH User's Manual

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket contains 1) a dust cover, 2) a socket bracket, 3) the CPU (LGA3647) socket, and 4) a back plate. These components are pre-installed on the motherboard before shipping.

Processor Socket Assembly

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to malfunction.

WARNING!

Socket Cover

Socket Pins

CPU Socket

Page 29

Chapter 2: Installation

Attaching the Processor to the CPU/Heatsink Carrier

To properly install the CPU onto the CPU/heatsink carrier, please follow the steps below.

1. Locate Pin 1 (Notch A), Notch B, and Notch C on the CPU and locate Pin 1 (Notch A), Notch B, and Notch C on the CPU/heatsink carrier.

2. Align Pin 1 (Notch A), Notch B, and Notch C on the CPU with the corresponding notches on the carrier. Once they are aligned, carefully insert the CPU into the carrier until you hear a click. Once the CPU is properly mounted onto the carrier, the CPU/ carrier assembly is made.

Pin 1

CPU (Upside Down)

Align CPU Notch C and Clip C

Align CPU Pin 1

Align CPU Notch B and Clip B

Allow Clip B to Latch on to CPU

Package Carrier (Upside Down)

Allow Clip C to Latch on to CPU

CPU Mounted on Package Carrier (Upside Down)

CPU Mounted on Package Carrier (Rightside Up)

Page 30

X11DPT-BH User's Manual

Attaching the CPU/Carrier Assembly to the Passive Heatsink to Form the Processor Heatsink Module (PHM)

After you have made a CPU/carrier assembly, please follow the steps below to mount the assembly onto the heatsink to create the Processor Heatsink Module (PHM).

1. Place the heatsink upside down with the thermal grease facing up. Locate two larger mounting holes (A, B) at the diagonal corners of the heatsink, and two smaller mounting holes (C, D) on the heatsink.

2. Hold the CPU/carrier at the center edge, and turn it upside down with the CPU pins facing up. Locate the two larger holes (1, 2) at the diagonal corners of the carrier and the smaller holes of the same size (3, 4) on the carrier. Please note the mounting clips located next to every mounting hole on the carrier.

3. Align the larger holes (1, 2) on the carrier against the larger mounting holes (A, B) on the heatsink and smaller holes (3, 4) on the carrier against the smaller mounting holes (C, D) on the heatsink. Insert the mounting clips next to the larger hole on the carrier into the larger mounting hole on the heatsink (1 A, 2 B) and snap the mounting clips next to the smaller holes on the carrier onto the edges of the heatsink next to the smaller holes (3 C, 4 D) making sure that the mounting clips snap into place, and that the CPU/carrier assembly is properly mounted onto the heatsink. By mounting the CPU/carrier assembly to the heatsink, the Processor Heatsink Module (PHM) is assembled.

CPU and Carrier Package

(Upside Down)

Mounting Clips

CPU and Carrier Package

(Upside Down)

Heatsink

(Upside Down)

Mounting Clips

CPU and Carrier Package

(Rightside Up)

Mounting Clips

Thermal paste

On Locations (C, D), the clips snap onto the heatsink’s sides

On Locations of (A, B), the clips snap through the heatsink’s mounting holes

Make sure Mounting Clips snap into place

Page 31

Chapter 2: Installation

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the instructions listed on the previous page, align the processor heatsink module with the CPU socket on the motherboard.

2. Align the large hole on the heatsink against the large notch on the CPU socket, and the small hole on the heatsink against the small notch on the socket. Carefully insert

the PHM into the socket, making sure that the large and small notches t through the corresponding mounting holes on the socket. The PHM will only t one way. If it does not t correctly, remove it and try again.

3. Using a T30-size star driver bit, tighten four screws into the mounting holes on the socket to securely install the PHM into the motherboard, starting with the mounting hole

marked #1 (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the CPU and the socket.

Oval C

Oval D

Small Guiding Post

Large Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

Use a torque of 12 lbf·in

T30 Torx Driver

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

Page 32

X11DPT-BH User's Manual

Removing the Processor Heatsink Module (PHM)

Before starting to remove the processor heatsink module (PHM), unplug power cord from the power outlet.

1. Using a T30-size star driver, turn the screws on the PHM counterclockwise to loosen it

from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2, 1).

2. After all four screws are removed, wiggle the PHM gently and pull up to remove it from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re-

move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

Removing the screws in the sequence of 4, 3, 2, 1

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink Module off the CPU socket.

Page 33

Chapter 2: Installation

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.Exercise

extreme care when installing or removing DIMM modules to prevent any damage.

Memory Support

The X11DPT-BH supports up to 6TB of 3DS LRDIMM/RDIMM/NV-DIMM DDR-4 (288-pin) ECC 2933*/2666/2400/2133 MHz memory in 24 DIMM slots (*Note below). It also supports up to 9TB memory with DCPMM modules installed based on the DCPMM population table on page 37. Populating these DIMM modules with a pair of memory modules of the same type and size will result in interleaved memory, which will improve memory performance.

Note: 1. Support for 2933MHz memory is dependent on the CPU SKU. 2. 16Gb-based memory modules are supported by 2nd Gen Intel Xeon Scalable-SP processors only.

Memory Installation Sequence

Memory modules for this motherboard are populated using the "Fill First" method. The blue

memory slot of each channel is considered the "rst DIMM module" of the channel, and the

black slot, the second module of the channel. When installing memory modules, be sure to

populate the blue memory slots rst and then populate the black slots.

General Memory Population Requirements

1. Be sure to use the memory modules of the same type and speed on the motherboard.

Mixing of memory modules of di󰀨erent types and speeds is not allowed.

2. Using unbalanced memory topology such as populating two DIMMs in one channel while populating one DIMM in another channel on the same motherboard will result in reduced memory performance.

3. Populating memory slots with a pair of DIMM modules of the same type and size will result in interleaved memory, which will improve memory performance.

Page 34

X11DPT-BH User's Manual

A. DDR4 Memory Support for Intel Xeon Scalable-SP Processors

DDR4 Memory Support

Type

RDIMM SRx4 4GB 8GB 2666 2666 2666

RDIMM SRx8 8GB 16GB 2666 2666 2666

RDIMM DRx8 8GB 16GB 2666 2666 2666

RDIMM DRx4 16GB 32GB 2666 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666 2666

LRDIMM QRx4 32GB 64GB 2666 2666 2666

LRDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 2666 2666 2666

Ranks Per

DIMM & Data

Width

DIMM Capacity (GB)

DRAM Density

4Gb 8Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Channel

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

(DPC)

1DPC (1-DIMM Per

Channel)

2DPC (2-DIMM Per

Channel)

B. DDR4 Memory Support for 2nd Gen Intel Xeon Scalable-SP Processors

DDR4 Memory Support

Ranks

Type

RDIMM SRx4 4GB 8GB 16GB 2933 2933 2933

RDIMM SRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx4 16GB 32GB 64GB 2933 2933 2933

RDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

RDIMM 3Ds 8RX4 N/A 4H-128GB 4H-256GB 2933 2933 2933

LRDIMM QRx4 32GB 64GB 128GB 2933 2933 2933

LRDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 4H-256GB 2933 2933 2933

Per DIMM

Data Width

DIMM Capacity (GB)

DRAM Density

4Gb 8Gb 16Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Chan-

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

nel (DPC)

1DPC (1-DIMM

Per Channel)

2DPC (2-DIMM

Per Channel)

Notes: 1. 2933MHz memory support in two-DIMMs per-channel (2DPC) conguration

can be achieved by using memory purchased from Supermicro. 2. 2933MHz memory is supported by 2nd Gen Intel Xeon Scalable-SP (82xx/62xx series) processors only.

3. 16Gb-based memory modules are supported by 2nd Gen Intel Xeon Scalable-SP processors only.

Page 35

Chapter 2: Installation

DIMM Population Guidelines for Optimal Performance

For optimal memory performance, follow the instructions listed in the tables below when populating memory modules.

Key Parameters for DIMM Conguration

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), 3DS RDIMM, LRDIMM, 3DS LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2Rx4), C (1Rx4), D (1Rx8), E (2Rx8)

• 3DS RDIMM Raw Cards: A/B (4Rx4)

• non-3DS LRDIMM Raw Cards: D/E (4Rx4)

• 3DS LRDIMM Raw Cards: A/B (8Rx4)

DIMM Mixing Guidelines

General DIMM Mixing Guidelines

• All DIMMs must be all DDR4 DIMMs.

• x4 and x8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across di󰀨erent

channels, and across di󰀨erent sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across

di󰀨erent channels, and across di󰀨erent sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed Not Allowed Allowed

DIMM Mixing Rules

Page 36

X11DPT-BH User's Manual

DIMM Population Table

Note: Unbalanced memory conguration decreases memory performance and is not

recommended for Supermicro motherboards.

Memory Population for the the Motherboard (w/24 Slots) based on Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP Processors

Memory Population Table for the X11DP Motherboard w/24 DIMM Slots Onboard

When 1 CPU is used: Memory Population Sequence

1 CPU & 1 DIMM CPU1: P1-DIMMA1

1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1

1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1

1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

1 CPU & 5 DIMMs

(Unbalanced: not recommended)

1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

1 CPU & 7 DIMMs

(Unbalanced: not recommended)

1 CPU & 8 DIMMs CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1

1 CPU & 9 DIMMs

(Unbalanced: not recommended)

1 CPU & 10 DIMMs

(Unbalanced: not recommended)

1 CPU & 11 DIMMs

(Unbalanced: not recommended)

1 CPU & 12 DIMMs

When 2 CPUs are used: Memory Population Sequence

2 CPUs & 2 DIMMs

2 CPUs & 4 DIMMs

2 CPUs & 6 DIMMs

2 CPUs & 8 DIMMs

2 CPUs & 10 DIMMs

2 CPUs & 12 DIMMs

2 CPUs & 14 DIMMs

2 CPUs & 16 DIMMs

2 CPUs & 18 DIMMs

2 CPUs & 20 DIMMs

2 CPUs & 22 DIMMs

(Unbalanced: not recommended)

2 CPUs & 24 DIMMs

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1

CPU1: P1-DIMMA1 CPU2: P2-DIMMA1

CPU1: P1-DIMMA1/P1-DIMMD1 CPU2: P2-DIMMA1/P2-DIMMD1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1 CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1

CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1 CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1 CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1 CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1 CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1 CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1 CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1 CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1 CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/ P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/ P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1 CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/ P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF2/P2-DIMMF1

Page 37

Chapter 2: Installation

DCPMM Memory Population Table for the X11DP Motherboards (w/24 Slots) based on 2nd Gen Intel Xeon Scalable-SP Processors

Symmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

MM DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

AD + MM DRAM3 DCPMM DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DCPMM DRAM3 2-2-2

AD DRAM1 - DRAM1 - DRAM1 DCPMM DCPMM DRAM1 - DRAM1 - DRAM1 2-1-1

MM DRAM2 - DRAM2 - DRAM2 DCPMM DCPMM DRAM2 - DRAM2 - DRAM2 2-1-1

AD + MM DRAM3 - DRAM3 - DRAM3 DCPMM DCPMM DRAM3 - DRAM3 - DRAM3 2-1-1

AD DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

MM DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

AD + MM DRAM3 - DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 - DRAM3 2-2-1

AD DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

MM DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

AD + MM DCPMM - DRAM3 - DRAM3 - - DRAM3 - DRAM3 - DCPMM 1-1-1

AD DCPMM - DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 - DCPMM 2-2-1

Asymmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

AD* DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

Channel

Cong.

Channel

Cong.

Legend (for the two tables above)

DDR4 Type Capacity

DRAM1 RDIMM 3DS RDIMM LRDIMM 3DS LRDIMM

DRAM2 RDIMM - -

DRAM3 RDIMM 3DS RDIMM LRDIMM -

Refer to Validation Matrix (DDR4 DIMMs validated with

DCPMM) below.

Note: DDR4 single rank x8 is not available for DCPMM Memory Mode or App-Direct Mode.

Legend (for the rst two tables above)

Capacity

DCPMM Any Capacity (Uniformly for all channels for a given conguration)

• * 2nd socket has no DCPMM DIMM.

• Mode denitions: AD=App Direct Mode, MM=Memory Mode, AD+MM=Mixed Mode.

• For MM, general DDR4+DCPMM ratio is between 1:4 and 1:16. Excessive capacity for DCPMM can be used for AD.

• For each individual population, rearrangements between channels are allowed as long as the resulting population is

compliant with the PDG rules for 2nd Gen Intel Xeon Scalable-SP (82xx/62xx/52xx/4215 series) processors.

• For each individual population, please use the same DDR4 DIMM in all slots.

• For each individual population, sockets are normally symmetric with exceptions for 1 DCPMM per socket and 1 DCPMM

per node case. Currently, DCPMM modules operate at 2666 MHz.

• No mixing of DCPMM and NVMDIMMs within the same platform is allowed.

• This DCPMM population guide targets a balanced DCPMM-to-DRAM-cache ratio in MM and MM + AD modes.

Validation Matrix (DDR4 DIMMs Validated w/DCPMM)

DIMM Type

RDIMM

LRDIMM 4Rx4 N/A 64GB

LRDIMM 3DS 8Rx4 (4H) N/A 128GB

Ranks Per DIMM

& Data Width

(Stack)

1Rx4 8GB 16GB

2Rx8 8GB 16GB

2Rx4 16GB 32GB

DIMM Capacity (GB)

DRAM Density

4Gb 8Gb

Page 38

X11DPT-BH User's Manual

MAC CODE

BAR CODE

BIOS LICENSE

X11DPT-BH REV:1.00

DESIGNED IN USA

P1-DIMM

JRK1

SXB2

JUIDB1

FAND

FANC FANB

FANA

FAN3

FAN4

BMC_HB_LED1

UID_LED1

JWD1

JPB1

JUSB1

SXB3_1

JSIOM1

SXB4

JSDCARD1

I-SATA6

JCOM1

JCPLD1

BT1

JBT1

JF2

JNVI2C1

JTPM1

JSD1

JF1

SXB1

CPU2 PCI-E 3.0 X24

CPU1 PCI-E 3.0 X4

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

CPU1 SLOT1 PCI-E 3.0 X16

PCH

IPMI_LAN

BMC

CPU1

USB0/1(3.0)

CPU2

BIOS

VGA

SIOM:CPU1 PCI-E 3.0 X16

PCI-E 3.0 X16

HDD_LED1

P1-DIMM

P2-DIMM

P1-DIMM

DIMM Installation

1. Follow the instructions given in the memory population guidelines listed in the previous section to install memory modules on your motherboard. For the system to work properly, please use memory modules of the same type and speed on the motherboard. (See the Note below.)

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the receptive point on the memory slot.

4. Align the notches on both ends of the module against the receptive points on the ends of the slot.

5. Use two thumbs together to press on both ends of the module straight down into the slot until the module snaps into place.

6. Press the release tabs to the lock positions to secure the DIMM module into the slot.

DIMM Removal

Reverse the steps above to remove the DIMM modules from the motherboard.

Press both notches

Notches

Release Tabs

straight down into

the memory slot.

Warnings: 1. Please do not use excessive force when

pressing the release tabs on the ends of the DIMM socket to avoid causing any damage to the DIMM module or the DIMM socket. 2. Please handle DIMM modules with care. Carefully follow all the instructions given on Page 1 of this chapter to prevent ESD-related damages to your memory modules or components.

Page 39

Chapter 2: Installation

JNVI2C1

2.5 Rear I/O Ports

See the gure below for the locations and descriptions of the various I/O ports on the rear

of the motherboard.

JRK1

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

UID_LED1

JPB1

JUIDB1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

I-SATA6

IPMI_LAN

JSD1

JUSB1

JWD1

PCH

USB0/1(3.0)

BMC

BMC_HB_LED1

BT1

P1-DIMM

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

HDD_LED1

JBT1

P1-DIMM

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

SXB4

PCI-E 3.0 X16

P1-DIMM

CPU2 PCI-E 3.0 X24

SXB2

JF1

CPU1

CPU2

P2-DIMM

FAND

FANC FANB

P2-DIMM

FANA

Back panel I/O Port Locations and Denitions

Back Panel I/O Ports

No. Description No. Description

1. VGA port 4. USB0 (3.0)

2. Dedicated IPMI LAN 5. Unit Identier Switch

3. USB1 (3.0)

Page 40

X11DPT-BH User's Manual

FANC FANB

CPU1 PCI-E 3.0 X4

VGA Port

A VGA port is located on the I/O back panel. Use this port to connect to a compatible VGA display.

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

SXB2

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

JBT1

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

CPU2

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

JNVI2C1

SXB4

PCI-E 3.0 X16

P1-DIMM

1. VGA Port

JF1

P2-DIMM

FAND

P2-DIMM

FANA

Page 41

Chapter 2: Installation

FANC FANB

JNVI2C1

CPU1 PCI-E 3.0 X4

1 2

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and a rear UID LED (UID_LED1) are located on the I/O back

panel. A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press the front or the rear UID switch, both front and rear UID LEDs will be turned on.

Press the UID switch again to turn o󰀨 the LED indicators. The UID indicators provide easy identication of a system that may be in need of service. (Note: UID can also be triggered

via IPMI on the motherboard. For more information, please refer to the IPMI User's Guide posted on our website at http://www.supermicro.com.)

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

JUSB1

IPMI_LAN

BMC

BMC_HB_LED1

SXB3_1

JWD1

PCH

BT1

JSD1

UID Switch

Pin Denitions

VGA

JCOM1

USB0/1(3.0)

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

HDD_LED1

JCPLD1

MAC CODE

BAR CODE

JBT1

P1-DIMM

X11DPT-BH REV:1.00

DESIGNED IN USA

JSIOM1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

P1-DIMM

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

SXB4

PCI-E 3.0 X16

1. UID Switch (JUIDB1)

2. UID LED

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

NMI

Ground

Power Fail LED

OH/PWR Fail/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

Ground

CPU2 PCI-E 3.0 X24

SXB2

JF1

P2-DIMM

CPU1

CPU2

P2-DIMM

FAND

P2-DIMM

FANA

Page 42

X11DPT-BH User's Manual

Universal Serial Bus (USB) Ports

Two USB 3.0 ports are located on the back panel (USB 0/1). (Cables are not included.) See

the table below for pin denitions.

USB (3.0) 0/1 Pin

Denitions

Pin# Denition

1 +5V

2 D-

3 D+

4 Ground

5 RX-

6 RX+

7 Ground

8 TX-

9 TX+

1. USB0/1

JNVI2C1

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

UID_LED1

JUIDB1

I-SATA6

SXB3_1

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

JSDCARD1

P1-DIMM

VGA

JCOM1

BIOS

JBT1

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JF1

CPU1

CPU2

P2-DIMM

FAND

FANC FANB

P2-DIMM

FANA

Page 43

Chapter 2: Installation

Ethernet Ports

A dedicated IPMI LAN port is located on the I/O back panel, and is supported by the BMC (Baseboard Management Controller).

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

UID_LED1

JUIDB1

SXB3_1

I-SATA6

IPMI_LAN

JSD1

JUSB1

USB0/1(3.0)

BMC

BMC_HB_LED1

JWD1

PCH

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

JBT1

P1-DIMM

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

JNVI2C1

1. IPMI LAN

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JF1

CPU1

CPU2

P2-DIMM

FAND

FANC FANB

FANA

P2-DIMM

Page 44

X11DPT-BH User's Manual

FANC FANB

CPU1 PCI-E 3.0 X4

1 2

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

SXB2

IPMI_LAN

JSD1

JUSB1

BMC

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

HDD_LED1

JBT1

FAN3

FAN4

JTPM1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

CPU2

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

JNVI2C1

JF1 Header Pins

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

Ground

Power Fail LED

OH/PWR Fail/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

JF1

P2-DIMM

FAND

P2-DIMM

FANA

P2-DIMM

NMI

Ground

Page 45

Chapter 2: Installation

1 2

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/o󰀨 the system. This button can also be congured to function as a suspend button (with a setting in the BIOS - see Chapter 4). To turn o󰀨 the power when the system

is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Use a cable to connect the two pins to a hardware reset switch on the computer case to reset the system. Refer to the

table below for pin denitions.

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

Ground

Power Fail LED

OH/PWR Fail/Fan Fail LED

1. PWR Button

NIC2 Active LED

2. Reset Button

NIC1 Active LED

HDD LED

3.3V Stby

NMI

PWR LED

Ground

Page 46

X11DPT-BH User's Manual

1 2

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

OH/Fan Fail/PWR Fail/UID LED

Connect an LED cable to pins 7 and 8 of the Front Control Panel (JF1) to use UID/Overheat/ Fan Fail/Power Fail LED connections. The LED on pin 8 provides warnings of overheat, power failure or fan failure. Refer to the tables below for details.

Information LED-UID/OH/PWR Fail/Fan Fail LED

Pin Denitions (Pin 7 & Pin 8 of JF1)

Status Description

Solid red An overheat condition has occurred. (This may be caused by cable congestion).

Blinking red (1Hz) Fan failure: check for an inoperative fan.

Blinking red (0.25Hz) Power failure: check for a non-operational power supply

Solid blue Local UID is activated. Use this function to locate a unit in a rack mount

environment that might be in need of service.

Blinking blue (300 msec) Remote UID is on. Use this function to identify a unit from a remote location that

might be in need of service.

Power Button

Reset Button

UID LED

3.3V Stby

3.3V

NMI

Ground

1. Power Fail LED

2. UID/OH/PWR Fail/Fan Fail LED

Power Fail LED

OH/PWR Fail/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

Ground

Page 47

Chapter 2: Installation

1 2

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

11 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

Power Button

Reset Button

UID LED

3.3V Stby

3.3V

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

Ground

Power Fail LED

OH/PWR Fail/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

1. NIC2 LED

2. NIC1 LED

3. HDD LED

3.3V Stby

NMI

PWR LED

Ground

Page 48

X11DPT-BH User's Manual

1 2

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The Non-Maskable Interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

Power Button

Reset Button

UID LED

3.3V Stby

3.3V

NMI

Ground

Power Fail LED

OH/PWR Fail/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

Ground

1. PWR LED

2. NMI

Page 49

Chapter 2: Installation

FANC FANB

JNVI2C1

2.7 Headers

Onboard Fan Header

This motherboard has four fan headers (FANA~FAND). These 4-pin fan headers are backwardcompatible with traditional 3-pin fans. However, onboard fan speed control is available only when all 4-pin fans are used on the motherboard. Fan speed control is supported by Thermal

Management via IPMI 2.0 interface. See the table below for pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

UID_LED1

JUIDB1

SXB3_1

I-SATA6

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

HDD_LED1

JCPLD1

JBT1

P1-DIMM

X11DPT-BH REV:1.00

DESIGNED IN USA

MAC CODE

BAR CODE

JSIOM1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

P1-DIMM

SXB4

PCI-E 3.0 X16

3 Tachometer

4 PWM Control

1. FANA/FANB

2. FANC/FAND

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JF1

P2-DIMM

CPU1

CPU2

P2-DIMM

FAND

P2-DIMM

FANA

Page 50

X11DPT-BH User's Manual

FANC FANB

JNVI2C1

CPU1 PCI-E 3.0 X4

TPM Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM). A TPM is a security device that supports encryption and authentication in hard drives. It enables the motherboard to deny access if the TPM associated with the hard drive is not installed in the system.

Please go to the following link for more information on TPM: http://www.supermicro.com/

manuals/other/TPM.pdf.

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

SXB3_1

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

JSDCARD1

JBT1

P1-DIMM

VGA

JCOM1

BIOS

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

Trusted Platform Module/Port 80 Header

Pin Denitions

Pin# Denition Pin# Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8

9 +3.3V Stdby 10 SPI_IRQ#

JSIOM1

SXB4

PCI-E 3.0 X16

P1-DIMM

1. TPM/Port 80 Header

CPU2 PCI-E 3.0 X24

SXB2

JF1

P2-DIMM

CPU1

CPU2

P2-DIMM

FAND

P2-DIMM

FANA

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Chapter 2: Installation

FANC FANB

CPU1 PCI-E 3.0 X4

Intel VROC RAID Key Header

The JRK1 header allows the user to enable NVMe RAID functions. Refer to the table below

for pin denitions.

Intel RAID Key

Pin Denitions

Pins Denition

1 GND

2 PU 3.3V Stdby

3 GND

4 PCH RAID KEY

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

IPMI_LAN

JSD1

JUSB1

BMC

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BT1

P1-DIMM

VGA

JSDCARD1

JBT1

P1-DIMM

JCOM1

BIOS

HDD_LED1

FAN3

FAN4

JTPM1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

JNVI2C1

1. VROC RAID Key

SXB2

JF1

P2-DIMM

FAND

P2-DIMM

CPU2

FANA

P2-DIMM

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X11DPT-BH User's Manual

FANC FANB

CPU1 PCI-E 3.0 X4

I-SATA 3.0 and S-SATA 3.0 Ports

The X11DPT-BH has eight SATA 3.0 ports: (I-SATA0~5/S-SATA0~5/I-SATA6 + 1 SATA DOM)

on the motherboard. These SATA ports are supported by the Intel C621 chipset. I-SATA0~5 and S-SATA0~5 are located at SXB1 and are supported by CPU1. All these SATA ports provide serial-link signal connections, which are faster than the connections of Parallel ATA.

Powered SATADOM (SuperDOM)

A SATADOM (Device-on-Disk) is located at I-SATA6 on the motherboard. I-SATA6 is used with a Supermicro SuperDOM, which is a yellow SATADOM connector with a power pin built in, and no external power supply is needed. Supermicro SuperDOM is backward-compatible

with a regular SATA HDD or SATADOM that requires an external power supply. All SATA ports

provide serial-link signal connections, which are faster than the connections of Parallel ATA.

UID_LED1

JPB1

JUIDB1

IPMI_LAN

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JSD1

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

JBT1

P1-DIMM

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

CPU2

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

JNVI2C1

1. I-SATA0-5

2. S-SATA0-5

3. I-SATA6

P2-DIMM

JF1

P2-DIMM

FAND

P2-DIMM

FANA

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Chapter 2: Installation

FANC FANB

JNVI2C1

Micro SD Card

There is one Micro SD memory card slot located at JSDCARD1 on the motherboard.

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

CPU2 PCI-E 3.0 X24

UID_LED1

JUIDB1

I-SATA6

SXB3_1

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

JBT1

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

1. JSDCARD1

SXB2

JF1

P2-DIMM

FAND

P2-DIMM

CPU2

FANA

P2-DIMM

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X11DPT-BH User's Manual

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram

at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the

jumper is o󰀨 the pins.

Connector

Pins

Jumper

Setting

3 2 1

Page 55

Chapter 2: Installation

CPU1 PCI-E 3.0 X4

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

SXB2

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

SIOM:CPU1 PCI-E 3.0 X16

HDD_LED1

BIOS LICENSE

JCPLD1

MAC CODE

BAR CODE

JBT1

P1-DIMM

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

CPU2

P1-DIMM

JBT1 contact pads

JSIOM1

JNVI2C1

SXB4

PCI-E 3.0 X16

1. Clear CMOS

P1-DIMM

P2-DIMM

JF1

P2-DIMM

FAND

FANC FANB

P2-DIMM

FANA

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X11DPT-BH User's Manual

CPU1 PCI-E 3.0 X4

2.9 LED Indicators

IPMI LAN LEDs

A dedicated IPMI LAN, located on the back panel, has two LED indicators. The amber LED on the right of the IPMI LAN port indicates activity, while the LED on the left indicates the speed of the connection. See the table below for more information.

IPMI LAN

Activity LEDLink LED

IPMI LAN LEDs

Color/State Denition

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB3_1

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

Link (left)

Green: Solid

Amber: Solid

Activity (Right) Amber: Blinking Active

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JTPM1

BIOS

HDD_LED1

JCPLD1

JBT1

P1-DIMM

X11DPT-BH REV:1.00

DESIGNED IN USA

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

JNVI2C1

SXB4

PCI-E 3.0 X16

P1-DIMM

100 Mbps

1Gbps

1. IPMI LAN LED

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JF1

CPU1

CPU2

P2-DIMM

FAND

FANC FANB

P2-DIMM

FANA

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Chapter 2: Installation

BMC Heartbeat LED

BMC_HB_LED1 is the BMC heartbeat LED. When the LED is blinking green, BMC is

functioning normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

JPB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X4

JF2

I-SATA0~5 S-SATA0~5

CPU1 PCI-E 3.0 X4

SXB1

CPU2 PCI-E 3.0 X24

UID_LED1

JUIDB1

I-SATA6

SXB3_1

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

VGA

JCOM1

JSDCARD1

BIOS

HDD_LED1

JBT1

FAN3

FAN4

JTPM1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

1. BMC Heartbeat LED

JNVI2C1

SXB2

P2-DIMM

JF1

P2-DIMM

FAND

FANC FANB

P2-DIMM

CPU2

FANA

P2-DIMM

Page 58

X11DPT-BH User's Manual

CPU1 PCI-E 3.0 X4

2.10 PCI-E 3.0 Slots

PCI-Express 3.0 x16

There are two PCI-E 3.0 x16 slots on the motherboard. SXB3 is supported by CPU1 and SXB42 is supported by CPU2. Refer to the layout below for their location.

PCI-Express 3.0 x4

There is one PCI-E 3.0 x4 slot supported by CPU1, located at SXB1. SXB1 is used for I-SATA0~5 and S-SATA0~5. Refer to the layout below for their location.

PCI-Express 3.0 x24

A PCI-E 3.0 x24 slot supported by CPU2 is located at SXB2. Refer to the layout below for the location.

Note 1: For your PCI-E devices to work properly, be sure to use the add-on card devices that are compliant with the PCI-E standard on the motherboard.

UID_LED1

JPB1

JUIDB1

IPMI_LAN

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JSD1

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

SXB2

JUSB1

JWD1

PCH

USB0/1(3.0)

BMC

BMC_HB_LED1

BT1

P1-DIMM

VGA

JCOM1

FAN3

JSDCARD1

FAN4

JBT1

BIOS

JTPM1

HDD_LED1

JCPLD1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

JSIOM1

SXB4

PCI-E 3.0 X16

JNVI2C1

1. SXB3

2. SXB4

3. SXB1

4. SXB2

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

CPU2

P1-DIMM

P2-DIMM

JF1

P2-DIMM

FAND

P2-DIMM

FANA

Page 59

Chapter 2: Installation

JNVI2C1

Super IO Module (SIOM) Networking Slot

There is one SIOM networking slot (PCI-E 3.0 x16) on the motherboard. See the layout below for the location.

CPU1 PCI-E 3.0 X4

UID_LED1

JPB1

JUIDB1

JRK1

CPU1 SLOT1 PCI-E 3.0 X16

SXB3_1

CPU1 PCI-E 3.0 X4

I-SATA6

JF2

I-SATA0~5 S-SATA0~5

SXB1

CPU2 PCI-E 3.0 X24

IPMI_LAN

JSD1

JUSB1

BMC_HB_LED1

JWD1

PCH

USB0/1(3.0)

BMC

BT1

P1-DIMM

JSDCARD1

P1-DIMM

VGA

JCOM1

BIOS

JBT1

FAN3

FAN4

JTPM1

HDD_LED1

JCPLD1

X11DPT-BH REV:1.00

DESIGNED IN USA

CPU1

SIOM:CPU1 PCI-E 3.0 X16

BIOS LICENSE

MAC CODE

BAR CODE

P1-DIMM

JSIOM1

P1-DIMM

SXB4

PCI-E 3.0 X16

1. SIOM

SXB2

JF1

P2-DIMM

CPU2

P2-DIMM

FAND

FANC FANB

P2-DIMM

FANA

Page 60

X11DPT-BH User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink, and connect the internal speaker and the power LED to the motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully seated.)

7. Use the correct type of onboard CMOS battery (BR2032) as recommended by the manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and o󰀨 to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.

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Chapter 3: Troubleshooting

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on beep codes.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and

contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use the same memory type and speed for all DIMMs in the system. See Section 2.4 for memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting the results.

4. Check the power supply voltage 115V/230V switch.

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X11DPT-BH User's Manual

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply may cause the system to lose the CMOS setup information. Refer to Section 1.6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/ system fans, etc., work properly. Check the hardware monitoring settings in the IPMI to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Please refer to our website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working properly, including boot devices such as CD.

2. Cable connection: Check to make sure that all cables are connected and working properly.

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Chapter 3: Troubleshooting

3. Using the minimum conguration for troubleshooting: Remove all unnecessary components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.

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X11DPT-BH User's Manual

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions' (FAQs) sections in this chapter or see the FAQs on our website before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when contacting our technical support department by e-mail.

Page 65

Chapter 3: Troubleshooting

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X11DPT-BH motherboard supports up to 6TB of 3DS LRDIMM/RDIMM/NV-

DIMM DDR-4 (288-pin) ECC 2933*/2666/2400/2133 MHz memory in 24 DIMM slots (*Note below). It also supports up to 9TB memory with DCPMM modules.

Note: Support for 2933MHz memory is dependent on the CPU SKU. See Section 2.4 for details on installing memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before downloading. You can choose from the zip le and the .exe le. If you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run the batch le using the format FLASH.BAT lename.rom from your bootable USB device to ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn o󰀨 the power using the momentary power on/o󰀨 switch?

Answer: The instant power o󰀨 function is controlled in BIOS by the Power Button Mode setting. When the On/O󰀨 feature is enabled, the motherboard will have instant o󰀨 capabilities

as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen that appears when the system is turned on), the momentary on/o󰀨 switch must be held for

more than four seconds to shut down the system. This feature is required to implement the ACPI features on the motherboard.

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X11DPT-BH User's Manual

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power o󰀨 your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to ensure that the battery is securely locked.

Important: When replacing a battery, be sure to only replace it with the same type.

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Chapter 3: Troubleshooting

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alteration, misuse, abuse or improper maintenance of products.

During the warranty period, contact your distributor rst for any product problems.

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Super X11DPT-BH User's Manual

Chapter 4

UEFI BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ setup utility for the X11DPT-BH motherboard. The

BIOS is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to the BIOS that may not be reected

in this manual.

Starting the Setup Utility

To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note that BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values.

A "" indicates a submenu. Highlighting such an item and pressing the <Enter> key will open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (<F1>, <F2>, <F3>, <F4>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during the setup navigation process.

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4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will see the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below.

System Date/System Time

Use this item to change the system date and time. Highlight System Date or System Time using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in Day MM/DD/YYYY format. The

time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is the BIOS build date after the RTC (Real Time Clock) reset.

Supermicro X11DPT-BH

BIOS Version

This feature displays the version of the BIOS ROM used in the system.

Build Date

This feature displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This feature displays the version of the CPLD (Complex-Programmable Logical Device) used in the system.

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Memory Information

Total Memory

This feature displays the total size of memory available in the system.

Memory Speed

This feature displays the default speed of the memory modules installed in the system.

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4.3 Advanced Setup Congurations

Use the arrow keys to select the Advanced submenu and press <Enter> to access the submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, an improper DRAM frequency, or a wrong BIOS timing setting may cause the system to malfunction. When this occurs, restore the setting to the manufacturer default setting.



Boot Conguration

Quiet Boot

Use this feature to select the screen between displaying POST messages or the OEM logo at bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

Note: POST message is always displayed regardless of the item setting.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to use the current AddOn ROM display settings. Select Force BIOS to use the Option ROM display mode set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are O󰀨 and On.

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Wait For 'F1' If Error

Select Enabled to force the system to wait until the <F1> key is pressed if an error occurs. The options are Disabled and Enabled.

INT19 Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this feature is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately to allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

When EFI (Extensible Firmware Interface) Boot is selected, the system BIOS will automatically reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to allow the BIOS to automatically reboot the system from a Legacy boot device after an initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB Support

Select Enabled to install Windows 7 and the XHCI drivers for USB keyboard/mouse support.

After you've installed the Windows 7 and XHCI drivers, be sure to set this feature to "Disabled" (default). The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The

options are Enabled and Disabled.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more than 5 minutes. The options are Enabled and Disabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power O󰀨 for the system power to remain o󰀨 after a power loss. Select Power On for the system power to be turned

on after a power loss. Select Last State to allow the system to resume its last power state

before a power loss. The options are Stay O󰀨, Power On, and Last State.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4

Seconds Override for the user to power o󰀨 the system after pressing and holding the power button for 4 seconds or longer. Select Instant O󰀨 to instantly power o󰀨 the system as soon

as the user presses the power button. The options are 4 Seconds Override and Instant O󰀨.

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Throttle on Power Fail

This feature allows to decrease system power by throttling CPU frequency when one power supply fails. The options are Diabled and Enabled.

System Fireware Progress Log

This allows to view the system reware progress. The options are Diabled and Enabled.



CPU Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunction.



Processor Conguration

The following CPU information will be displayed:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The options are Enable and Disable.

Core Enabled

Use this feature to enable or disable CPU cores in the processor specied by the user. Use

the <+> key and the <-> key on the keyboard to set the desired number of CPU cores you want to enable in a processor. Please note that the maximum of 16 CPU cores are currently available in each CPU package. The default setting is 0.

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Monitor/Mwait

Select Enable to support Monitor and Mwait, which are two instructions in Streaming SIMD Extension 3 (SSE3), to improve synchronization between multiple threads for CPU performance enhancement. The options are Auto, Enable, and Disable.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit support which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor,

damaging the system during a virus attack. The options are Enable and Disable. (Refer to Intel and Microsoft websites for more information.)

Intel Virtualization Technology (Available when two processors are installed on the motherboard)

Select Enable to use Intel Virtualization Technology which will allow multiple workloads to share the same set of common resources. On shared virtualized hardware, various workloads (or tasks) can co-exist, sharing the same resources, while functioning in full independence from each other, and migrating freely across multi-level infrastructures and scale as needed. The settings are Enable and Disable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.

The options are Unlock/Enable and Lock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the hardware prefetcher will prefectch data from the main system memory to Level 2 cache to help expedite data transaction for memory performance ehancement. The options are Disable and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and

Enable.

Note: Please power o󰀨 and reboot the system for the changes you've made to take

e󰀨ect. Please refer to Intel’s website for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing and processing to enhance CPU performance. The options are Disable and Enable.

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DCU IP Prefetcher

This feature allows the system to use the sequential load history, which is based on the instruction pointer of previous loads, to determine whether the system will prefetch additional lines. The options are Enable and Disable.

LLC Prefetch

If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be supported. The options are Disable and Enable.

Extended APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Enable and Disable.

Advanced Power Management Conguration

Power Technology

Select Energy E󰀩cient to support power-saving mode. Select Custom to customize system

power settings. Select Disabled to disable power-saving settings. The options are Disable, Energy E󰀩cient, and Custom.

Power Performance Tuning (Available when "Power Technology" is set to Custom)

Select BIOS to allow the system BIOS to congure the Power-Performance Tuning Bias

setting. The options are BIOS Controls EPB and OS Controls EPB.

ENERGY_PERF_BIAS_CFG Mode (ENERGY PERFORMANCE BIAS CONFIGURATION Mode) (Available when "Power Performance Tuning" is set to

BIOS Controls EPB)

Use this feature to congure the optimal operation setting for your machine by achieving the desired system performance level and energy saving (e󰀩ciency) level at the same time.

Select Maximum Performance to maximize system performance to its highest potential; however, this may consume maximal amount of power as energy is needed to fuel the processor frequency. (In other words, system performance is gained at the cost of system

power e󰀩ciency, depending on the workload.) Select Maximum Power E󰀩ciency to minimize

power use; however, system performance will be greatly impacted as the result of power saving. The options are Maximum Performance, Performance, Balanced Performance,

Balanced Power, Power, and Max (Maximum) Power E󰀩cient.

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CPU P State Control (Available when "Power Technology" is set to

Custom)

SpeedStep (P-States)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust

processor voltage and core frequency in an e󰀨ort to reduce power consumption and heat dissipation. Please refer to Intel’s website for detailed information. The options are Disable

and Enable.

*If SpeedStep (P-States) is set to Enable, the following items will display:

Cong (Conguring) TDP (Available when SpeedStep is set to Enable and when

the 2nd Gen Intel Xeon Scalable-SP 8260Y/6240Y/4214Y Processors are Used)

This feature allows the user to congure the maximum CPU TDP (Thermal Design Power)

level for the system. The TDP level is subject to chassis and heatsink cooling restrictions.

For proper thermal management, please check the chassis and heatsink specications

for proper CPU TDP sizing. The options are Normal, Level 1 and Level 2.

Intel Speed Select (Available when SpeedStep is set to Enable and when the 2nd Gen Intel Xeon Scalable-SP 8260Y/6240Y/4214Y Processors are Used)

This feature allows the user to congure up to two additional base frequency settings

for the processors used in your system as shown in the display below. The options are

Base, Cong (Conguration) 1 and Cong (Conguration) 2.

Activate PBF (Available when SpeedStep is set to Enable and when the 2nd Gen Intel Xeon Scalable-SP 6252N/6230N/5218N Processors are Used)

Select Enable to support Prioritized Base Frequency (PBF), which will increase the base frequency on high-priority cores and decrease the base frequency on low-priority cores to improve CPU performance. The options are Disable and Enable.

Congure PBF (Available when Activate PBF is set to Enable)

Select Enable to allow the BIOS to congure high priority CPU cores as Prioritized Base Frequency (PBF) so that software programs do not have to congure the PBF settings.

This feature is available when it is supported by the CPUs used in the system. The options are Enable and Disable.

EIST PSD Function (Available when SpeedStep is set to Enable)

Use this feature to congure the processor's P-State coordination settings. During a P-State,

the voltage and frequency of the processor will be reduced when it is in operation. This

makes the processor more energy e󰀩cient, resulting in further energy gains. The options

are HW_ALL, SW_ALL and SW-ANY.

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Turbo Mode (Available when SpeedStep is set to Enable)

Select enable to allow the CPU to operate at the manufacturer-dened turbo speed by

increasing CPU clock frequency. This feature is available when it is supported by the CPUs used in the system. The options are Disable and Enable.

Hardware PM (Power Management) State Control (Available when

"Power Technology" is set to Custom)

Hardware P-States

If this feature is set to Disable, system hardware will choose a P-state setting for the system based on an OS request. If this feature is set to Native Mode, hardware will choose a P-state setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support, system hardware will choose a P-state setting independently without OS guidance. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor core to control its C-State setting automatically and independently. The options are Disable and Enable.

CPU C6 Report (Available when Autonomous Core C-State is set to Disable)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating system. During the CPU C6 state, power to all caches is turned o󰀨. The options are Auto, Enable, and Disable.

Enhanced Halt State (C1E) (Available when Autonomous Core C-State is set to Disable)

Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the

CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a "Halt State." The options are Disable and Enable.

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Package C State Control (Available when "Power Technology" is set

to Custom)

Package C State

This feature is used to optimize and reduce CPU package power consumption in idle mode.

Please note that the changes you've made in this setting will a󰀨ect all CPU cores or the circuits of the entire system. The options are C0/C1 state, C2 state, C6 (non-Retention)

state, C6 (Retention) state, No Limit, and Auto.

CPU T State Control Available when "Power Technology" is set to

Custom)

Software Controlled T-States

If this feature is set to Enable, CPU throttling settings will be supported by the software of the system. The options are Enable and Disable.

Chipset Conguration

Warning: Setting the wrong values in the following items may cause the system to malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

UPI (Ultra Path Interconnect) Conguration

This section displays the following UPI General Conguration information:

• Number of CPU

• Number of Active UPI Link

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI PCI-E Conguration Base/Size

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Degrade Precedence

Use this feature to select the degrading precedence option for Ultra Path Interconnect (UPI) connections. Select Topology Precedent to degrade UPI features if system options are in

conict. Select Feature Precedent to degrade UPI topology if system options are in conict.

The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for the system BIOS to enable Link L0p support which will allow the CPU to reduce the UPI links from full width to half width in the event when the CPU's workload is low in an attempt to save power. This feature is available for the system that uses Intel processors with UPI technology support. The options are Disable, Enable, and Auto.

Note: You can change the performance settings for non-standard applications by us- ing this parameter. It is recommended that the default settings be used for standard applications.

Link L1 Enable

Select Enable for the BIOS to activate Link L1 support which will power down the UPI links to save power when the system is idle. This feature is available for the system that uses Intel processors with UPI technology support. The options are Disable, Enable, and Auto.

Note: Link L1 is an excellent feature for an idle system. L1 is used during Package C-States when its latency is hidden by other components during a wakeup.

IO Directory Cache (IODC)

Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to

generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WCiLF.

SNC

Select Enable to use "Sub NUMA Clustering" (SNC), which supports full SNC (2-cluster) interleave and 1-way IMC interleave. Select Auto for 1-cluster or 2-cluster support depending on the status of IMC (Integrated Memory Controller) Interleaving. The options are Disable, Enable, and Auto.

XPT Prefetch

Select Enable for XPT (Extended Prediction Table) Prefetch support which will allow an LLC request to be duplicated and sent to an appropriate memory controller based on the recent LLC history to reduce latency. The options are Enable, and Disable.

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KTI Prefetch

If this feature is set to Enable, the KTI prefetcher will preload the L1 cache with data

deemed relevant to allow the memory read to start earlier on a DDR bus in an e󰀨ort to

reduce latency. The options are Enable and Disable.

Local/Remote Threshold

This feature allows the user to set the threshold for the Interrupt Request (IRQ) signals, which handle hardware interruptions. The options are Disable, Auto, Low, Medium, and High.

Stale AtoS (A to S)

The in-memory directory has three states: I, A, and S states. The I (-invalid) state indicates that the data is clean and does not exist in the cache of any other sockets. The A (-snoop

All) state indicates that the data may exist in another socket in an exclusive or modied

state. The S state (-Shared) indicates that the data is clean and may be shared in the caches across one or more sockets. When the system is performing "read" on the memory and if the directory line is in A state, we must snoop all other sockets because another

socket may have the line in a modied state. If this is the case, a "snoop" will return the modied data. However, it may be the case that a line "reads" in an A state, and all the

snoops come back with a "miss". This can happen if another socket reads the line earlier and then has silently dropped it from its cache without modifying it. If the "Stale AtoS" feature is enabled, a line will transition to the S state when the line in the A state returns only snoop misses. That way, subsequent reads to the line will encounter it in the S state and will not have to snoop, saving the latency and snoop bandwidth. Stale "AtoS" may be

benecial in a workload where there are many cross-socket reads. The options are Disable,

Enable, and Auto.

LLC Dead Line Alloc

Select Enable to opportunistically ll the dead lines in the LLC. The options are Enable, Disable, and Auto.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements. This feature is especially important for the Virtualization Technology. The options are Disable, Enable, and Auto.

Memory Conguration

Integrated Memory Controller (iMC)

Enforce POR (Plan of Record)

Select POR to enforce POR restrictions for DDR4 memory frequency and voltage programming. The options are POR and Disable.

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PPR Type

Post Package Repair (PPR) is a new feature available for the DDR4 Technology. PPR provides additional spare capacity within a DDR4 DRAM module that is used to replace

faulty cell areas detected during system boot. PPR o󰀨ers two types of memory repairs. Soft Post Package Repair (sPPR) provides a quick, temporary x on a raw element in a

bank group of a DDR4 DRAM device, while hard Post Package Repair (hPPR) will take a longer time to provide a permanent repair on a raw element. The options are Auto, Soft PPR, Hard PPR, and PPR Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 1866, 2000, 2133, 2400, 2666, and 2933. (Note: Support for 2933MHz memory is dependent on the CPU SKU.)

Data Scrambling for DDR4

Select Enable to enable data scrambling for DDR4 memory to enhance system performance and security. Select Auto for the default setting of the Memory Reference Code (MRC) to

set congure data scrambling for DDR4 setting. The options are Auto, Disable, and Enable.

tCCD_L Relaxation

If this feature is set to Auto, SPD (Serial Presence Detect) will automatically override

tCCD_L ("Column to Column Delay-Long", or “Command to Command Delay-Long” on the

column side) based on memory frequency. If this feature is set to Disable, tCCD_L will be enforced based on the memory frequency. The options are Auto, and Disable.

tRWSR (Read to Write turnaround time for Same Rank) Relaxation

Select Enable to use the same tRWSR DDR timing setting among all memory channels, and in which case, the worst case value among all channels will be used. Select Disable

to use di󰀨erent values for the tRWSR DDR timing settings for di󰀨erent channels as trained.

The options are Disable, and Enable.

2X Refresh

Select Enable for memory 2X refresh support to enhance memory performance. The options are Enable, and Auto.

Page Policy

Use this feature to set the page policy for onboard memory support. The options are Closed, Adaptive, and Auto.

IMC Interleaving

Use this feature to congure interleaving settings for the IMC (Integrated Memory

Controller), which will improve memory performance. The options are 1-way Interleave, 2-way Interleave, and Auto.

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Memory Topology

This displays the information of onboard memory modules as detected by the BIOS.

Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance. The options are Enable and Disable.

Mirror Mode

Use this feature to congure the mirror mode settings for all 1LM/2LM memory modules

installed in the system which will create a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into half. The options are

Disable, Mirror Mode 1LM, and Mirror Mode 2LM.

Memory Rank Sparing

Select Enable to support memory-rank sparing to optimize memory performance. The options are Enable and Disable.

Note: This item will not be available when memory mirror mode is set to Mirror Mode 1LM or an AEP device is plugged in.

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Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default setting is 512.

Intel Run Sure

Select Enable to use Intel Run Sure Technology which will enhance critical data protection and increase system uptime and resiliency. The options are Enable and Disable.

SDDC Plus One

SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-bit

max.) memory faults that a󰀨ect an entire single x4 DRAM device. SDDC Plus One, an

enhanced feature to SDDC, copies data stored in a faulty DRAM device to a spare device when an SDDC event has occurred. After the event, the SDDC+1 ECC mode is activated

to protect against any additional memory failure caused by a ‘single-bit’ error in the same

memory rank. The options are Enable and Disable. (Note: SDDC or SDDC Plus One is available when it is supported by the processors installed on the motherboard.)

ADDDC Sparing (Available when Intel Run Sure is set to Enable)

ADDDC (Adaptive Double DRAM Device Correction) Sparing, which is an improved feature

of ADDDC, will allow the error correction code to correct an error caused by the failure of two DRAM devices or by a single-bit error that is beyond a device failure in the lockstep mode. The options are Enable and Disable. (Note: Virtual lockstep mode will only start to work for ADDDC after a faulty DRAM module is spared out at Bank granularity or Rank granularity.)

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected in a memory module and send the corrections to the requestor (the original source). When this feature is set to Enable, the IO hub will read and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this

method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The

options are Enable and Disable.

Patrol Scrub Interval (Available when Patrol Scrub is set to Enable)

Use this item to specify the number of hours (between 0 to 24) required for the system to complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically. The default setting is 24.

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IIO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor will always remain clear during electric tuning. The options are Disable and Enable.

CPU1 Conguration/CPU2 Conguration

IOU0 (IIO PCIe Br1)

Use this feature to congure the PCI-E Bifurcation setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

Use this feature to congure the PCI-E Bifurcation setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

Use this feature to congure the PCI-E Bifurcation setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU1 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1

Conguration only)

Link Speed

Use this feature to congure the link speed of a PCI-E port specied by the user. The options are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation 3) (8 GT/s)

The following information will be displayed:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Max Payload Size (Available for CPU 1 Conguration only)

Select Auto for the system BIOS to automatically set the maximum payload value for a

PCI-E device specied by to user for system performance enhancement. The options are

Auto, 128B, and 256B.

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IOAT Conguration

Disable TPH

TPH (TLP Processing Hint) is used for data-tagging with a destination ID and a few important attributes. It can send critical data to a particular cache without writing through to memory. Select No in this item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints" to help optimize the processing of each transaction occurred in

the target memory space. The options are Yes and No.

Prioritize TPH (TLP Processing Hint)

Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate

and optimize the processing of certain transactions in the system memory. The options are Enable and Disable.

Relaxed Ordering

Select Enable to allow certain transactions to be processed and completed before other transactions that have already been enqueued. The options are Disable and Enable.

Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables. This feature o󰀨ers fully-protected I/O resource sharing across Intel platforms,

providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable.

ACS (Access Control Services) Control

Select Enable to program Access Control Services to Chipset PCI-E Root Port Bridges. Select Disable to program Access Control Services to all PCI-E Root Port Bridges. The options are Enable and Disable.

Interrupt Remapping

If this feature is set to Enable, I/O DMA transfer remapping and device-generated interrupts

will be supported. The options are Enable and Disable.

PassThrough DMA

Select Enable for the Non-Isoch VT-d engine to pass through DMA (Direct Memory Access) to enhance system performance. The options are Enable and Disable.

ATS

Select Enable to enable ATS (Address Translation Services) support for the Non-Isoch VT-d engine to enhance system performance. The options are Enable and Disable.

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Posted Interrupt

Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be sent directly from a direct-assigned device to a client machine in non-root mode to improve

virtualization e󰀩ciency by simplifying interrupt migration and lessening the need of physical

interrupts. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Isoch VT-d engine to pass through DMA (Direct Memory Access) to enhance system performance. The options are Enable and Disable.

Intel® VMD Technology

This section describes the conguration settings for the Intel Volume Management Device

(VMD) Technology.

Notes: 1. After you’ve enabled VMD in the BIOS on a PCI-E slot of your choice, this PCI-E slot will be dedicated for VMD use only, and it will no longer support any PCI-E device. To re-activate this slot for PCI-E use, please disable VMD in the BIOS. 2. PCI-E

slots and naming di󰀨er depending on the PCI-E devices installed on your motherboard.

Intel® VMD for Volume Management Device on CPU1

VMD Conguration for PStack0/VMD Conguration for PStack1/VMD Conguration for PStack2

Intel® VMD for Volume Management Device for PStack0/Intel® VMD for Volume Management Device for PStack1/Intel® VMD for Volume Management Device for PStack2

Select Enable to enable Intel Volume Management Device Technology support for the root port specied by the user. The options are Enable and Disable.

*If Intel® VMD for Volume Management Device for PStack0 is set to Enable, the fol-

lowing item will display.

CPU1 Slot1 VMD Port 2A/CPU1 Slot1 VMD Port 2B/CPU1 Slot1 VMD Port 2C/ CPU1 Slot1 VMD Port 2D

Select Enable to enable Intel Volume Management Device Technology support for the

PCI-E slot specied by the user. The options are Enable and the Disable.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specied by the user, which

will allow the user to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

*If Intel® VMD for Volume Management Device for PStack1 is set to Enable, the fol-

lowing item will display.

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CPU1 SXB1 M.2 VMD Port 3C/CPU1 JF2 M.2 VMD Port 3D

Select Enable to enable Intel Volume Management Device Technology support for the

PCI-E slot specied by the user. The options are Enable and the Disable.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specied by the user,

which will allow the user to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

Intel® VMD for Volume Management Device on CPU2

VMD Conguration for PStack0

Select Enable to enable Intel Volume Management Device Technology support for the root port specied by the user. The options are Enable and Disable.

*If Intel® VMD for Volume Management Device for PStack0 is set to Enable, the fol-

lowing item will display.

CPU2 SXB2 NVMe/SAS VMD Port 1A/CPU2 SXB2 NVMe/SAS VMD Port 1B

Select Enable to enable Intel Volume Management Device Technology support for the

PCI-E slot specied by the user. The options are Enable and the Disable.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specied by the user, which

will allow the user to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

*If Intel® VMD for Volume Management Device for PStack1 is set to Enable, the fol-

lowing item will display.

VMD Conguration for PStack1

Select Enable to enable Intel Volume Management Device Technology support for the root port specied by the user. The options are Enable and Disable.

*If Intel® VMD for Volume Management Device for PStack1 is set to Enable, the fol-

lowing item will display.

CPU2 Slot2 VMD Port 2A/CPU2 Slot2 VMD Port 2B/CPU2 Slot2 VMD Port 2C/ CPU2 Slot2 VMD Port 2D

Select Enable to enable Intel Volume Management Device Technology support for the

PCI-E slot specied by the user. The options are Enable and the Disable.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specied by the user, which

will allow the user to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

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VMD Conguration for PStack2

*If Intel® VMD for Volume Management Device for PStack2 is set to Enable, the following item will display.

CPU2 SXB2 NVMe/VMD Port 3A/CPU2 SXB2 NVMe/VMD Port 3B/ CPU2 SXB2 NVMe/VMD Port 3C/CPU2 SXB2 NVMe/VMD Port 3D

Select Enable to enable Intel Volume Management Device Technology support for the

PCI-E slot specied by the user. The options are Enable and the Disable.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specied by the user, which

will allow the user to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

IIO-PCIE Express Global Options

IIO-PCIE Express Global Options

The section allows the user to congure the following PCI-E global option:

PCI-E Completion Timeout (Global) Disable

Use this feature to select the PCI-E Completion Time-out settings. The options are Yes,

No, and Per-Port.

South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support if there are no legacy USB devices present. Select Disable to have all USB devices available for EFI applications only. The options are Enabled, Disabled and Auto.

XHCI Hand-O󰀨

This is a work-around solution for operating systems that do not support XHCI (Extensible

Host Controller Interface) hand-o󰀨. The XHCI ownership change should be claimed by the

XHCI driver. The options are Disabled and Enabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete

legacy USB keyboard support for the operating systems that do not support legacy USB devices. The options are Enabled and Disabled.

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PCIe PLL SSC

Select Enabled for PCH PCI-E Spread Spectrum Clocking support, which will allow the BIOS to monitor and attempt to reduce the level of Electromagnetic Interference caused by the components whenever needed. The options are Enable and Disable.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

• General ME Conguration

• Oper. (Operational) Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1/ME Firmware Status #2

• Current State

• Error Code

PTT Support (Available when TPM Conguration is set to Disable.)

Select Enable to support Intel® Platform Trust Technology (PTT) to enhance system security and data integrity. Intel PTT technology integrates the Host software stack, the system BIOS,

Manageability Engine (ME) features, and the PCH to run on Intel's TCG (Trusted Computing Group) in conjunction with the TPM (Trusted Platform Module) rmware installed in your

system to ensure data security and integrity. The options are Disable and Enable.

Suppress PTT Commands (Available when PTT Support is set to Enable.)

Select Enable to bypass TPM2 commands and submit the system to the PTT (Platform Trust Technology) Firmware.



PCH SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip. The options are Enable and Disable.

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Congure SATA as (Available when SATA Controller is set to Enable)

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)

SATA HDD Unlock (Available when SATA Controller is set to Enable)

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

SATA RSTe Boot Select (Available when Congure SATA as is set to RAID)

Select Enable for full int13h support which will allow the system to boot using a device attached to the SATA controller. The options are Disable and Enable.

Aggressive Link Power Management

When this feature is set to Enable, the SATA AHCI controller manages the power use of the SATA link. The controller will put the link in a low power mode during an extended period of

I/O inactivity, and will return the link to an active state when I/O activity resumes. The options

are Enable and Disable.

SATA RAID Option ROM/UEFI Driver (Available when Congure SATA as is set to

RAID)

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 - SATA Port 7

Hot Plug

Select Enable to support Hot-plugging for the device installed on a selected SATA port which will allow the user to replace the device installed in the slot without shutting down the system. The options are Enable and Disable.

Spin Up Device

When this feature is set to Enable, the SATA device installed on the SATA port specied by

the user will start a COMRESET initialization when an edge is detected from 0 to 1. The options are Enable and Disable.

SATA Device Type

Use this feature to specify if the device installed on the SATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

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

PCH sSATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the sSATA devices that are supported by the sSATA controller and displays the following items:

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel PCH. The options are Enable and Disable.

Congure sSATA as (Available when sSATA Controller is set to Enable)

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI

and RAID. (Note: This feature is hidden when the sSATA Controller item is set to Disabled.)

SATA HDD Unlock (Available when sSATA Controller is set to Enable)

Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.

SATA RSTe Boot Select (Available when Congure SATA as is set to RAID)

Select Enable for full int13h support which will allow the system to boot using a device attached to the SATA controller. The options are Disable and Enable.

Aggressive Link Power Management

When this feature is set to Enable, the sSATA AHCI controller manages the power use of the sSATA link. The controller will put the link in a low power mode during an extended period of

I/O inactivity, and will return the link to an active state when I/O activity resumes. The options

are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver (Available when Congure sSATA as is set to

RAID)

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 - sSATA Port 5

Hot Plug

Select Enable to support Hot-plugging for the device installed on an sSATA port specied by

the user which will allow the user to replace the device installed in the slot without shutting down the system. The options are Enable and Disabled.

Spin Up Device

This setting allows the SATA device installed on the SATA port specied by the user to

start a COMRESET initialization when an edge is detected from 0 to 1. The options are Enable and Disable.

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sSATA Device Type

Use this feature to specify if the device installed on the sSATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

• PCI Devices Common Settings

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.

The options are Enabled and Disabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled and Disabled.

MMIOHBase

Use this feature to select the base memory size according to memory-address mapping for the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T, 40T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for

the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

This feature determines how the lowest MMCFG (Memory-Mapped Conguration) base is assigned to onboard PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.

NVMe Firmware Source

This feature determines which type of the NVMe rmware should be used in your system.

The options are Vendor Dened Firmware and AMI Native Support.

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VGA Priority

Use this feature to select the graphics device to be used as the primary video display for system boot. The options are Onboard and O󰀨board.

RSC-R1UTP-E16R PCI-E 3.0 x16 OPROM/RSC-P-6 PCI-E 3.0 x16 OPROM/CPU1 SXB1 PCI-E 3.0 x4 OPROM/CPU1 JF2 PCI-E 3.0 x4 OPROM/SIOM CPU1 PCI-E 3.0 x16 OPROM

Select EFI to allow the user to boot the computer using an EFI (Extensible Firmware

Interface) device installed on the PCI-E slot specied by the user. Select Legacy to boot the computer using a legacy device installed on the PCI-E slot specied by the user.

The options are Disabled, Legacy and EFI. (Note: Riser card names may di󰀨er in each system.)

Onboard SAS Option ROM

Select EFI to allow the user to boot the computer using an EFI (Extensible Firmware Interface) device installed on the SAS connector. Select Legacy to boot the computer using a legacy device installed on the SAS connector. The options are Disabled, Legacy and EFI. (Note:

Riser card names may di󰀨er in each system.)

Bus Master Enable

If this setting is set to Enabled, the PCI Bus Driver will enable the Bus Master Attribute for DMA transactions. If this setting is set to Disabled, the PCI Bus Driver will disable the Bus Master Attribute for Pre-Boot DMA protection. The options are Disabled and Enabled.

Onboard NVMe1 Option ROM/Onboard NVMe2 Option ROM/Onboard NVMe3 Option ROM/ Onboard NVMe4 Option ROM/ Onboard NVMe5 Option ROM/ Onboard NVMe6 Option ROM

Select EFI to allow the user to boot the computer using an EFI (Extensible Firmware Interface)

device installed on the NVMe slot specied by the user. Select Legacy to allow the user to boot the computer using a legacy device installed on the PCI-E slot specied by the user. The

options are Disabled, Legacy and EFI. (Note: NVMe device names may di󰀨er in each system.)

Onboard Video OPROM (Option ROM)

Select EFI to allow the user to boot the computer using the EFI (Extensible Firmware Interface) device installed on the onboard video port. Select Legacy to allow the user to boot the computer using a legacy device installed on the onboard video port. The options are Disabled, Legacy and EFI

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

Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

IPv4 PXE Support

Select Enabled to enable IPv4 PXE boot support. If this feature is disabled, it will not create the IPv4 PXE boot option. The options are Disabled and Enabled.

IPv4 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. If this feature is disabled, it will not create the IPv4 HTTP boot option. The options are Enabled and Disabled.

IPv6 PXE Support

Select Enabled to enable IPv4 PXE boot support. If this feature is disabled, it will not create the IPv4 PXE boot option. The options are Disabled and Enabled.

IPv6 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. If this feature is disabled, it will not create the IPv4 HTTP boot option. The options are Enabled and Disabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The default is 0.

Media Detect Time

Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media (Internet connection or LAN port). The default is 1.



Super IO Conguration

Super IO Chip AST2500



Serial Port 1 Conguration

Serial Port 1

Select Enabled to enable Serial Port 1. The options are Enabled and Disabled.

Device Settings (Available when the item above "Serial Port (1)" is set to Enabled)

This item displays the base I/O port address and the Interrupt Request address of a serial port specied by the user.

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Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=2F8h; IRQ=4), (IO=3E8h; IRQ=4), and (IO=2E8h; IRQ=4).



Serial Port 2 Conguration

Serial Port 2

Select Enabled to enable Serial Port 2. The options are Enabled and Disabled.

Device Settings (Available when the item above "Serial Port ((2))" is set to Enabled)

This feature displays the base I/O port address and the Interrupt Request address of a serial port specied by the user.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a serial port specied.

The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h; IRQ=3), (IO=3E8h; IRQ=3); and (IO=2E8h; IRQ=3).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection. The options are COM and SOL.



Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client machine to be connected to a host machine at a remote site for networking. The options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for conguration:

COM 1



Console Redirection Settings (for COM 1)

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key

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support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused by bu󰀨er overow. Send a "Stop" signal to stop sending data when the receiving bu󰀨er is full. Send a "Start" signal to start sending data when the receiving bu󰀨er is empty. The

options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.

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Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection for Legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable Legacy Console Redirection after BIOS POST. When the option-Bootloader is selected, Legacy Console Redirection is disabled before booting the OS. When the option-Always Enable is selected, Legacy Console Redirection remains enabled upon OS bootup. The options are Always Enable and Bootloader.

SOL (Serial-Over-LAN)/COM2

Console Redirection (for SOL/COM2)

Select Enabled to use the SOL port for Console Redirection. The options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for user's

conguration:



Console Redirection Settings (for SOL/COM2)

Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are 7 (Bits) and 8 (Bits).

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Parity

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused by bu󰀨er overow. Send a "Stop" signal to stop sending data when the receiving bu󰀨er is full. Send a "Start" signal to start data-sending when the receiving bu󰀨er is empty. The

options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection for Legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

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

Legacy Console Redirection Settings

Use this feature to select the COM port to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and COM2/SOL.

Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS)

The feature allows the user to congure Console Redirection settings to support Out-of-

Band Serial Port management.

Console Redirection (for EMS)

Select Enabled to use a COM port specied by the user for EMS Console Redirection. The

options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for user's

conguration:

Console Redirection Settings (for EMS)

Out-of-Band Management Port

This feature selects a serial port in a client server to be used by the Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are

COM1 (Console Redirection) and COM2/SOL (Console Redirection).

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per Second

This feature sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in both host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused by bu󰀨er overow. Send a "Stop" signal to stop data-sending when the receiving bu󰀨er

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is full. Send a "Start" signal to start data-sending when the receiving bu󰀨er is empty. The

options are None, Hardware RTS/CTS, and Software Xon/Xo󰀨.

The setting for each these features is displayed:

Data Bits, Parity, Stop Bits



ACPI Settings

Use this feature to congure Advanced Conguration and Power Interface (ACPI) power

management settings for your system.

NUMA Support (Available when the OS supports this feature)

Select Enabled to enable Non-Uniform Memory Access support to enhance system performance. The options are Enabled and Disabled.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring. The options are Enabled and Disabled.

High Precision Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Enabled and Disabled.

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Specifications and Main Features

Frequently Asked Questions

User Manual