Supermicro X10DRL-C operation manual

X10DRL-CT

X10DRL-iT

X10DRL-C

USER’S MANUAL

Revision 1.0b

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.

Manual Revision 1.0b
Release Date: March 31, 2016
Unless you request and r
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Copyright © 2016 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

eceive written permission from Super Micro Computer, Inc., you may not

Preface

This manual is written for system integrators, IT Professionals, and

knowledgeable PC users. It provides information for the installation and use of the

X10DRL-CT/-iT/-C motherboard.

About This Motherboard

The Super X10DRL-CT/-iT/-C motherboard supports dual Intel E5-2600v3/v4

Series Processors (Socket R3) that offer new Intel Microarchitecture 22nm (E5-

2600v3)/14nm (E5-2600v4) Process Technology, delivering the best balanced

solution of performance, power efciency, and features to address the diverse needs

of next-generation data centers. With the PCH C612 built in, the X10DRL-CT/-iT/-

C motherboard supports Intel® Management Engine, MCTP Protocol, and Node

Manager 3.0. This motherboard is ideal for cost-optimzed and general-purpose

server platforms. Please refer to our website (http://www.supermicro.com) for CPU

and memory support updates.

Manual Organization

Chapter 1 describes the features, specications and performance of the moth-

erboard. It also provides detailed information about the Intel PCH C612 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules and other hardware components into the

system. If you encounter any problems, see Chapter 3, which describes trouble-

shooting procedures for video, memory, and system setup stored in CMOS.

Chapter 4 includes an introduction to BIOS, and provides detailed information on

running the BIOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists Software Installation Instructions.

Appendix C contains UEFI BIOS Recovery instructions.

Preface

iii

X10DRL-CT/-iT/-C Motherboard User’s Manual

Conventions Used in the Manual

Pay special attention to the following symbols for proper system installation:

Warning: Important information given to ensure proper system installation or to prevent

damage to the components or injury to yourself;

Note: Additional information given to ensure proper system conguration

and setup.

iv

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Preface

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

v

X10DRL-CT/-iT/-C Motherboard User’s Manual

Table of Contents

Preface

Chapter 1 Overview

1-1 Overview ......................................................................................................... 1-1

1-2 Processor and Chipset Overview...................................................................1-11

1-3 Special Features ........................................................................................... 1-12

Recovery from AC Power Loss ..................................................................... 1-12

1-4 PC Health Monitoring .................................................................................... 1-12

Fan Status Monitor with Firmware Control .................................................. 1-12

Environmental Temperature Control ............................................................. 1-12

System Resource Alert ................................................................................. 1-12

1-5 ACPI Features ............................................................................................... 1-13

1-6 Power Supply ................................................................................................ 1-13

1-7 Advanced Power Management ..................................................................... 1-14

Intel® Intelligent Power Node Manager (NM) (Available when "Supermicro

Power Management (SPM)" is Installed) ...................................................... 1-14

Management Engine (ME) ............................................................................ 1-14

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

Battery Handling .............................................................................................. 2-1

Product Disposal ............................................................................................. 2-3

2-2 Static-Sensitive Devices .................................................................................. 2-4

Precautions ..................................................................................................... 2-4

Unpacking ....................................................................................................... 2-4

2-3 Processor and Heatsink Installation................................................................ 2-5

Installing the Processor ................................................................................. 2-5

Installing a Passive CPU Heatsink ................................................................. 2-9

Removing the Heatsink ................................................................................. 2-10

2-4 Installing and Removing the Memory Modules ..............................................2-11

Installing & Removing DIMMs ........................................................................2-11

Removing Memory Modules ..........................................................................2-11

2-5 Motherboard Installation ................................................................................ 2-14

Tools Needed ................................................................................................ 2-14

Location of Mounting Holes .......................................................................... 2-14

Installing the Motherboard ............................................................................ 2-15

2-6 Control Panel Connectors and I/O Ports ...................................................... 2-16

Back Panel Connectors and I/O Ports .......................................................... 2-16

vi

Table of Contents

Back Panel I/O Port Locations and Denitions ........................................... 2-16

Serial Ports ............................................................................................... 2-17

Video Connection ..................................................................................... 2-17

Universal Serial Bus (USB) ...................................................................... 2-18

Ethernet Ports .......................................................................................... 2-19

Unit Identier Switch/UID LED Indicator .................................................. 2-20

Front Control Panel ....................................................................................... 2-21

Front Control Panel Pin Denitions............................................................... 2-22

NMI Button ............................................................................................... 2-22

Power LED .............................................................................................. 2-22

HDD LED/UID Switch ............................................................................... 2-23

NIC1/NIC2 LED Indicators ....................................................................... 2-23

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-24

Power Fail LED ........................................................................................ 2-24

Reset Button ........................................................................................... 2-25

Power Button ........................................................................................... 2-25

2-7 Connecting Cables ........................................................................................ 2-26

Power Connectors ................................................................................... 2-26

Fan Headers ............................................................................................. 2-27

Chassis Intrusion ..................................................................................... 2-27

Internal Speaker ....................................................................................... 2-28

DOM Power Connector ............................................................................ 2-28

TPM/Port 80 Header ................................................................................ 2-29

LSI SAS 3108 TFM Connector ................................................................ 2-29

Power SMB (I2C) Connector .................................................................... 2-30

IPMB ......................................................................................................... 2-30

I-SGPIO1/2 Headers ................................................................................ 2-31

Standby Power Header ............................................................................ 2-31

Power LED/Speaker ................................................................................. 2-32

PCI-E NVMe AOC I2C Header ................................................................ 2-32

2-8 Jumper Settings ............................................................................................ 2-33

Explanation of Jumpers ................................................................................ 2-33

LAN Enable/Disable ................................................................................. 2-33

Clear CMOS ............................................................................................. 2-34

Watch Dog Enable/Disable ...................................................................... 2-34

VGA Enable .............................................................................................. 2-35

BMC Enable ............................................................................................ 2-35

LAN EEPROM Update ............................................................................. 2-35

I2C Bus to PCI-Exp. Slots ........................................................................ 2-36

vii

X10DRL-CT/-iT/-C Motherboard User’s Manual

ME Manufacturing Mode Select ............................................................... 2-36

BIOS Recovery Switch (JBR1)................................................................. 2-37

SAS Enable/Disable ................................................................................. 2-37

10GB LAN Enable/Disable ....................................................................... 2-37

2-9 Onboard LED Indicators ............................................................................... 2-38

LAN1/2/3/4, IPMI LAN LEDs .................................................................... 2-38

Onboard Power LED ............................................................................... 2-39

BMC Heartbeat LED ................................................................................ 2-39

2-10 SATA and SAS Connections ......................................................................... 2-40

SATA 3.0 and SAS Ports .......................................................................... 2-40

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

Before Power On ............................................................................................ 3-1

No Power ........................................................................................................ 3-1

No Video ......................................................................................................... 3-2

System Boot Failure ..................................................................................... 3-2

Losing the System’s Setup Conguration ....................................................... 3-2

Memory Errors ............................................................................................... 3-3

When the System Becomes Unstable ............................................................ 3-3

3-2 Technical Support Procedures ........................................................................ 3-4

3-3 Battery Removal and Installation .................................................................... 3-6

Battery Removal .............................................................................................. 3-6

Proper Battery Disposal .................................................................................. 3-6

3-4 Frequently Asked Questions ........................................................................... 3-7

3-5 Returning Merchandise for Service................................................................. 3-8

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

Starting BIOS Setup Utility .............................................................................. 4-1

How To Change the Conguration Data ......................................................... 4-1

How to Start the Setup Utility ......................................................................... 4-2

4-2 Main Setup ...................................................................................................... 4-2

4-3 Advanced Setup Congurations...................................................................... 4-4

4-4 Event Logs .................................................................................................... 4-29

4-5 IPMI ............................................................................................................... 4-31

4-6 Security Settings ........................................................................................... 4-33

4-7 Boot Settings ................................................................................................. 4-34

4-8 Save & Exit ................................................................................................... 4-37

viii

Table of Contents

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes .................................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Installing SuperDoctor5 ...................................................................................B-2

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

ix

X10DRL-CT/-iT/-C Motherboard User’s Manual

Notes

x

Chapter 1: Overview

Chapter 1

Overview

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention to

detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.

If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box.

• One (1) Supermicro Mainboard

• X10DRL-CT/-C: Two (2) SATA & Two (2) SAS

Cables

• X10DRL-iT: Six (6) SATA Cables

• One (1) I/O Shield

• One (1) Quick Reference Guide

Note 1: For your system to work properly, please follow the links below

to download all necessary drivers/utilities and the user's manual for your

motherboard.

• SMCI product manuals: http://www.supermicro.com/support/manuals/

• Product Drivers and utilities: ftp://ftp.supermicro.com/

Note 2: For safety considerations, please refer to the complete list of safety

warnings posted on the Supermicro website at http://www.supermicro.com/

about/policies/safety_information.cfm.

If you have any questions, please contact our support team at support@supermicro.

com.

1-1

X10DRL-CT/-iT/-C Motherboard User’s Manual

X10DRL-CT/-iT/-C Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

Revision available at the time of publishing of the manual. The motherboard

you've received may or may not look exactly the same as the graphics

shown in this manual.

1-2

Motherboard Layout

FAN1

Chapter 1: Overview

UID

COM1

LEDBMC

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

I-SATA2

I-SATA3

JS18

I-SATA5

J25

USB2/3

BT1

+

SP1

JPTG1

JI2C1

JI2C2

1

JUIDB1

1

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

FAN6

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

LAN3

JLAN1

LAN4

REV:1.00

I-SATA4

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

I-SGPIO2

FANA

JTPM1

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

P1-DIMMD1

P1-DIMMC1

JD1:

JTPM1:TPM/PORT80

PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS

JF1

RSTPWR

ON

FAN3

1-2 ENABLE
2-3 DISABLE

J7J5

X NICOH/

HDDNIC

PWR

2FF

LED1

LED

FAN2

NMIX

1-2:RST

JWD1:WATCH DOG

2-3:NMI

P1-DIMMB1

P1-DIMMA1

P2-DIMMG1

P2-DIMMH1

JPWR2

JPI2C1

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1:PWR I2C

1224

JPWR1

Note: For the latest CPU/Memory updates, please refer to our website at

http://www.supermicro.com/products/motherboard/ for details.

1-3

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

X10DRL-CT/-iT/-C Quick Reference

UID

COM1

LEDBMC

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

JIPMB1

24

CPU2 SLOT4

PCI-E 3.0 X8

I-SATA2

I-SATA3

JS18

I-SATA5

J25

USB2/3

BT1

+

SP1

JPTG1

JI2C1

JI2C2

1

JUIDB1

1

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

FAN6

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

LAN3

JLAN1

LAN4

REV:1.00

I-SATA4

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

I-SGPIO2

FANA

JTPM1

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

P1-DIMMD1

P1-DIMMC1

JD1:

JTPM1:TPM/PORT80

PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS

JF1

RSTPWR

ON

FAN3

1-2 ENABLE
2-3 DISABLE

J7J5

X NICOH/

HDDNIC

PWR

2FF

LED1

LED

FAN2

NMIX

1-2:RST

JWD1:WATCH DOG

2-3:NMI

P1-DIMMB1

P1-DIMMA1

P2-DIMMG1

P2-DIMMH1

JPWR2

JPI2C1

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1:PWR I2C

1224

JPWR1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front panel

connections.

• " " indicates the location of "Pin 1".

• Jumpers/LED Indicators not indicated are for internal testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufac-

turer. Do not install the onboard battery upside down to avoid possible explosion.

1-4

Chapter 1: Overview

X10DRL-CT/-iT/-C Jumpers

Jumper Description Default

JPB1 BMC Enable/Disable Pins 1-2 (Enabled)

JPG1 Onboard VGA Enable Pins 1-2 (Enabled)

JBR1 BIOS Recovery Mode Pins 1-2 (Normal)

JPME2 Intel ME Recovery Mode Pins 1-2 (Normal)

JBT1 Clear CMOS/Reset BIOS Conguration (See Chpt. 2)

JPS1 SAS Enable Pins 1-2 (Enabled)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)

JPL1, JPL2 LAN1, LAN2 Enable/Disable Pins 1-2 (Enabled)

JPTG1 10Gb LAN Support Enable/Disable Pins 1-2 (Enabled)

J21 LAN Controller EEPROM update Open (Dsiabled)

JI2C1/JI2C2 SMB to PCI-E Slots Pins 2-3 (Disabled)

X10DRL-CT/-iT/-C Connectors

Connector Description

I/O Back Panel See Back Panel I/O Connectors, Section 2-6

COM1 On board Serial port header for COM1

JL1 Chassis Intrusion Header

I-SATA0~5 SATA Interface for SATA1, 2, 3, 4, 5 and 6

USB 2/3 USB 2.0 Header for USB ports 2/3

JSD1 Power Connector for DOM (Disk on Module) Device

USB 8/9 (3.0) USB 3.0 Header for USB ports 8/9

USB4 USB 2.0 Type A port for USB 4

JF1 Front Panel Control/LED Header

FAN1~6, FANA/B CPU/System Fan Headers

L-SAS0~3, L-SAS4~7 L-SAS Interface for SAS0~7

JTPM1 TPM (Trusted Platform Module) / Port 80 Header

I-SGPIO1/I-SGPIO2 Serial General Purpose I/O Headers 1 and 2

JD1 Speaker/Power LED

JS18 LSISAS3108 TFM connector

JIPMB1 System Management Bus header

JSTBY1 Standby Power Connector

JUIDB1 UID (Unit ID) Switch

JNVI2C1 PCI-E NVMe AOC I2C Header

JPWR1, JPWR2 8-pin ATX Power Connectors

JPI2C1 Power Supply SMBus I2C Header

J24 24-pin ATX Power Connector

1-5

X10DRL-CT/-iT/-C Motherboard User’s Manual

X10DRL-CT/-iT/-C LED Indicators

LED Description Color/State Status

LEDPWR Onboard Power LED Green/Solid System Power On

LEDBMC BMC Heartbeat LED Green/Blinking BMC Normal

UID UID Switch Indicator Blue/Steady UID Switch is On

Motherboard Model Differences

Model 10Gb LAN Support SAS Support

X10DRL-CT Yes Yes

X10DRL-C No Ye s

X10DRL-iT Yes No

Warning!

To avoid damaging the power supply or the motherboard, be sure to use a power

supply that contains a 24-pin and two 8-pin power connectors. Be sure to connect the

power supply to the 24-pin power connector (J24), and two 8-pin power connectors

(JPWR1, JPWR2) on the motherboard. Failure in doing so may void the manufacturer

warranty on your power supply and motherboard.

1-6

Motherboard Features

Chapter 1: Overview

CPU

Memory

Chipset

Expansion

Slots

Graphics

Network

I/O Devices

• Dual Intel

R3-LGA 2011); each processor supports dual full-width

Intel QuickPath Interconnect (QPI) links (of up to 9.6

GT/s one direction per QPI)

®

E5-2600v3/v4 Series Processors (Socket

Note: E5-2600v4 requires Revision 2.0 BIOS

(or higher).

• Integrated memory controller supports: Up to 512 GB

of DDR4 (288-pin) Registered (RDIMM)/Load Reduced

(LRDIMM) ECC 2400/2133/1866/1600 MHz in 8 slots

Note 1: Memory speed support depends on the

CPUs installed in the system.

Note 2: For the latest CPU/memory updates,

please refer to our website at http://www.super-

micro.com/products/motherboard.

DIMM sizes

• DIMM 4GB, 8GB,16GB, 32GB, 64GB, DR/

RDIMM or QR/LRDIMM @ 1.2V

• Intel® PCH C612

• One (1) PCI Express 3.0 x8 slot (CPU1 Slot6),

• One (1) PCI-Express 3.0 x16 slot (CPU1 Slot5),

• One (1) PCI-Express 3.0 x8 slot (CPU2 Slot4)

• Graphics Controller via Aspeed 2400 BMC

• Dual Intel i210 Gigabit (10/100/1000 Mb/s) single-port

Ethernet controllers for LAN 1/LAN 2 ports

• Dual 10GBase-T LAN with Intel X540 Ethernet control-

lers for LAN 3/LAN 4 ports (X10DRL-CT/-iT only)

• Aspeed 2400 Base-board Controller (BMC) supports

IPMI_LAN 2.0

SATA Connections

• SATA Ports Six (6) SATA 3.0 Ports supported

by Intel PCH (I-SATA 0-5),

RAID 0, 1, 5, 10

• SAS Ports Eight (8) SAS 3.0 Ports supported

by LSI SCU (L-SAS 0-7, X10DRL-

CT/-C only)

RAID 0, 1, 5, 6, 10, 50, 60

1-7

X10DRL-CT/-iT/-C Motherboard User’s Manual

IPMI 2.0

• IPMI 2.0 supported by Aspeed 2400

Serial (COM) Ports

• One (1) Serial Port Header (COM1)

Peripheral
Devices

BIOS

Power Con­nectors

Power

Management

PC Health

Monitoring

USB Devices

• Two (2) USB 3.0 ports on the rear I/O panel (USB

12/13)

• One (1) internal USB 2.0 header for two (2) USB front

panel support (USB 2/3)

• One (1) Type A USB 2.0 connector (USB 4)

• One (1) USB 3.0 header for two USB 3.0 connections

(USB 8/9)

• 16 MB SPI AMI BIOS

®

SM Flash UEFI BIOS

• APCI 2.3, ACPI 2.0/3.0/4.0, USB Keyboard, Plug &

Play (PnP) and SMBIOS 2.3

Power Connectors

• One (1) 24-pin ATX main power connector (J24)

• Two (2) 8-pin 12V power connectors (JPWR1/2)

• ACPI Power Management

• Main switch override mechanism

• Power-on mode for AC power recovery

®

• Intel

Intelligent Power Node Manager 3.0 (Available

when the Supermicro Power Management (SPM) is

installed and special power supply used. See the note

on Page 1-14.)

• Management Engine (ME)

PC Health/CPU Monitoring

• Onboard voltage monitoring for +3.3V, 3.3V Standby,

+5V, +5V Standby, +12V, CPU Core, Memory, Chipset,

and Battery Voltages

• CPU/System overheat LED and control

• CPU Thermal Trip support

• Status Monitor for Speed Control

• Status Monitor for On/Off Control

• CPU Thermal Design Power (TDP): support up to

145W (See Note 1 next page)

1-8

Chapter 1: Overview

Fan Control

• Fan status monitoring via IPMI connections

• Dual Cooling Zone

• Low noise fan speed control

• Pulse Width Modulation (PWM) fan contorl

System
Management

• PECI (Platform Environment Conguration Interface)

2.0 support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5, Watch Dog, NMI

• IPMI 2.0 Support

• Chassis Intrusion Header and Detection

Dimensions

Note 1: CPU Maximum Thermal Design Power (TDP) is subject to chassis

and heatsink cooling restrictions. For proper thermal management, please

check the chassis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI Conguration Instructions, please refer to the Embedded

IPMI Conguration User's Guide available @ http://www.supermicro.com/

support/manuals/.

• 12.00" (L) x 10.00" (W) (304.80 mm x 254.00 mm)

1-9

X10DRL-CT/-iT/-C Motherboard User’s Manual

X10DRL-CT/iT/C

RJ45

DDR3

BMC Boot Flash

BIOS

SLOT 5

SLOT 6

MiniSAS
HD *2

LAN2

PCI-E X16

PCI-E X8

RTL8211E-VB-CG

SPI

SPI

LAN3/
LAN4

SAS 3.0

I210

<=1.758W (average)

2.3W (Peak)

#1-1

X540

LSI SAS3108

LAN1

RGMII

BMC

AST2400

#1-4

#1-3

#1-2

DDRIV

PCI-E X16 G3

PCI-E X8 G3

DDR3

I210

RMII/NCSI

3.3STBY:0.5A

PCI-E X1 G2

USB 2.0

SPI

LPC

PCI-E X8 G3

PCI-E X8 G3

VR12.5
5 PHASE
145W

E5-2600 (v3/v4)

SNB CORE
DDR-IV

#2CD #1 #2AB #3#3 #2AB #1

DMI2
4GB/s

1.05 PCH

1.05 ASW

1.5 PCH
PVCCIO 1.0/0.95

#5/6/7/8

PCH

#4

Wellsburg

#3

#2

#1

5V:1.2A

3.3V:0.1A

3.3 STBY:0.2A

#12 USB2.0

TDP:6.5W (WORKSTATION)

5W (SERVER)

USB & SATA useage different

TPM HEADER

Debug Card

QPI

9.6G

P0

P1P1P0

QPI

9.6G

Idle:0.45W

BIOS
HEADER

SPI

VR12.5
5 PHASE
145W

1UP C0UP C

E5-2600 (v3/v4)

SNB CORE
DDR-IV

#2CD

PCI-E X8 G3

#1

#0

SATA 3.0

USB 2.0

USB 3.0

#3

#2

2IMD2IMD

#5

#4

SATA

USB

USB

SLOT 4

PCI-E X8

x1 two port header
x1 TypeA connector

x2 rear port
x1 two port header

#2-1

#2-2

DDRIV

#2-3

#2-4

VGA CONN

Temp Sensor

W83773G

COM1
Header

FAN SPEED

FRONT PANELCTRL

System Block Diagram

Note: This is a general block diagram and may not exactly represent the

features on your motherboard. See the Motherboard Features pages for

the actual specications of each motherboard.

1-10

Chapter 1: Overview

1-2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel E5-2600v3/v4 Series Pro-

cessors (Socket R3) and the Intel C612 PCH, the X10DRL-CT/-iT/-C motherboard

pr ovid e s the bes t balan c e d solu t ion of pe r f o r manc e , powe r ef cien c y, and fea ture s

to address the diverse needs of next-generation computer users.

With support of new Intel Microarchitecture 22nm (E5-2600v3)/14nm (E5-2600v4)

Process Technology, the X10DRL-CT/-iT/-C dramatically increases system perfor-

mance.

The PCH C612 chip provides Enterprise SMbus and MCTP support, including the

following features:

• DDR4 288-pin memor y support on Socket R3

• Support for MCTP Protocol and ME

• Suppor t of SMBus speeds of up to 1 MHz for BMC connectivity

• Improved I/O capabilities to high-storage-capacity conguration

• SPI Enhancements

• Intel® Node Manager 3.0

• BMC supports remote management, virtualization, and the security package

for enterprise platforms

Notes:

1. E5-2600v4 requires Revision 2.0 BIOS (or higher).

2. Intel Node Manager 3.0 suppor t is dependent on the power supply

used in the system.

1-11

X10DRL-CT/-iT/-C Motherboard User’s Manual

1-3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will

respond when AC power is lost and then restored to the system. You can choose for

the system to remain powered off (in which case you must press the power switch

to turn it back on), or for it to automatically return to the power-on state. See the

Advanced BIOS Setup section for this setting. The default setting is Last State.

1-4 PC Health Monitoring

This section describes the features of PC health monitoring of the motherboard.

This motherboard has an onboard Baseboard-Management Controller (BMC) chip

that supports system health monitoring. An onboard voltage monitor will scan the

following onboard voltages continuously: +3.3V, 3.3V Standby, +5V, +5V Standby,

+12V, CPU Core, Memory, Chipset, and Battery Voltages. Once a voltage becomes

unstable, a warning is given, or an error message is sent to the screen. The user

can adjust the voltage thresholds to dene the sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

System-health monitoring support provided by the BMC controller can check the

RPM status of a cooling fan. The onboard CPU and chassis fans are controlled by

IPMI Thermal Management.

Environmental Temperature Control

System-health sensors monitor temperatures and voltage settings of onboard

processors and the system in real time via the IPMI interface. Whenever the tem-

perature of the CPU or the system exceeds a user-dened threshold, system/CPU

cooling fans will be turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5 in the Windows OS or Linux

environment. SuperDoctor 5 is used to notify the user of certain system events.

For example, you can congure SuperDoctor 5 to provide you with warnings when

the system temperature, CPU temperatures, voltages, and fan speeds go beyond

a predened range.

1-12

Chapter 1: Overview

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-

tion denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a PC system, including

its hardware, operating system and application software. This enables the system

to automatically turn on and off peripherals such as CD-ROMs, network cards, hard

disk drives and printers.

In addition to operating system-directed power management, ACPI also provides

a generic system event mechanism for Plug and Play, and an operating system-

independent interface for conguration control. ACPI leverages the Plug and Play

BIOS data structures, while providing a processor architecture-independent imple-

mentation that is compatible with Windows 2008, Windows 2008R2, Windows 2012,

and Windows 2012R2 operating systems.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

The X10DRL-CT/iT/-C motherboard accommodates 24-pin ATX power supplies.

Although most power supplies generally meet the specications required by the

CPU, some are inadequate. In addition, two 12V 8-pin power connections are also

required to ensure adequate power supply to the system.

Warning! To avoid damaging the power supply or the motherboard, be sure to use a

power supply that contains a 24-pin and two 8-pin power connectors. Be sure to con-

nect the power supplies to the 24-pin power connector (J24), and the two 8-pin power

connectors (JPWR1, JPWR2) on the motherboard. Failure in doing so may void the

manufacturer warranty on your power supply and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX

power supply Specication 2.02 or above. It must also be SSI compliant. (For more

information, please refer to the website at http://www.ssiforum.org/). Additionally, in

areas where noisy power transmission is present, you may choose to install a line

lter to shield the computer from noise. It is recommended that you also install a

power surge protector to help avoid problems caused by power surges.

1-13

X10DRL-CT/-iT/-C Motherboard User’s Manual

1-7 Advanced Power Management

The following new advanced power management features are supported by this

motherboard:

Intel® Intelligent Power Node Manager (NM) (Available
when "Supermicro Power Management (SPM)" is
Installed)

The Intel® Intelligent Power Node Manager 3.0 (IPNM) provides your system with

real-time thermal control and power management for maximum energy efciency.

Although IPNM Specication Version 2.0/3.0 is supported by the BMC (Baseboard

Management Controller), your system must also have IPNM-compatible Manage-

ment Engine (ME) rmware installed to use this feature.

Note: IPNM support is dependent on the power supply used in the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the PCH, pro-

vides Server Platform Services (SPS) to your system. The services provided by

SPS are different from those provided by the ME on client platforms.

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user

of situations which have the potential for bodily injury. Should you have questions or

experience difculty, contact Supermicro's Technical Support department for assis-

tance. Only certied technicians should attempt to install or congure components.

Read this section in its entirety before installing or conguring components in the

Supermicro chassis.

Battery Handling

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the

battery only with the same or equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメー
カーが推奨する型、または同等のものを使用下さい。 使用済電池は製造元の指示に従

って処分して下さい。

警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更
换原有电池。请按制造商的说明处理废旧电池。

警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有
電池。請按照製造商的說明指示處理廢棄舊電池。

Warnung

Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.

Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

2-1

X10DRL-CT/-iT/-C Motherboard User’s Manual

Attention

Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.

Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!

Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-

dado por el fabricante. Desechar las baterías gastadas según las instrucciones

del fabricante.

!הרהזא

תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי

גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.

תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל









경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing

Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-

bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften

afgevoerd te worden.

2-2

Chapter 2: Installation

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws

and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
ありま す 。

警告
本产品的废弃处理应根据所有国家的法律和规章进行。

警告
本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung

Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.

¡Advertencia!

Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.

Attention

La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de

l'organisme compétent.

רצומה קוליס

!הרהזא

ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח

2-3

X10DRL-CT/-iT/-C Motherboard User’s Manual

 

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Waarschuwing

De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

2-2 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your system board, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic

bag.

• Handle the motherboard by its edges only; do not touch its components, periph-

eral chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not

in use.

• For grounding purposes, make sure that your system chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage.

When unpacking the motherboard, make sure that the person handling it is static

protected.

2-4

Chapter 2: Installation

2-3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on

the label area.

Notes:

Always connect the power cord last, and always remove it before adding,

removing or changing any hardware components. Make sure that you in-

stall the processor into the CPU socket before you install the CPU heatsink.

If you buy a CPU separately, make sure that you use an Intel-certied

multi-directional heatsink only.

Make sure to install the motherboard into the chassis before you install

the CPU heatsink.

When receiving a motherboard without a processor pre-installed, make

sure that the plastic CPU socket cap is in place and none of the socket

pins are bent; otherwise, contact your retailer immediately.

Refer to the Supermicro website for updates on CPU support.

Installing the Processor

1. There are two load levers on the LGA2011-R3 socket. To open the socket

cover, rst press and release the load lever labeled 'Open 1st'.

1

WARNING!

OPEN 1st

2

WARNING!

OPEN 1st

Press down

on

Load Lever

labeled 'Open 1st'.

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-5

X10DRL-CT/-iT/-C Motherboard User’s Manual

2. Press the second load lever labeled 'Close 1st' to release the load plate that

covers the CPU socket from its locking position.

1

Lever 'Close 1st'

WARNING!

OPEN 1st

Press down on

Load

Pull lever away from

2

the socket

WARNING!

OPEN 1st

3. With the lever labelled 'Close 1st' fully retracted, gently push down on the

lever labelled 'Open 1st' to open the load plate. Lift the load plate to open it

completely.

Gently push
down to pop the

1

load plate open.

WARNING!

OPEN 1st

2

WARNING!

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-6

Chapter 2: Installation

4. Use your thumb and the index nger to loosen the lever and open the load

plate.

WARNING!

5. Using your thumb and index nger, hold the CPU on its edges. Align the CPU

keys, which are semi-circle cutouts, against the socket keys.

Socket Keys

CPU Keys

6. Once they are aligned, carefully lower the CPU straight down into the socket.

(Do not drop the CPU on the socket. Do not move the CPU horizontally or

vertically. Do not rub the CPU against the surface or against any pins of the

socket to avoid damaging the CPU or the socket.)

Warning: You can only install the CPU

inside the socket in one direction. Make

sure that it is properly inserted into the

CPU socket before closing the load

plate. If it doesn't close properly, do not

force it as it may damage your CPU.

Instead, open the load plate again to

make sure that the CPU is aligned

properly.

2-7

X10DRL-CT/-iT/-C Motherboard User’s Manual

7. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

8. Close the load plate with the CPU inside the socket. Lock the lever labelled

'Close 1st' rst, then lock the lever labelled 'Open 1st' second. Using your

thumb gently push the load levers down to the lever locks.

Gently close

1 2

the load plate.

3

Lever Lock

OPEN 1st

Push down and

lock the lever

labelled 'Open

1st'.

Push down and lock the
lever labelled 'Close 1st'.

OPEN 1st

4

OPEN 1st

2-8

Lever Lock

Chapter 2: Installation

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the Motherboard and the Heatsink Bracket underneath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug

(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Motherboard

Note: For optimized airow, please follow your chassis airow direction

to install the correct CPU heatsink direction. Graphic drawings included

in this manual are for reference only. They might look different from the

components installed in your system.

Screw#1

Screw#2

OPEN 1st

Mounting Holes

2-9

X10DRL-CT/-iT/-C Motherboard User’s Manual

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the heatsink, please follow the instructions below to uninstall

the heatsink to prevent damage done to the CPU or the CPU socket.

1. Unscrew the heatsink screws from the motherboard in the sequence as

shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive

force when wriggling the heatsink!)

3. Once the CPU is loosened from the socket, remove the CPU from the CPU

socket.

4. Remove the used thermal grease and clean the surface of the CPU and the

heatsink, Reapply the proper amount of thermal grease on the surface before

reinstalling the CPU and the heatsink.

Loosen screws
in sequence as
shown.

Screw#4

Screw#1

Screw#2

Motherboard

Screw#3

Note: For optimized airow, please follow your chassis airow direction

to install the correct CPU heatsink direction. Graphic drawings included

in this manual are for reference only. They might look different from the

components installed in your system.

2-10

Chapter 2: Installation

SAN MAC

BIOS LICENSE

SAS CODE

MAC CODE

IPMI CODE

BAR CODE

UID

LEDPWR

LEDBMC

JUSBRJ45

FAN6

FAN5

FAN1

FANB

FAN2

FAN3

FAN4

FANA

JIPMB1

JNVI2C1

JVRM2

JPTG1

1

JPB1

3

JPF1
JPF2
JPG1
JBR1

JPME2

JI2C1

JI2C2

JPS1

JPL2

JPL1

JVRM1

JWD1

J24

1

13

1224

1

J7J5

JS18

JF1

JPWR2

JPWR1

1

JL1

J21

JPI2C1

24

JPS7

SP1

BT1

+

JLAN3

JUIDB1

JSD1

JS1

JSTBY1

I-SGPIO1

I-SGPIO2

J25

JTPM1

JVGA

JLAN1

JBT1

I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

REV:1.00

CHASSIS INTRUSION

JL1

2-3:DISABLE

1-2:ENABLE

JI2C1/JI2C2

1-2:NORMAL
2-3:BIOS RECOVERY

JBR1

2-3:ME MANUFACTURING MODE

JPME2
1-2:NORMAL

1-2 ENABLE

JPL2 LAN

2-3 DISABLE

JPL1/

JPI2C1:PWR I2C

JPG1:VGA

JPB1:BMC

2-3 DISABLE

1-2 ENABLE

2-3 DISABLE

1-2 ENABLE

JPTG1:10Gb LAN

2-3 DISABLE

1-2 ENABLE

JPS1:SAS

L-SAS0-3

L-SAS4-7

USB8/9(3.0)

PCI-E 3.0 X8

LAN4

LAN3

LAN1

USB12/13(3.0)

I-SATA0

I-SATA1

I-SATA2

I-SATA3

USB2/3

USB4

JTPM1:TPM/PORT80

CHASSIS INTRUSION

I-SATA4

CMOS CLEAR

I-SATA5

CPU2 SLOT4

SPEAKER-PIN 4-7

JD1:
PWR LED-PIN 1-3

2-3:NMI

JWD1:WATCH DOG

1-2:RST

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

RSTPWR

ON

JF1

P1-DIMMD1

P1-DIMMC1

X NICOH/

2FF

HDDNIC
LED1

PWR
LED

NMIX

P2-DIMMF1

P2-DIMME1

CPU2

VGA

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

COM1

IPMI_LAN

LAN2

JD1

2-4 Installing and Removing the Memory Modules

Note: Check Supermicro's website for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage.

Installing & Removing DIMMs

1. Insert the desired number of DIMMs into the memory slots, starting with

DIMM A1. (For best performance, please use the memory modules of the

same type and speed in the same bank.)

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

Notches

Release Tabs

3. Align the key of the DIMM module with the receptive point on the memory

slot.

4. Align the notches on both ends of the module against the receptive points on

the ends of the slot.

5. Use two thumbs together to press the notches on both ends of the module

straight down into the slot until the module snaps into place.

6. Press the release tabs to the locking positions to secure the DIMM module

into the slot.

Press both notches straight

Removing Memory Modules

Press both notches on the ends of the DIMM module to unlock it. Once the DIMM

module is loosened, remove it from the memory slot.

down into the memory slot at

the same time.

2-11

X10DRL-CT/-iT/-C Motherboard User’s Manual

Memory Support for the X10DRL-CT/-iT/-C Motherboard

The X10DRL-CT/-iT/-C Motherboard supports up to 512 GB of DDR4 Registered

(RDIMM)/Load Reduced (LRDIMM) ECC 2400/2133/1866/1600 MHz memory

modules in eight DIMM slots. Memory speed support is pending on the processors

used in the system. For the latest memory updates, please refer to our website a

at http://www.supermicro.com/products/motherboard.

Processor & Memory Module Population Conguration

For memory to work properly, follow the tables below for memory installation.

Processors and their Corresponding Memory Modules

CPU# Corresponding DIMM Modules

CPU 1 P1-DIMMA1 P1-DIMMB1 P1-DIMMC1 P1-DIMMD1

CPU 2 P2-DIMME1 P2-DIMMF1 P2-DIMMG1 P2-DIMMH1

Processor and Memory Module Population for Optimal Performance

Number of

CPUs+DIMMs

1 CPU &
2 DIMMs

1 CPU &
4 DIMMs

2 CPUs &

4 DIMMs

2 CPUs &

6 DIMMs

2 CPUs &

8 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1

CPU1
P1-DIMMA1/P1-DIMMB1, P1-DIMMC1/P1-DIMMD1

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1, P2-DIMME1/P2-DIMMF1

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2­DIMMG1/P2-DIMMH1

CPU and Memory Population Conguration Table

(For memory to work properly, please follow the instructions below.)

2-12

Chapter 2: Installation

Ranks Per
DIMM and

Speed (MT/s);

Channel (DPC)

LRDIMM

3DS

Ranks Per

and

Speed (MT/s);

Channel (DPC)

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v3-based Motherboard

Voltage (V);

Slot Per Channel

(GB)

(SPC) and DIMM Per

1 Slot Per Channel

1DPC

1.2V

2133

2133

2133

2133

2133

2133

Type

RDIMM SRx4 8GB 16GB

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

†

DIMM Capacity

Data

Width

4Gb 8Gb

8Rx4 64GB 128GB

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v4-based Motherboard

Voltage (V);

Slot Per Channel

(SPC) and DIMM Per

1 Slot Per Channel

1DPC

1.2V

Type

DIMM

Data

Width

DIMM Capacity

(GB)

4Gb 8Gb

RDIMM SRx4 8GB 16GB

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

LRDIMM

8Rx4 64GB 128GB

3DS

2400

2400

2400

2400

2400

2400

2-13

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

2-5 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Although a chassis may have both plastic and metal mounting fas-

teners, metal ones are highly recommended because they ground the motherboard

to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

• Phillips Screwdriver

• Pan head screws (8 pieces)

• Standoffs (8 pieces, if needed)

Location of Mounting Holes

There are eight (8) mounting holes on this motherboard indicated by the arrows.

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

JS18

JSD1

USB8/9(3.0)

L-SAS4-7

L-SAS0-3

LEDBMC

I-SGPIO1

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

BT1

+

SP1

JSTBY1

JNVI2C1

JTPM1

JPS1

I-SGPIO2

JS1

JD1

JVRM1

FANA

JWD1

JVRM2

FAN4

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

JPS7

JF1

FANB

LEDPWR

Caution: 1) To avoid damaging the motherboard and its components, please do

not use a force greater than 8 lb/inch on each mounting screw during motherboard

installation. 2) Some components are very close to the mounting holes. Please take

precautionary measures to avoid damaging these components when installing the

motherboard to the chassis.

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

UID

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

FAN6

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN

1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL1/

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

LAN3
LAN4

JLAN3

JPL2 LAN
1-2 ENABLE
2-3 DISABLE

REV:1.00

SAN MAC

SAS CODE

FAN2

2-14

JVGA

USB12/13(3.0)

IPMI_LAN

LAN1

JUSBRJ45

LAN2

JLAN1

VGA

JPL2
FAN5

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

CPU2

IPMI CODE

BAR CODE

BIOS LICENSE

13

1

CPU1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMB1

P1-DIMMA1

1224

JPWR2

JPWR1

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother-

board components.

6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo-

nents might look different from those shown in this manual.

2-15

X10DRL-CT/-iT/-C Motherboard User’s Manual

D

E

F

G

2-6 Control Panel Connectors and I/O Ports

The I/O por ts are color coded in conformance with the industr y standards. See

the picture below for the colors and locations of the various I/O ports.

Back Panel Connectors and I/O Ports

B

A

C

I

H

Back Panel I/O Port Locations and Denitions

A. VGA Port D. USB 3.0 Port 13 G. 10Gb LAN Port 3*

B. IPMI Port E. 1Gb LAN Port 1 H. 10Gb LAN Port 4*

C. USB 3.0 Port 12 F. 1Gb LAN Port 2 I. UID Switch / UID LED

*X10DRL-CT/-iT only

2-16

Chapter 2: Installation

FAN1

JF1

UID

2

1

Serial Ports

One serial port header (COM1) is

located on the motherboard. COM1 is

located on the rear corner of the moth-

erboard. See the table on the right for

pin denitions.

Video Connection

A Video (VGA) port is located next to

the IPMI LAN on the I/O back panel.

Refer to the board layout below for

the location.

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

LEDPWR

JIPMB1

JPF1
JPF2
JPG1

JBR1

JPME2

JBT1

CMOS CLEAR

CPU2 SLOT4

PCI-E 3.0 X8

JS18

JSD1

USB8/9(3.0)

JPS7

L-SAS4-7

FANB

JSTBY1

I-SGPIO1

JTPM1

JPS1

I-SGPIO2

JVRM1

L-SAS0-3

FANA

JVRM2

UID

JUIDB1

FAN6

1

24

JPTG1

1

JI2C1

JI2C2

BT1

+

SP1

JNVI2C1

JS1

JD1

JWD1

FAN4

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

ON

FAN3

CPU1 SLOT6 PCI-E 3.0 X8

J7J5

X NICOH/

2FF

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

SAN MAC

P1-DIMMD1

P1-DIMMC1

JD1:

JTPM1:TPM/PORT80

PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

HDDNIC

PWR

NMIX

1-2:RST

JWD1:WATCH DOG

LED1

LED

2-3:NMI

Serial (COM) Ports

Pin Denitions

Pin # Denition Pin # Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

JVGA

VGA

JPL2
FAN5

JUSBRJ45

P2-DIMMG1

P2-DIMMH1

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

P1-DIMMA1

JPWR2

JLAN3

JPL2 LAN

SAS CODE

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

LAN3

JLAN1

LAN4

REV:1.00

FAN2

1. VGA

2. COM1

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

1224

JPWR1

2-17

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

JF1

1

2

3

5

4

Universal Serial Bus (USB)

Two USB 3.0 ports (USB 12/13) are

located on the I/O back panel on

motherboard. In addition, an internal

USB header (USB 2/3) and a Type A

USB connector (USB 4) provide a total

of three USB 2.0 connections (USB

2/3, 4) for front panel support. A USB

3.0 header, located next JF1, provides

two front USB 3.0 connections (USB

8/9). (Cables are not included). See

the tables on the right and below for

pin denitions.

USB (3.0) USB 8/9

Pin Denitions

Pin# Description Pin# Description

1 USB3.0_Front_VCC

2 USB3_RE_RXN6 19 USB3.0_Front_VCC

3 USB3_RE_RXP6 18 USB3_RE_RXN5

4 Ground 17 USB3_RE_RXP5

5 USB3_RE_TXN6 16 Ground

6 USB3_RE_TXP6 15 USB3_RE_TXN5

7 Ground 14 USB3_RE_TXP5

8 USB2_N8 13 Ground

9 USB2_P8 12 USB2_N9

10 Ground 11 USB2_P9

Back Panel USB (3.0) 12/13

Pin Denitions

Pin# Denition Pin# Denition

1 Rear_Vcc 10 Rear_Vcc

2 N12 11 N13

3 P12 12 P13

4 GND 13 GND

5 Re_Rxn2 14 Re_Rxn1

6 Re_Rxp2 15 Re_Rxp1

7 Ground 16 GND

8 Re_Txn2 17 Re_Txn1

9 Re_Txp2 18 Re_Txp1

Front Panel USB (2.0) 2/3

Pin Denitions

Pin # Denition Pin # Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 No Connec-

USB (2.0) USB 4

Pin Denitions

tion

Pin# Description

1 +5V

2 USB_PN4

3 USB_PP4

4 Ground

CPU2 SLOT4

PCI-E 3.0 X8

JSTBY1

JVRM1

JVRM2

UID

JUIDB1

FAN6

1

LAN3
LAN4

24

JPTG1

1

JI2C1

JI2C2

BT1

+

SP1

JNVI2C1

JPS1

JS1

JD1

JWD1

JLAN3

P2-DIMMF1

P2-DIMME1

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

P1-DIMMD1

P1-DIMMC1

JD1:

JTPM1:TPM/PORT80

PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

JF1

FAN2

J7J5

RSTPWR

X NICOH/

HDDNIC

PWR

NMIX

1-2:RST

JWD1:WATCH DOG

ON

2FF

LED1

LED

2-3:NMI

FAN3

FAN4

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

J25

LEDPWR

JIPMB1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

JS18

I-SATA5

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

I-SGPIO1

JTPM1

JPS7

I-SGPIO2

L-SAS0-3

L-SAS4-7

FANA

FANB

JVGA

USB12/13(3.0)

JPL2
FAN5

IPMI_LAN

LAN1

JUSBRJ45

LAN2

JLAN1

CPU2

BAR CODE

CPU1

VGA

BIOS LICENSE

P1-DIMMB1

2-18

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

1. Backpanel USB12 (3.0)

2. Backpanel USB13 (3.0)

3. FP USB 2/3 (USB2.0)

4. FP USB 4 (Type A, USB2.0)

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMA1

1224

JPWR2

JPWR1

5. FP USB 8/9 (USB 3.0)

Chapter 2: Installation

FAN1

JF1

1

235

4

Ethernet Ports

Two Gigabit Ethernet ports (LAN1,

LAN2) are located on the I/O back

panel on the motherboard. These eth-

ernet ports support Gigabit LANs on

the motherboard. In addition, an IPMI

Dedicated LAN port is located above

USB 12/13 ports on the back panel. All

these ports accept RJ45 type cables.

Please refer to the LED Indicator Sec-

tion for LAN LED information.

Two additional 10Gb Ethernet ports

are also supported on the X10DRL-

CT/-iT motherboard, these are desig-

nated as LAN3 and LAN4.

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

JIPMB1

1

JL1

I-SATA0

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

JPS7

LEDPWR

CPU2 SLOT4

JPF1
JPF2
JPG1

PCI-E 3.0 X8

JBR1

JPME2

JBT1

JS18

JSD1

USB8/9(3.0)

I-SGPIO1

JTPM1

I-SGPIO2

L-SAS0-3

L-SAS4-7

FANA

FANB

UID

JUIDB1

FAN6

1

LAN3

JLAN1

LAN4

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

ON

FAN3

CPU1 SLOT6 PCI-E 3.0 X8

J7J5

X NICOH/

2FF

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

P1-DIMMD1

P1-DIMMC1

JD1:

JTPM1:TPM/PORT80

PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

HDDNIC

PWR

NMIX

1-2:RST

JWD1:WATCH DOG

LED1

LED

2-3:NMI

24

JPTG1

1

JI2C1

JI2C2

BT1

+

SP1

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

JVGA

USB12/13(3.0)

JPL2
FAN5

IPMI_LAN

LAN1

JUSBRJ45

LAN2

CPU2

CPU1

LAN1 and LAN2 (1G)

Pin Denition

Pin# Denition Pin# Denition

A1 TDR0- A10 GND

A2 TDR0+ A 11 YEL+

A3 TDR1- A12 YEL-

A4 TDR1+ A13 GRE+/ORG-

A5 TDR2- A14 GRE-/ORG+

A6 TDR2+ A15

A7 TDR3- A16

A8 TDR3+ A17

A9 COMMCT A18

LAN3 and LAN4 (10G)

Pin Denition

Pin# Denition Pin# Denition

A1 TDR1+ A10 TDR4+

A2 TDR1- A11 TDR4-

JPL1

J21

VGA

P2-DIMMG1

P2-DIMMH1

A3 TRCT1 A12 TRCT4

A4 TDR2+ A13 IET+

MAC CODE

A5 TDR2- A14 IET-

A6 TRCT2 A15 YEL+

A7 TDR3+ A16 YEL-

IPMI CODE

A8 TDR3- A17 ORG-/GRE+

BAR CODE

BIOS LICENSE

JPI2C1

P1-DIMMB1

P1-DIMMA1

JPWR2

A9 TRCT3 A18 ORG+/GRE-

13

1

J24

JPI2C1:PWR I2C

1224

JPWR1

1. 1Gb LAN1

2. 1Gb LAN2

3. 10Gb LAN3

4. 10Gb LAN4

5. IPMI_LAN

2-19

X10DRL-CT/-iT/-C Motherboard User’s Manual

SAN MAC

BIOS LICENSE

SAS CODE

MAC CODE

IPMI CODE

BAR CODE

UID

LEDPWR

LEDBMC

JUSBRJ45

FAN6

FAN5

FAN1

FANB

FAN2

FAN3

FAN4

FANA

JIPMB1

JNVI2C1

JVRM2

JPTG1

1

JPB1

3

JPF1
JPF2
JPG1
JBR1

JPME2

JI2C1

JI2C2

JPS1

JPL2

JPL1

JVRM1

JWD1

J24

1

13

1224

1

J7J5

JS18

JF1

JPWR2

JPWR1

1

JL1

J21

JPI2C1

24

JPS7

SP1

BT1

+

JLAN3

JUIDB1

JSD1

JS1

JSTBY1

I-SGPIO1

I-SGPIO2

J25

JTPM1

JVGA

JLAN1

JBT1

I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

REV:1.00

CHASSIS INTRUSION

JL1

2-3:DISABLE

1-2:ENABLE

JI2C1/JI2C2

1-2:NORMAL
2-3:BIOS RECOVERY

JBR1

2-3:ME MANUFACTURING MODE

JPME2
1-2:NORMAL

1-2 ENABLE

JPL2 LAN

2-3 DISABLE

JPL1/

JPI2C1:PWR I2C

JPG1:VGA

JPB1:BMC

2-3 DISABLE

1-2 ENABLE

2-3 DISABLE

1-2 ENABLE

JPTG1:10Gb LAN

2-3 DISABLE

1-2 ENABLE

JPS1:SAS

L-SAS0-3

L-SAS4-7

USB8/9(3.0)

PCI-E 3.0 X8

LAN4

LAN3

LAN1

USB12/13(3.0)

I-SATA0

I-SATA1

I-SATA2

I-SATA3

USB2/3

USB4

JTPM1:TPM/PORT80

CHASSIS INTRUSION

I-SATA4

CMOS CLEAR

I-SATA5

CPU2 SLOT4

SPEAKER-PIN 4-7

JD1:
PWR LED-PIN 1-3

2-3:NMI

JWD1:WATCH DOG

1-2:RST

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

RSTPWR

ON

JF1

P1-DIMMD1

P1-DIMMC1

X NICOH/

2FF

HDDNIC
LED1

PWR
LED

NMIX

P2-DIMMF1

P2-DIMME1

CPU2

VGA

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

COM1

IPMI_LAN

LAN2

JD1

1

2

3

4

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and an LED

Indicator are located on the motherboard.

The rear UID switch is located next to the

LAN ports on the back panel. The front UID

switch is located on Pin 13 on the Front

Panel Control (JF1). The rear UID LED

(UID) is located next to the UID switch and

the front UID LED is located on Pins 7 on

JF1. When you press the UID switch, the

UID LED will turn on. Press the UID switch

again to turn off the LED indicator. The UID

Indicator provides easy identication of a

system unit that may be in need of service.

Note: UID can also be triggered via

IPMI on the motherboard. For more

information on IPMI, please refer to

the IPMI User's Guide posted on

our website @http://www.super-

micro.com.

UID Switch

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

UID LED

Status

Color/State Status

Blue: On Unit Identied

Ground

X

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

Ground

Ground

2

1920

NMI

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

1

Reset Button

Power Button

1. UID Button

2. Rear UID LED

3. Front UID LED

4. Front UID Switch

2-20

Chapter 2: Installation

FAN1

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo-

cated on a control panel at the front of the chassis. These connectors are designed

specically for use with Supermicro's server chassis. See the gure below for the

descriptions of the various control panel buttons and LED indicators. Refer to the

following section for descriptions and pin denitions.

JF1 Header Pins

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

L-SAS4-7

FANB

LEDPWR

L-SAS0-3

I-SGPIO1

BT1

+

SP1

JSTBY1

JTPM1

JPS1

I-SGPIO2

JS1

JVRM1

FANA

JWD1

JVRM2

UID

JUIDB1

FAN6

LAN1

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

1-2:RST
2-3:NMI

JLAN3

JPL2 LAN

SAN MAC

SAS CODE

LAN2

LAN3

JLAN1

LAN4

REV:1.00

FAN2

1

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

P1-DIMMD1

P1-DIMMC1

JNVI2C1

JTPM1:TPM/PORT80

JD1

JF1

J7J5

RSTPWR

X NICOH/

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

ON

2FF

LED1

LED

FAN3

FAN4

USB12/13(3.0)

IPMI_LAN

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMB1

P1-DIMMA1

1224

JPWR2

JPWR1

Ground

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

X

Ground

Ground

2-21

1920

NMI

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

Reset Button

Power Button

PWR

1

2

X10DRL-CT/-iT/-C Motherboard User’s Manual

Front Control Panel Pin Denitions

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

Ground

X

FP PWRLED

B

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

Ground

Ground

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

A. NMI

B. PWR LED

1920

NMI

A

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

Reset Button

Power Button

PWR

1

2

2-22

Chapter 2: Installation

HDD LED/UID Switch

The HDD LED/UID Switch connection

is located on pins 13 and 14 of JF1.

Attach a cable to Pin 14 to show HDD

activity status. Attach a cable to Pin 13

to use UID switch. See the table on

the right for pin denitions.

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control-

ler) LED connection for LAN port 1 is

located on pins 11 and 12 of JF1, and

the LED connection for LAN Port 2 is

on Pins 9 and 10. Attach the NIC LED

cables here to display network activity.

Refer to the table on the right for pin

denitions.

Ground

X

FP PWRLED

HDD LED

A

NIC1 Link LED

B

NIC2 Link LED

C

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

Ground

Ground

HDD LED/UID Switch

Pin Denitions (JF1)

Pin# Denition

13 UID Switch

14 HD Active

GLAN1/2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

10 NIC 2 Link LED

11 NIC 1 Activity LED

12 NIC 1 Link LED

A. HDD LED/UID Switch

B. NIC1 LED

C. NIC2 LED

1920

NMI

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

Reset Button

Power Button

PWR

1

2

2-23

X10DRL-CT/-iT/-C Motherboard User’s Manual

Overheat (OH)/Fan Fail/PWR Fail/
UID LED

Connect an LED cable to pins 7 and

8 of Front Control Panel to use the

Overheat/Fan Fail/Power Fail and

UID LED connections. The Red LED

on pin 8 provides warnings of over-

heat, fan failure or power failure. The

Blue LED on pin 7 works as the front

panel UID LED indicator. Refer to the

table on the right for pin denitions.

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

denitions.

Ground

X

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/

A

PWR Fail LED)

Power Fail LED

B

Ground

Ground

2

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Denitions (JF1)

Pin# Denition

7 Blue_UID LED

8 OH/Fan Fail/Power Fail

State Denition

Off Normal

On Overheat

Flashing Fan Fail

A. OH/Fail/PWR Fail LED/UID LED

B. PWR Supply Fail

1920

NMI

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

Reset Button

Power Button

PWR

1

OH/Fan Fail/PWR Fail

LED Status (Red LED)

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

2-24

Chapter 2: Installation

Reset Button

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case. Refer to the table on the right for

pin denitions.

Power Button

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. This button can also be con-

gured to function as a suspend button

(with a setting in the BIOS - See Chapter

4). To turn off the power when the system

is in suspend mode, press the button for

4 seconds or longer. Refer to the table on

the right for pin denitions.

Ground

X

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

Ground

Ground

2

1920

NMI

X

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

1

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

A. Reset Button

B. PWR Button

Reset Button

Power Button

A

B

2-25

X10DRL-CT/-iT/-C Motherboard User’s Manual

SAN MAC

BIOS LICENSE

SAS CODE

MAC CODE

IPMI CODE

BAR CODE

UID

LEDPWR

LEDBMC

JUSBRJ45

FAN6

FAN5

FAN1

FANB

FAN2

FAN3

FAN4

FANA

JIPMB1

JNVI2C1

JVRM2

JPTG1

1

JPB1

3

JPF1
JPF2
JPG1
JBR1

JPME2

JI2C1

JI2C2

JPS1

JPL2

JPL1

JVRM1

JWD1

J24

1

13

1224

1

J7J5

JS18

JF1

JPWR2

JPWR1

1

JL1

J21

JPI2C1

24

JPS7

SP1

BT1

+

JLAN3

JUIDB1

JSD1

JS1

JSTBY1

I-SGPIO1

I-SGPIO2

J25

JTPM1

JVGA

JLAN1

JBT1

I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

REV:1.00

CHASSIS INTRUSION

JL1

2-3:DISABLE

1-2:ENABLE

JI2C1/JI2C2

1-2:NORMAL
2-3:BIOS RECOVERY

JBR1

2-3:ME MANUFACTURING MODE

JPME2
1-2:NORMAL

1-2 ENABLE

JPL2 LAN

2-3 DISABLE

JPL1/

JPI2C1:PWR I2C

JPG1:VGA

JPB1:BMC

2-3 DISABLE

1-2 ENABLE

2-3 DISABLE

1-2 ENABLE

JPTG1:10Gb LAN

2-3 DISABLE

1-2 ENABLE

JPS1:SAS

L-SAS0-3

L-SAS4-7

USB8/9(3.0)

PCI-E 3.0 X8

LAN4

LAN3

LAN1

USB12/13(3.0)

I-SATA0

I-SATA1

I-SATA2

I-SATA3

USB2/3

USB4

JTPM1:TPM/PORT80

CHASSIS INTRUSION

I-SATA4

CMOS CLEAR

I-SATA5

CPU2 SLOT4

SPEAKER-PIN 4-7

JD1:
PWR LED-PIN 1-3

2-3:NMI

JWD1:WATCH DOG

1-2:RST

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

RSTPWR

ON

JF1

P1-DIMMD1

P1-DIMMC1

X NICOH/

2FF

HDDNIC
LED1

PWR
LED

NMIX

P2-DIMMF1

P2-DIMME1

CPU2

VGA

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

COM1

IPMI_LAN

LAN2

JD1

2-7 Connecting Cables

Power Connectors

A 24-pin main power supply connector

(J24), and two 8-pin CPU power connec-

tors (JPWR1/JPWR2) are located on the

motherboard. These power connectors

meet the SSI EPS 12V specication and

must be connected to your power supply

to provide adequate power to the system.

See the tables on the right for pin deni-

tions.

ATX Power 24-pin Connector

Pin Denitions (J24)

Pin# Denition Pin # Denition

13 +3.3V 1 +3.3V

14 -12V (NC) 2 +3.3V

15 GND 3 GND

16 PS_ON 4 +5V

17 GND 5 GND

18 GND 6 +5V

19 GND 7 GND

20 Res (NC) 8 PWR_OK

Warning: To provide adequate power supply

to the motherboard, be sure to connect the

24-pin ATX PWR (J24), and the two 8-pin

PWR connectors (JPWR1, JPWR2) to the

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 GND 12 +3.3V

power supply. Failure to do so may void the

manufacturer warranty on your power supply

and motherboard.

2-26

12V 8-pin Power Connec-

tor Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

(Required)

A. J24: 24-pin ATX PWR

(Req'd)

B. JPWR1: 8-pin Proces-

sor PWR (Req'd)

C. JPWR2: 8-pin Proces-

sor PWR (Req'd)

A

C

B

Chapter 2: Installation

FAN1

D

E

F

Fan Headers

This motherboard has eight system/CPU

fan headers (Fan 1-Fan 6, Fan A, and Fan

B) on the motherboard. All these 4-pin

fans headers are backward compatible

with the traditional 3-pin fans. However,

fan speed control is available for 4-pin

fans only. The fan speeds are controlled

by the onboard IPMI 2.0 controller. See

the table on the right for pin denitions.

Chassis Intrusion

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach an

appropriate cable from the chassis to

inform you of a chassis intrusion when

the chassis is opened.

Fan Header

Pin Denitions

Pin# Denition

1 Ground

2 +12V

3 Tachometer

4 PWR Modulation

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

A. Fan 1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. Fan A

H. Fan B

I. Chassis Intrusion

1

JNVI2C1

JD1

FAN4

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

2FF

LED1

LED

C

P1-DIMMD1

NMIX

UID

FAN6

LAN1
LAN2

LAN3

JLAN1

LAN4

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

B

1-2:RST

JWD1:WATCH DOG

2-3:NMI

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

H

BT1

+

SP1

JSTBY1

I-SGPIO1

JTPM1

JPS1

I-SGPIO2

JS1

JVRM1

G

FANA

JWD1

JVRM2

2-27

USB12/13(3.0)

IPMI_LAN

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMA1

1224

A

JPWR2

JPWR1

X10DRL-CT/-iT/-C Motherboard User’s Manual

SAN MAC

BIOS LICENSE

SAS CODE

MAC CODE

IPMI CODE

BAR CODE

UID

LEDPWR

LEDBMC

JUSBRJ45

FAN6

FAN5

FAN1

FANB

FAN2

FAN3

FAN4

FANA

JIPMB1

JNVI2C1

JVRM2

JPTG1

1

JPB1

3

JPF1
JPF2
JPG1
JBR1

JPME2

JI2C1

JI2C2

JPS1

JPL2

JPL1

JVRM1

JWD1

J24

1

13

1224

1

J7J5

JS18

JF1

JPWR2

JPWR1

1

JL1

J21

JPI2C1

24

JPS7

SP1

BT1

+

JLAN3

JUIDB1

JSD1

JS1

JSTBY1

I-SGPIO1

I-SGPIO2

J25

JTPM1

JVGA

JLAN1

JBT1

I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

REV:1.00

CHASSIS INTRUSION

JL1

2-3:DISABLE

1-2:ENABLE

JI2C1/JI2C2

1-2:NORMAL
2-3:BIOS RECOVERY

JBR1

2-3:ME MANUFACTURING MODE

JPME2
1-2:NORMAL

1-2 ENABLE

JPL2 LAN

2-3 DISABLE

JPL1/

JPI2C1:PWR I2C

JPG1:VGA

JPB1:BMC

2-3 DISABLE

1-2 ENABLE

2-3 DISABLE

1-2 ENABLE

JPTG1:10Gb LAN

2-3 DISABLE

1-2 ENABLE

JPS1:SAS

L-SAS0-3

L-SAS4-7

USB8/9(3.0)

PCI-E 3.0 X8

LAN4

LAN3

LAN1

USB12/13(3.0)

I-SATA0

I-SATA1

I-SATA2

I-SATA3

USB2/3

USB4

JTPM1:TPM/PORT80

CHASSIS INTRUSION

I-SATA4

CMOS CLEAR

I-SATA5

CPU2 SLOT4

SPEAKER-PIN 4-7

JD1:
PWR LED-PIN 1-3

2-3:NMI

JWD1:WATCH DOG

1-2:RST

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

RSTPWR

ON

JF1

P1-DIMMD1

P1-DIMMC1

X NICOH/

2FF

HDDNIC
LED1

PWR
LED

NMIX

P2-DIMMF1

P2-DIMME1

CPU2

VGA

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

COM1

IPMI_LAN

LAN2

JD1

Internal Speaker

The Internal Speaker (SP1) can be

used to provide audible indications

for various beep codes. See the table

on the right for pin denitions. Refer

to the layout below for the location of

the Internal Buzzer.

DOM Power Connector

A power connector for SATA DOM

(Disk On Module) devices is located at

JSD1. Connect an appropriate cable

here to provide external power for 3rd

party SATA DOM devices

Note: When using

Supermicro SuperDOMs,

no external power cabling is

required, as they draw power

directly from the yellow SATA

connectors

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm

Pin Denitions

Speaker

DOM PWR

Pin# Denition

1 +5V

2 Ground

3 Ground

A. Internal Speaker (Buzzer)

B. SATA DOM PWR (JSD1)

B

A

2-28

Chapter 2: Installation

FAN1

TPM/Port 80 Header

A Trusted Platform Module/Port 80

header is located at JTPM1 to provide

TPM support and Port 80 connection.

Use this header to enhance system

performance and data security. See

the table on the right for pin deni-

tions.

LSI SAS 3108 TFM Connector

The TFM connector is used to attach

a TFM module and SuperCap to the

motherboard for LSI CacheVault tech-

nology support.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 +5V (X)

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

11 LAD0 12 GND

13 SMB_CLK4 14 SMB_DAT4

15 +3.3V_STBY 16 SERIRQ

17 GND 18 CLKRUN# (X)

19 LPCPD# 20 LDRQ# (X)

A. TPM/Port 80 Header

B. TFM Connector

1

JNVI2C1

JD1

FAN4

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

2FF

LED1

LED

UID

JWD1:WATCH DOG

FAN6

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

2-29

LAN1
LAN2

LAN3

JLAN1

LAN4

REV:1.00

FAN2

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

JI2C1

JI2C2

JS18

B

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

L-SAS4-7

FANB

LEDPWR

L-SAS0-3

I-SGPIO1

I-SGPIO2

FANA

BT1

+

SP1

JSTBY1

JTPM1

JPS1

JS1

JVRM1

JWD1

JVRM2

A

USB12/13(3.0)

IPMI_LAN

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMA1

1224

JPWR2

JPWR1

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

Power SMB (I2C) Connector

Power System Management Bus (I2C)

Connector (JPI2C1) monitors power

supply, fan and system temperatures.

See the table on the right for pin

denitions.

IPMB

A System Management Bus header

for IPMI 2.0 is located at JIPMB1.

Connect the appropriate cable here

to use the IPMB I2C connection on

your system.

JNVI2C1

JD1

FAN4

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

2FF

LED1

LED

UID

FAN6

LAN3
LAN4

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

1-2:RST

JWD1:WATCH DOG

2-3:NMI

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

B

1

JL1

I-SATA0

JPF1
JPF2
JPG1

JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

BT1

+

SP1

JSTBY1

JTPM1

JPS1

I-SGPIO2

JS1

JVRM1

FANA

JWD1

JVRM2

PWR SMB

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

IPMB Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

2

A. JPI

C1

B. JIPMB1

JVGA

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

JLAN1

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

13

1

A

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMA1

1224

JPWR2

JPWR1

2-30

Chapter 2: Installation

SAN MAC

BIOS LICENSE

SAS CODE

MAC CODE

IPMI CODE

BAR CODE

UID

LEDPWR

LEDBMC

JUSBRJ45

FAN6

FAN5

FAN1

FANB

FAN2

FAN3

FAN4

FANA

JIPMB1

JNVI2C1

JVRM2

JPTG1

1

JPB1

3

JPF1
JPF2
JPG1

JBR1

JPME2

JI2C1

JI2C2

JPS1

JPL2

JPL1

JVRM1

JWD1

J24

1

13

1224

1

J7J5

JS18

JF1

JPWR2

JPWR1

1

JL1

J21

JPI2C1

24

JPS7

SP1

BT1

+

JLAN3

JUIDB1

JSD1

JS1

JSTBY1

I-SGPIO1

I-SGPIO2

J25

JTPM1

JVGA

JLAN1

JBT1

I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

REV:1.00

CHASSIS INTRUSION

JL1

2-3:DISABLE

1-2:ENABLE

JI2C1/JI2C2

1-2:NORMAL
2-3:BIOS RECOVERY

JBR1

2-3:ME MANUFACTURING MODE

JPME2
1-2:NORMAL

1-2 ENABLE

JPL2 LAN

2-3 DISABLE

JPL1/

JPI2C1:PWR I2C

JPG1:VGA

JPB1:BMC

2-3 DISABLE

1-2 ENABLE

2-3 DISABLE

1-2 ENABLE

JPTG1:10Gb LAN

2-3 DISABLE

1-2 ENABLE

JPS1:SAS

L-SAS0-3

L-SAS4-7

USB8/9(3.0)

PCI-E 3.0 X8

LAN4

LAN3

LAN1

USB12/13(3.0)

I-SATA0

I-SATA1

I-SATA2

I-SATA3

USB2/3

USB4

JTPM1:TPM/PORT80

CHASSIS INTRUSION

I-SATA4

CMOS CLEAR

I-SATA5

CPU2 SLOT4

SPEAKER-PIN 4-7

JD1:
PWR LED-PIN 1-3

2-3:NMI

JWD1:WATCH DOG

1-2:RST

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

RSTPWR

ON

JF1

P1-DIMMD1

P1-DIMMC1

X NICOH/

2FF

HDDNIC
LED1

PWR
LED

NMIX

P2-DIMMF1

P2-DIMME1

CPU2

VGA

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

COM1

IPMI_LAN

LAN2

JD1

I-SGPIO1/2 Headers

Two SGPIO (Serial Link General Pur-

pose Input/Output) headers are locat-

ed on the motherboard. I-SGPIO1/2

support onboard I-SATA0-5 connec-

tions. See the table on the right for

pin denitions.

Standby Power Header

The +5V Standby Power header is

located at JSTBY1 on the mother-

board. See the table on the right for

pin denitions. (You must also have a

card with a Standby Power connector

and a cable to use this feature.)

A. I-SGPIO1

B. I-SGPIO2

C. Standby PWR

I-SGPIO Headers

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 Data

5 Load 6 Ground

7 Clock 8 NC

Note: NC= No Connection

I-SGPIO0/1 & S-SGPIO Support

I-SGPIO1 I-SATA Ports 0/1/2/3 Supported

I-SGPIO2 I-SATA Ports 4/5 Supported

Standby PWR

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

A

B

C

2-31

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

JF1

Power LED/Speaker

Pins 1-3 of JD1 are used for power

LED indication, and pins 4-7 are for

the speaker. See the tables on the

right for pin denitions. Please note

that the speaker connector pins (4-7)

are used with an external speaker. If

you wish to use the onboard speaker,

you should close pins 6-7 with a cap.

PCI-E NVMe AOC I2C Header

Connector JNVI2C1 is a management

header for the Supermicro AOC NVme

PCI-E peripheral cards. Please con-

nect the I2C cable to this connector.

1

3

I-SATA0

I-SATA1

I-SATA2

J25

LEDPWR

COM1

JPB1

CHASSIS INTRUSION

JL1

I-SATA3

LEDBMC

24

JIPMB1

B

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

CMOS CLEAR

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

FANA

JTPM1

I-SGPIO2

BT1

+

SP1

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

A

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

UID

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

FAN6

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN

1-2 ENABLE
2-3 DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

Pin Setting Denition

Pin 1 JD1_PIN1

Pin 2 FP_PWR_LED

Pin 3 FP_PWR_LED

Pin Setting Denition

Pin 4 P5V

Pin 5 No Connection

Pin 6 R_SPKRIN_N

Pin 7 R_SPKRIN

LAN1
LAN2

LAN3

JLAN1

LAN4

JLAN3

P2-DIMMF1

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2

I2C BUS FOR PCI-E SLOT

1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

SAN MAC

SAS CODE

FAN2

PWR LED Connector

Pin Denitions

Speaker Connector

Pin Settings

A. PWR LED/Speaker

B. JNVI2C1

JVGA

USB12/13(3.0)

IPMI_LAN

JUSBRJ45

CPU2

VGA

JPL2
FAN5

BAR CODE

CPU1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

BIOS LICENSE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMB1

P1-DIMMA1

1224

JPWR2

JPWR1

2-32

JF1

2-8 Jumper Settings

Connector

Pins

Jumper

Cap

Setting

Chapter 2: Installation

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers create

shorts between two pins to change the

function of the connector. Pin 1 is identied

with a square solder pad on the printed

circuit board. See the motherboard layout

pages for jumper locations.

Note: On two pin jumpers,

"Closed" means the jumper is

on and "Open" means the jumper

is off the pins.

LAN Enable/Disable

Use JPL1 to enable or disable GLAN

Port 1, and use JPL2 to enable or disable

GLAN Port 2 on the motherboard. See the

table on the right for jumper settings. The

default setting is Enabled.

UID

JUIDB1

FAN6

LAN1

1

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

P1-DIMMD1

P1-DIMMC1

JNVI2C1

JTPM1:TPM/PORT80

JD1

JF1

J7J5

RSTPWR

X NICOH/

HDDNIC

PWR

NMIX

ON

2FF

LED1

LED

FAN3

FAN4

LAN2

LAN3

JLAN1

LAN4

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

1-2:RST

JWD1:WATCH DOG

2-3:NMI

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

LEDPWR

LEDBMC

COM1

24

JIPMB1

CPU2 SLOT4

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

CMOS CLEAR

PCI-E 3.0 X8

JS18

BT1

+

SP1

JSD1

USB8/9(3.0)

JPS7

L-SAS4-7

FANB

JSTBY1

I-SGPIO1

JTPM1

JPS1

I-SGPIO2

JS1

JVRM1

L-SAS0-3

FANA

JWD1

JVRM2

USB12/13(3.0)

IPMI_LAN

3 2 1

3 2 1

Pin 1-2 short

LAN Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (default)

2-3 Disabled

A. GLAN1 Enable

B. GLAN2 Enable

A

JVGA

VGA

JPL2

FAN5

B

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMB1

P1-DIMMA1

1224

FAN1

JPWR2

JPWR1

2-33

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

Clear CMOS

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads

to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such

as a small screwdriver to touch both pads at the same time to shor t the connection.

Note 1. Please shut down the system, and then short JBT1 to clear CMOS.

Note 2. Clearing CMOS will also clear all passwords.

Watch Dog Enable/Disable

Watch Dog (JWD1) is a system monitor that

will reboot the system when a software ap-

plication hangs. Close Pins 1-2 to reset the

system if an application hangs. Close Pins

2-3 to generate a non-maskable interrupt

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset (default)

Pins 2-3 NMI

Open Disabled

signal for the application that hangs. See the

table on the right for jumper settings. Watch

Dog must also be enabled in the BIOS.

A. Clear CMOS

B. Watch Dog Enable

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

2FF

LED1

LED

UID

FAN6

JLAN3

P2-DIMMF1

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

X10DRL-CT

DESIGNED IN USA

SAN MAC

USB12/13(3.0)

IPMI_LAN

LAN1

LAN2

LAN3

JLAN1

LAN4

REV:1.00

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

1-2:RST

JWD1:WATCH DOG

2-3:NMI

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

I-SATA2

I-SATA3

LEDBMC

24

JIPMB1

CPU2 SLOT4

JPF1
JPF2
JPG1

JBR1

JPME2

JBT1

CMOS CLEAR

A

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

FANA

JTPM1

I-SGPIO2

BT1

+

SP1

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

JVGA

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

JPWR2

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

1224

JPWR1

B

2-34

Chapter 2: Installation

FAN1

VGA Enable

Jumper JPG1 allows the user to enable

or disable the onboard VGA connector.

The default setting is 1-2 to enable the

connection. See the table on the right

for jumper settings.

BMC Enable

Jumper JPB1 allows you to enable or

disable the embedded the onboard BMC

(Baseboard Management) controller to

provide IPMI 2.0/KVM support on the

motherboard. See the table on the right

for jumper settings.

LAN EEPROM Update

Jumper J21 allows the rmware of the

built-in Intel i210 LAN controller to be

updated. Follow the release notes

accompanying the rmware le for in-

structions. See the table on the right for

jumper settings.

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

UID

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

FAN6

P2-DIMMF1

JPL1/

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

JLAN3

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN
1-2 ENABLE
2-3 DISABLE

SAN MAC

SAS CODE

LEDBMC

COM1

JPB1

B

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

A

CMOS CLEAR

I-SATA2

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

FANA

I-SGPIO2

BT1

+

SP1

JSTBY1

JNVI2C1

JTPM1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

VGA Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

BMC Enable

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC Enable (Default)

Pins 2-3 Disabled

LAN EEPROM Update

Jumper Settings

Jumper Setting Denition

Open Disabled (Default)

Pins 1-2 Enabled

A. VGA Enable

B. BMC Enable

C. LAN EEPROM Update

C

P2-DIMMH1

P2-DIMMG1

JPWR2

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

1224

JPWR1

JVGA

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

LAN3

JLAN1

LAN4

REV:1.00

FAN2

VGA

JPL2
FAN5

JUSBRJ45

CPU2

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

P1-DIMMA1

2-35

X10DRL-CT/-iT/-C Motherboard User’s Manual

FAN1

I2C Bus to PCI-Exp. Slots

Use Jumpers JI2C1 and JI2C2 to connect

the System Management Bus (I2C) to on-

board PCI-Express slots to improve PCI

performance. These two jumpers are to

be set at the same time. The default set-

ting is Disabled (Pins 2-3). See the table

on the right for jumper settings.

ME Manufacturing Mode Select

Close Pin 2 and Pin 3 of Jumper JPME2

to bypass SPI ash security and force

the system to operate in the Manufac-

turer mode, allowing the user to ash

the system rmware from a host server

for system setting modications. See the

table on the right for jumper settings.

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

UID

FAN6

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS

1-2 ENABLE

2-3 DISABLE

1-2:RST
2-3:NMI

CMOS CLEAR

FANB

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

JS18

JSD1

USB8/9(3.0)

L-SAS4-7

LEDBMC

24

JIPMB1

CPU2 SLOT4

C

PCI-E 3.0 X8

A

JPTG1

1

JI2C1

JI2C2

B

BT1

+

SP1

JSTBY1

I-SGPIO1

L-SAS0-3

FANA

JTPM1

I-SGPIO2

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

JPS7

JF1

LEDPWR

JLAN3

P2-DIMMF1

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

SAN MAC

SAS CODE

I2C for PCI-E slots

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled (Default)

Jumper Setting Denition

1-2 Normal (Default)

2-3 Manufacture Mode

USB12/13(3.0)

IPMI_LAN

LAN1

JUSBRJ45

LAN2

LAN3

JLAN1

LAN4

CPU2

REV:1.00

CPU1

FAN2

ME Mode Select

Jumper Settings

2

A. JI

C1

2

B. JI

C2

C. ME Select

JVGA

VGA

JPL2
FAN5

BAR CODE

BIOS LICENSE

P1-DIMMB1

P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

JPWR2

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

1224

JPWR1

2-36

Chapter 2: Installation

FAN1

BIOS Recovery Switch (JBR1)

The BIOS Recovery Switch (JBR1) is

used to enable or disable the BIOS

Recovery feature of the motherboard.

Move the jumper to pins 2-3 to begin

the recovery process. See Appendix D.

SAS Enable/Disable

Jumper JPS1 allows the user to en-

able or disable the onboard SAS ports.

The default setting is 1-2 to enable the

connection. See the table on the right

for jumper settings. This feature is

available only on the X10DRL-CT and

X10DRL-C.

10GB LAN Enable/Disable

Jumper JPTG1 allows the user to en-

able or disable 10Gb capability on

LAN3 and LAN4. See the table on the

right for jumper settings. This feature is

available only on the X10DRL-CT and

X10DRL-iT.

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

UID

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

FAN6

P2-DIMME1

JL1
CHASSIS INTRUSION

JBR1
1-2:NORMAL
2-3:BIOS RECOVERY

JPTG1:10Gb LAN
1-2 ENABLE
2-3 DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

P2-DIMMF1

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2

I2C BUS FOR PCI-E SLOT

1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

LEDBMC

24

JIPMB1

CPU2 SLOT4

JPF1
JPF2
JPG1
JBR1

A

JPME2

JBT1

PCI-E 3.0 X8

C

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

FANA

JTPM1

I-SGPIO2

BT1

+

SP1

B

JSTBY1

JNVI2C1

JPS1

JS1

JD1

JVRM1

JWD1

JVRM2

FAN4

2-37

JLAN3

JPL2 LAN

SAN MAC

SAS CODE

BIOS Recovery

Jumper Settings

Jumper Setting Denition

1-2 Normal (Default)

2-3 Enable Recovery

SAS Enable/Disable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

10Gb LAN Enable/Disable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

A. JBR1

B. JPS1

C. JPTG1

P2-DIMMH1

P2-DIMMG1

JPWR2

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

1224

JPWR1

JVGA

USB12/13(3.0)

IPMI_LAN

LAN1

JUSBRJ45

LAN2

LAN3

JLAN1

LAN4

CPU2

REV:1.00

FAN2

VGA

JPL2
FAN5

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

P1-DIMMA1

X10DRL-CT/-iT/-C Motherboard User’s Manual

D

LAN 1/LAN 2

E

LAN 1/LAN 2

IPMI LAN

(X8ST3-F)

2-9 Onboard LED Indicators

LAN1/2/3/4, IPMI LAN LEDs

Four LAN ports (LAN1, LAN2, LAN3*, LAN4*), and IPMI Dedicated LAN are located

on the I/O back panel of the motherboard. The LAN ports are supported by the

onboard Intel LAN controller, and IPMI LAN is supported by the BMC. Each Ethernet

LAN port has two LEDs. The Amber LED indicates activity, while the other Link

LED may be green, amber or off to indicate the speed of the connections. See

the tables at right for more information.

Note: LAN3 and LAN4 are supported on the X10DRL-CT/-iT only.

LAN Link

LED Status

LED Color Denition

Off 10 Mbps, or No Connection

Green 100 Mbps

Amber 1 Gbps

Activity LED

Rear View (when facing the rear

Link LED

IPMI_LAN

A

Activity LED

C

B

LAN1~LAN4

of the chassis.

10G-LAN Link

LED Status (X10DRL-CT/iT)

LED Color Denition

Off 10 or 100 Mbps, or No

Connection

Green 10 Gbps

Amber 1 Gbps

Link LED

IPMI_LAN Link LED (Left) &

Activity LED (Right)

Color Status Denition

Link (Left) Green:

Activity
(Right)

Solid

Amber:
Solid

Orange:

Blinking

100 Mbps

1 Gbps

Active

A. LAN1 LEDs

B. LAN2 LEDs

C. LAN3 LEDs*

D. LAN4 LEDs*

E. IPMI LEDs

2-38

Chapter 2: Installation

FAN1

Onboard Power LED

An Onboard Power LED is located at

LEDPWR on the motherboard. When this

LED is on, the system is on. Be sure to

turn off the system and unplug the power

cord before removing or installing com-

ponents. See the tables at right for more

information.

BMC Heartbeat LED

A BMC Hear tbeat LED is located at

LEDBMC on the motherboard. When it

is blinking, BMC functions normally. See

the table at right for more information.

Note: Refer to Page 2-19 for information on the rear UID LED (LE1).

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

UID

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

JWD1:WATCH DOG

2FF

LED1

LED

B

JPF1
JPF2
JPG1
JBR1

JPME2

JBT1

JS18

JSD1

USB8/9(3.0)

L-SAS4-7

A

L-SAS0-3

LEDBMC

I-SGPIO1

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

BT1

+

SP1

JSTBY1

JNVI2C1

JTPM1

JPS1

I-SGPIO2

JS1

JD1

JVRM1

FANA

JWD1

JVRM2

FAN4

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

I-SATA1

CMOS CLEAR

I-SATA2

I-SATA3

I-SATA5

J25

USB2/3

I-SATA4

USB4

JPS7

JF1

FANB

LEDPWR

FAN6

P2-DIMME1

JL1

CHASSIS INTRUSION

JBR1

1-2:NORMAL

2-3:BIOS RECOVERY

JPTG1:10Gb LAN

1-2 ENABLE

2-3 DISABLE

X10DRL-CT

DESIGNED IN USA

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

1-2:RST
2-3:NMI

JLAN3

P2-DIMMF1

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2

I2C BUS FOR PCI-E SLOT

1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/

1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

SAN MAC

SAS CODE

FAN2

2-39

Onboard PWR LED Indicator

LED States

LED Color Denition

Off System Off (PWR cable

not connected)

Green System On

Green:
Flashing

Quickly

ACPI S1 State

BMC Heartbeat LED

States

Color/State Denition

Green:

Blinking

BMC: Normal

A. PWR LED

B. BMC LED

P2-DIMMG1

P2-DIMMH1

JPWR2

JPI2C1

JPL1

J21

MAC CODE

IPMI CODE

13

1

J24

JPI2C1:PWR I2C

1224

JPWR1

JVGA

USB12/13(3.0)

IPMI_LAN

LAN1
LAN2

LAN3

JLAN1

LAN4

JUSBRJ45

VGA

JPL2
FAN5

CPU2

REV:1.00

BAR CODE

BIOS LICENSE

CPU1

P1-DIMMB1

P1-DIMMA1

X10DRL-CT/-iT/-C Motherboard User’s Manual

E

F

G

D

2-10 SATA and SAS Connections

SATA 3.0 and SAS Ports

Six SATA ports are located on the motherboard. These

SATA 3.0 ports (I-SATA 0-5) are supported by the Intel

PCH C612. There are also Eight (8) SAS por ts that are

supported by the LSI 3108 controller. See the table on

the right for SATA pin denitions. I-SATA 4 and I-SATA

5 also support SATA DOM (Device-on-Module) devices

with latch power. SAS is supported on the X10DRL-

CT/-C motherboard only.

Note: For more information on SATA HostRAID conguration, please refer

to the Intel SATA HostRAID User's Guide posted on our website @ http://

www.supermicro.com..

SATA Connectors

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

LAN1
LAN2

JLAN1

E. I-SATA4

F. I-SATA5

G. L-SAS0~3

H. L-SAS4~7

USB12/13(3.0)

JPL2
FAN5

IPMI_LAN

JUSBRJ45

CPU2

CPU1

JVGA

VGA

JPL1

J21

MAC CODE

P2-DIMMG1

P2-DIMMH1

IPMI CODE

BAR CODE

BIOS LICENSE

13

1

J24

JPI2C1

JPI2C1:PWR I2C

P1-DIMMB1

P1-DIMMA1

1224

FAN1

JPWR2

JPWR1

A. I-SATA0

B. I-SATA1

C. I-SATA2

D. I-SATA3

CPU1 SLOT5 PCI-E 3.0 X16

JF1

RSTPWR

X NICOH/

ON

FAN3

JUIDB1

1

CPU1 SLOT6 PCI-E 3.0 X8

P1-DIMMD1

P1-DIMMC1

JTPM1:TPM/PORT80

J7J5

HDDNIC

PWR

NMIX

2FF

LED1

LED

UID

FAN6

LAN3
LAN4

JLAN3

P2-DIMMF1

P2-DIMME1

JL1

CHASSIS INTRUSION

JBR1

1-2:NORMAL

2-3:BIOS RECOVERY

JPTG1:10Gb LAN

1-2 ENABLE

2-3 DISABLE

JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE

JI2C1/JI2C2
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE

JPB1:BMC

1-2 ENABLE
2-3 DISABLE

JPL2 LAN

JPL1/
1-2 ENABLE
2-3 DISABLE

JPG1:VGA
1-2:ENABLE
2-3:DISABLE

REV:1.00

X10DRL-CT

DESIGNED IN USA

SAN MAC

SAS CODE

JD1:
PWR LED-PIN 1-3
SPEAKER-PIN 4-7

JPS1:SAS
1-2 ENABLE
2-3 DISABLE

FAN2

1-2:RST

JWD1:WATCH DOG

2-3:NMI

LEDBMC

COM1

JPB1

3

CHASSIS INTRUSION

1

JL1

I-SATA0

JPF1

A

JPF2
JPG1
JBR1

JPME2

JBT1

I-SATA1

CMOS CLEAR

B

I-SATA2

C

I-SATA3

24

JIPMB1

CPU2 SLOT4

PCI-E 3.0 X8

JPTG1

1

JI2C1

JI2C2

JS18

I-SATA5

J25

USB2/3

I-SATA4

JSD1

USB4

USB8/9(3.0)

JPS7

H

JF1

LEDPWR

L-SAS0-3

L-SAS4-7

FANB

I-SGPIO1

BT1

+

SP1

JSTBY1

JNVI2C1

JTPM1

JPS1

I-SGPIO2

JS1

JD1

JVRM1

FANA

JWD1

JVRM2

FAN4

2-40

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the ‘Technical Support

Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or installing any

hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse.

3. Remove all add-on cards.

4. Install CPU 1 rst (making sure it is fully seated) and connect the front panel

connectors to the motherboard.

No Power

1. Make sure that no short circuits between the motherboard and the chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch on the power supply is properly set, if avail-

able.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3-1

X10DRL-CT/-iT/-C Motherboard User’s Manual

No Video

1. If the power is on, but you have no video, remove all the add-on cards and

cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A

for details on beep codes.

System Boot Failure

If the system does not display POST or does not respond after the power is turned

on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules in-

stalled. If there is still no error beep, try to turn on the system again with only

one processor installed in CPU Socket#1. If there is still no error beep, replace

the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power

cord and contracting both pads on the CMOS Clear Jumper (JBT1). (Refer to

Section 2-8 in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM modules.

Make sure that system power is on, and memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system

boots, check for bad DIMM modules or slots by following the Memory Errors

Troubleshooting procedure in this Chapter.

Losing the System’s Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality

power supply may cause the system to lose the CMOS setup information.

Refer to Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the Setup Conguration problem, contact your

vendor for repairs.

3-2

Chapter 3: Troubleshooting

Memory Errors

When a No-Memory Beep Code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that

the DIMM modules are properly and fully installed. (For memory compatibility,

refer to the Memory Compatibility Chart posted on our website @ http://www.

supermicro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recom-

mended that you use the same RAM type and speed for all DIMMs in the

system.

3. Make sure that you are using the correct type of (RDIMM)/Load Reduced

(LRDIMM) ECC DDR4 DIMM modules recommended by the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among

all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the

instructions given in Section 2-4 in Chapter 2.

6. Please follow the instructions given in the DIMM Population Tables listed in

Section 2-4 to install your memory modules.

When the System Becomes Unstable

A. When the system becomes unstable during or after OS installation, check

the following:

1. CPU/BIOS support: Make sure that your CPU is supported, and you have the

latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by test-

ing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website http:\\www.supermicro.

com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-

place the bad HDDs with good ones.

4. System cooling: Check system cooling to make sure that all heatsink fans,

and CPU/system fans, etc., work properly. Check Hardware Monitoring set-

tings in the IPMI to make sure that the CPU and System temperatures are

3-3

X10DRL-CT/-iT/-C Motherboard User’s Manual

within the normal range. Also check the front panel Overheat LED, and make

sure that the Overheat LED is not on.

5. Adequate power supply: Make sure that the power supply provides adequate

power to the system. Make sure that all power connectors are connected.

Please refer to our website for more information on minimum power require-

ment.

6. Proper software support: Make sure that the correct drivers are used.

B. When the system becomes unstable before or during OS installation, check

the following:

1. Source of installation: Make sure that the devices used for installation are

working properly, including boot devices such as CD/DVD disc, CD/DVD-

ROM.

2. Cable connection: Check to make sure that all cables are connected and

working properly.

3. Using minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use minimum conguration

(with a CPU and a memory module installed) to identify the trouble areas.

Refer to the steps listed in Section A above for proper troubleshooting proce-

dures.

4. Identifying bad components by isolating them: If necessary, remove a compo-

nent in question from the chassis, and test it in isolation to make sure that it

works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several

items at the same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to

see if the system will work properly. If so, then the old component is bad.

You can also install the component in question in another system. If the new

system works, the component is good and the old system has problems.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please

note that as a motherboard manufacturer, Supermicro also sells motherboards

through its channels, so it is best to rst check with your distributor or reseller for

3-4

Chapter 3: Troubleshooting

troubleshooting services. They should know of any possible problem(s) with the

specic system conguration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.

com).

3. If you still cannot resolve the problem, include the following information when

contacting Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your

system rst boots up.)

• System conguration

4. An example of a Technical Support form is on our website at (http://www.

supermicro.com/RmaForm/).

• Distributors: For immediate assistance, please have your account number ready

when placing a call to our technical support department. We can be reached by

e-mail at [e-mail].

3-5

X10DRL-CT/-iT/-C Motherboard User’s Manual

3-3 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning! Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

3-6

Chapter 3: Troubleshooting

3-4 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The motherboard supports Registered (RDIMM)/Load Reduced (LRDIMM)

ECC DDR4 DIMM modules. To enhance memory performance, do not mix memory

modules of different speeds and sizes. Please follow all memory installation instruc-

tions given on Section 2-4 in Chapter 2.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website

at http://www.supermicro.com. Please check our BIOS warning message and the

information on how to update your BIOS on our website. Select your motherboard

model and download the BIOS le to your computer. Also, check the current BIOS

revision to make sure that it is newer than your BIOS before downloading. You can

choose from the zip le and the .exe le. If you choose the zip BIOS le, please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format

FLASH.BAT lename.rom from your bootable USB device to ash the BIOS. Then,

your system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed.

Send your motherboard back to our RMA Department at Supermicro for

repair. For BIOS Recovery instructions, please refer to the AMI BIOS

Recovery Instructions posted at http://www.supermicro.com.

Question: How do I handle the used battery?

Answer: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment.

Do not discard a used battery in the garbage or a public landll. Please comply

with the regulations set up by your local hazardous waste management agency to

dispose of your used battery properly.

3-7

X10DRL-CT/-iT/-C Motherboard User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before

any warranty service will be rendered. You can obtain service by calling your ven-

dor for a Returned Merchandise Authorization (RMA) number. When returning the

motherboard to the manufacturer, the RMA number should be prominently displayed

on the outside of the shipping carton, and the shipping package is mailed prepaid

or hand-carried. Shipping and handling charges will be applied for all orders that

must be mailed when service is complete. For faster service, You can also request

a RMA authorization online (http://www.supermicro.com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages in-

curred in shipping or from failure due to the alternation, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product problems.

3-8

Chapter 4: AMI BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10DRL-CT/iT/C. The

ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter

describes the basic navigation of the AMI BIOS setup utility screens.

Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery

Instructions in Appendix C.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Delete> key while the

system is booting up.

Note: In most cases, the <Delete> key is used to invoke the AMI BIOS

setup screen.

Each main BIOS menu option is described in this manual. The AMI BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for a text message. When an option is selected in the

left frame, it is highlighted in white. Often a text message will accompany it.

Note: the AMI BIOS has default text messages built in. Supermicro retains

the option to include, omit, or change any of these text messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during the

setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow

keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Del> at the appropriate time during system boot.

4-1

X10DRL-CT/-iT/-C Motherboard User’s Manual

How to Start the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen, below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall

Supermicro be liable for direct, indirect, special, incidental, or consequential damages

arising from a BIOS update. If you have to update the BIOS, do not shut down or reset

the system while the BIOS is updating to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS setup screen is shown below.

4-2

Chapter 4: AMI BIOS

The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or

System Time using the arrow keys. Enter new values using the keyboard. Press the

<Tab> key or the arrow keys to move between elds. The date must be entered in

Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears

as 17:30:00.

Supermicro X10DRL-CT

Version: This item displays the version of the BIOS ROM used in the system.

Build Date: This item displays the date when the version of the BIOS ROM used

in the system was built.

Memory Information

Total Memory: This item displays the total size of memory available in the system.

Memory Speed: This item displays the default speed of the memory modules

installed in the system.

4-3

X10DRL-CT/-iT/-C Motherboard User’s Manual

4-3 Advanced Setup Congurations

Use the arrow keys to select Advanced setup and press <Enter> to access the

submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, a

very high DRAM frequency or an incorrect BIOS timing setting may cause the system

to malfunction. When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen display between POST messages or the OEM

logo at bootup. Select Disabled to display the POST messages. Select Enabled

to display the OEM logo instead of the normal POST messages. The options are

Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to

use the current AddOn ROM display setting. Select Force BIOS to use the Option

ROM display mode set by the system BIOS. The options are Force BIOS and

Keep Current.

Bootup Num-Lock State

Use this feature to set the Power-on state for the Numlock key. The options are

Off and On.

4-4

Chapter 4: AMI BIOS

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error

occurs. The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Inter-

rupt 19 at bootup immediately and allow the drives that are attached to these host

adaptors to function as bootable disks. If this item is set to Postponed, the ROM

BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the

drives attached to these adaptors to function as bootable devices at bootup. The

options are Immediate and Postponed.

Re-try Boot

When EFI Boot is selected, the system BIOS will automatically reboot the system

from an EFI boot device after its initial boot failure. Select Legacy Boot to allow

the BIOS to automatically reboot the system from a Legacy boot device after its

initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inac -

tive for more than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed.

Select 4 Seconds Override for the user to power off the system after pressing and

holding the power button for 4 seconds or longer. Select Instant Off to instantly

power off the system as soon as the user presses the power button. The options

are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for

the system power to remain off after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power-On,

Stay-Off and Last State.

4-5

X10DRL-CT/-iT/-C Motherboard User’s Manual

CPU Conguration

This submenu displays the following CPU information as detected by the BIOS. It

also allows the user to congure CPU settings.

CPU1 / CPU2

This submenu displays the following information of the CPU installed in Socket 1

and Socket 2.

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• CPU 1 Version

• CPU 2 Version

Clock Spread Spectrum

Select Enabled to allow the BIOS to monitor and attempt to reduce the level of

Electromagnetic Interference caused by the components whenever needed. The

options are Disabled and Enabled.

Hyper-Threading (All)

Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-

formance. The options are Enable and Disable.

Cores Enabled

Select the number of cores to enable. Leaving this at '0' means all cores are enabled.

Up to 12 cores are available. The default is 0.

4-6

Chapter 4: AMI BIOS

Execute-Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit Technology support, which will allow the

processor to designate areas in the system memory where an application code can

execute and where it cannot, thus preventing a worm or a virus from ooding illegal

codes to overwhelm the processor to damage the system during an attack. This

feature is used in conjunction with the items: "Clear MCA," "VMX," "Enable SMX,"

and "Lock Chipset" for Virtualization media support. The options are Enable and

Disable. (Refer to Intel and Microsoft websites for more information.)

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in

the system. The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-

tions from the main memory to the L2 cache to improve CPU performance. The

options are Disable and Enable.

Adjacent Cache Line Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

Note: Please reboot the system for changes on this setting to take effect.

Please refer to Intel’s website for detailed information.

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by

the CPU)

If set to Enable, the DCU Streamer Prefetcher will prefetch data streams from the

cache memory to the DCU (Data Cache Unit) to speed up data accessing and

processing to enhance CPU performance. The options are Disable and Enable.

DCU IP Prefetcher

If set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP

addresses to improve network connectivity and system performance. The options

are Enable and Disable.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to improve the

efciency of data transferring and accessing. The options are Auto, Enable, and

Disable.

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X10DRL-CT/-iT/-C Motherboard User’s Manual

X2APIC (Advanced Programmable Interrupt Controller)

Based on Intel's Hyper-Threading architecture, each logical processor (thread) is

assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to En-

able, the APIC ID will be expanded (X2) from 8 bits to 16 bits to provide 512 APIDs

to each thread to enhance CPU performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d sup­port by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and availability

in networking and data-sharing. The options are Enable and Disable

 Advanced Power Management Conguration

Advanced Power Management Conguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to customize

system power settings. Select Max Performance to optimize system performance.

Select Disabled to disable power-saving settings. The options are Disable, Energy

Efcient, and Custom.

If the option is set to Energy Efcient or Custom, the following items will display:

 CPU P State Control (Available when Power Technology
is set to Custom)

EIST (P-states)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically

adjust processor voltage and core frequency to reduce power consumption and

heat dissipation. The options are Disable and Enable.

Turbo Mode

Select Enabled to use the Turbo Mode to boost system performance. The options

are Enable and Disable.

4-8

Chapter 4: AMI BIOS

P-state Coordination

This feature is used to change the P-state (Power-Performance State) coordi-

nation type. P-state is also known as "SpeedStep" for Intel processors. Select

HW_ALL to change the P-state coordination type for hardware components only.

Select SW_ALL to change the P-state coordination type for all software installed

in the system. Select SW_ANY to change the P-state coordination type for a soft-

ware program in the system. The options are HW_All, SW_ALL, and SW_ANY.

 CPU C State Control (Available when Power Technology
is set to Custom)

Package C State limit

Use this item to set the limit on the C-State package register. The options are

C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state.

CPU C3 Report

Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the

operating system. During the CPU C6 state, power to all cache is turned off.

The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly

reduce the CPU's power consumption by reducing the CPU's clock cycle and

voltage during a Halt-state. The options are Disable and Enable.

 CPU T State Control (Available when Power Technology
is set to Custom)

ACPI (Advanced Conguration Power Interface) T-States

Select Enable to support CPU throttling by the operating system to reduce power

consumption. The options are Enable and Disable.

4-9

X10DRL-CT/-iT/-C Motherboard User’s Manual

Chipset Conguration

Warning! Please set the correct settings for the items below. A wrong conguration

setting may cause the system to become malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

IIO Conguration

EV DFX (Device Function On-Hide) Feature

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a

processor will always remain clear during electric tuning. The options are Dis-

able and Enable.

IIO1 Conguration

II01 Port 1A Link Speed

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).

II01 Port 2A Link Speed

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).

II01 Port 2C Link Speed

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).

II01 Port 3A Link Speed

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).

IOAT (Intel® IO Acceleration) Conguration

Enable IOAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support, which

signicantly reduces CPU overhead by leveraging CPU architectural improve-

ments and freeing the system resource for other tasks. The options are Enable

and Disable.

4-10

Chapter 4: AMI BIOS

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain

transactions to violate the strict-ordering rules of PCI bus for a transaction to

be completed prior to other transactions that have already been enqueued. The

options are Disable and Enable.

 Intel VT for Directed I/O (VT-d)

Intel VT for Direct I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d
support by reporting the I/O device assignments to the VMM (Virtual Machine

Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O

resource sharing across Intel platforms, providing greater reliability, security and

availability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance.

The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct

Memory Access) to enhance system performance. The options are Enable and

Disable.

Coherency Support (Isoch)

Select Enable for the Iscoh VT-d engine to pass through ATS to enhance system

performance. The options are Enable and Disable.

4-11

X10DRL-CT/-iT/-C Motherboard User’s Manual

QPI (Quick Path Interconnect) Conguration

QPI Status

The following information will display:

• Number of CPU

• Number of IIO

• Current QPI Link Speed

• Current QPI Link Frequency

• QPI Global MMIO Low Base/Limit

• QPI Global MMIO High Base/Limit

• QPI PCIe Conguration Base/Size

Link Frequency Select

Use this item to select the desired frequency for QPI Link connections. The op-

tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited.

Link L0p Enable

Select Enable for Link L0p support. The options are Enable and Disable.

Link L1 Enable

Select Enable for Link L1 support. The options are Enable and Disable.

COD Enable (Available when the OS and the CPU support this feature)

Select Enabled for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Enable, Disable, and Auto.

Early Snoop (Available when the OS and the CPU support this feature)

Select Enabled for Early Snoop support to enhance system performance. The

options are Enable, Disable, and Auto.

Isoc Mode

Select Enabled for Isochronous support to meet QoS (Quality of Service) require-

ments. This feature is especially important for Virtualization Technology. The

options are Enable and Disable.

4-12

Chapter 4: AMI BIOS

Memory Conguration

Enforce POR

Select Enable to enforce POR restrictions on DDR4 frequency and voltage

programming. The options are Enabled and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory

modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,

2200, 2400, 2600, 2667, and Reserved (Do not select Reserved).

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Auto, Disabled and Enabled.

DRAM RAPL (Running Average Power Limit) Baseline

Use this feature to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Set Throttling Mode

Throttling improves reliability and reduces power consumption in the proces-

sor via automatic voltage control during processor idle states. The options are

Disabled and CLTT (Closed Loop Thermal Throttling).

Socket Interleave Below 4GB

Select Enabled for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

A7 Mode

Select Enabled to support the A7 (Addressing) mode to improve memory per-

formance. The options are Enable and Disable.

DIMM Information

This item displays the status of a DIMM module specied by the user.

• P1-DIMMA1 - P1-DIMMD1

• P2-DIMME1 - P2-DIMMH1

4-13

X10DRL-CT/-iT/-C Motherboard User’s Manual

Memory RAS (Reliability_Availability_Serviceability)
Conguration

Use this submenu to congure the following Memory RAS settings.

RAS Mode

When Disable is selected, RAS is not supported. When Mirror is selected, the

motherboard maintains two identical copies of all data in memory for data backup.

When Lockstep is selected, the motherboard uses two areas of memory to run

the same set of operations in parallel to boost performance. The options are

Disable, Mirror, and Lockstep Mode.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve

memory performance. The options are Disabled and Enabled.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected on a memory module and send the correction to the requestor

(the original source). When this item is set to Enabled, the IO hub will read and

write back one cache line every 16K cycles, if there is no delay caused by internal

processing. By using this method, roughly 64 GB of memory behind the IO hub

will be scrubbed every day. The options are Enable and Disable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before

the next complete patrol scrub is performed. Use the keyboard to enter a value

from 0-24. The Default setting is 24.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable

memory errors found on a memory module. When the CPU or I/O issues a

demand-read command, and the read data from memory turns out to be a

correctable error, the error is corrected and sent to the requestor (the original

source). Memory is updated as well. Select Enable to use Demand Scrubbing

for ECC memory correction. The options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable and Enable.

4-14

Chapter 4: AMI BIOS



South Bridge Conguration

The following South Bridge information will display:



USB Conguration

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable

legacy support if there are no legacy USB devices present. Select Disable to have

all USB devices available for EFI applications only. The options are Enabled,

Disabled and Auto.

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Ex-

tensible Host Controller Interface) hand-off. The XHCI ownership change should be

claimed by the XHCI driver. The settings are Enabled and Disabled.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide

complete legacy USB keyboard support for the operating systems that do not sup-

port legacy USB devices. The options are Disabled and Enabled.

USB 3.0 Support

Select Enabled for USB 3.0 support. The options are Smart Auto, Auto, Enabled,

Disabled and Manual.

EHCI1

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #1 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

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X10DRL-CT/-iT/-C Motherboard User’s Manual

EHCI2

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #2 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

XHCI Pre-Boot Driver

Select Enabled to enable XHCI (Extensible Host Controller Interface) support on a

pre-boot drive specied by the user. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS



SATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the Intel PCH chip and displays the fol-

lowing items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH chip. The options are Enabled and Disabled.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

*If the item above "Congure SATA as" is set to AHCI, the following items will display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the

particular SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the

device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

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X10DRL-CT/-iT/-C Motherboard User’s Manual

*If the item above "Congure SATA as" is set to IDE, the following items will
display:

Serial ATA Port 0~ Port 5

This item indicates that a SATA port specied by the user is installed (present)

or not.

Port 0 ~ Port 5 SATA Device Type (Available when a SATA port is

detected)

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to RAID, the following items will
display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

driver for system boot. The options are Disabled, EFI, and Legacy.

SATA/sSATA RAID Boot Selet

This option species which controller the motherboard uses to boot from. The

options are SATA Controller, sSATA Controller and Both.

Serial ATA Port 0~ Port 5

This item displays the information detected on the installed SATA drives on the

particular SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

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Chapter 4: AMI BIOS

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

• General ME Conguration

• Operational Firmware Version

• Recovery Firmware Version

• ME Firmware Features

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

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X10DRL-CT/-iT/-C Motherboard User’s Manual

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

PCI Latency Timer

Use this item to congure the PCI latency timer for a device installed on a PCI bus.

Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are 32,

64, 96, 128, 160, 192, 224 and 248 (PCI Bus Clocks).

PCI-X Latency Timer

Use this item to congure the PCI-X latency timer for a device installed on a PCI -X

bus. Select 32 to set the PCI-X latency timer to 32 PCI-X clock cycles. The options

are 32, 64, 96, 128, 160, 192, 224 and 248 (PCI Bus Clocks).

PCI PERR/SERR Support

Select Enabled to allow a PCI device to generate a PERR number for a PCI Bus

Signal Error Event, and generate an SERR number for a PCI Bus Signal Error

Event. The options are Enabled and Disabled.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G

Address. The options are Enabled and Disabled.

SR-IOV (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled

and Disabled.

Maximum Payload

Select Auto for the system BIOS to automatically set the maximum payload value

for a PCI-E device to enhance system performance. The options are Auto, 128

Bytes, and 256 Bytes.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read

request for a PCI-E device to enhance system performance. The options are Auto,

128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

ASPM Support

Use this item to set the Active State Power Management (ASPM) level for a PCI-E

device. Select Auto for the system BIOS to automatically set the ASPM level based

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Chapter 4: AMI BIOS

on the system conguration. Select Disabled to disable ASPM support. The options

are Disabled, and Auto.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

MMIOHBase

Use this item to select the base memory size according to memory-address map-

ping for the IO hub. The base memory size must be between 4032G to 4078G. The

options are 56T, 48T, 24T, 512G, and 256G.

MMIO High Size

Use this item to select the high memory size according to memory-address mapping

for the IO hub. The options are 256G, 128G, 512G, and 1024G.

CPU2 Slot4 PCI-E 3.0 x8,
CPU1 Slot5 PCI-E x16,

CPU1 Slot6 PCI-E 3.0x8,
Onboard SAS Option ROM

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy

and EFI.

Onboard LAN Option ROM Type

Select Enabled to enable Option ROM support to boot the computer using a device

installed on the slot specied by the user. The options are Legacy and EFI.

Onboard LAN1/LAN2/LAN3/LAN4 Option ROM / Onboard Video Option ROM

Use this option to select the type of device installed in LAN Port1~Port4 or the

onboard video device used for system boot. The default setting for LAN1 Option

ROM is PXE, for LAN2/LAN3/LAN4 Option ROM is Disabled and for Onboard

Video Option ROM is Legacy.

VGA Priority

Use this item to select the graphics device to be used as the primary video display

for system boot. The options are Onboard and Offboard.

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Uni-

ed Extensible Firmware Interface) for network stack support. The options are

Enabled and Disabled.

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X10DRL-CT/-iT/-C Motherboard User’s Manual



Super IO Conguration

Super IO Chip AST2400



Serial Port 1 Conguration / Serial Port 2 Conguration

Serial Port 1 / Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options

are Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of

a serial port specied by the user.

Change Port 1 Settings / Change Port 2 Settings

This feature species the base I/O port address and the Interrupt Request address

of Serial Port 1 or Serial Port 2. Select Auto for the BIOS to automatically assign

the base I/O and IRQ address to a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

The options for Serial Port 2 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redi-

rection. The options are COM and SOL.



Serial Port Console Redirection

COM 1

COM 1 Console Redirection

Select Enabled to enable COM Port 1 Console Redirection, which will allow a client

machine to be connected to a host machine at a remote site for networking. The

options are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for

conguration:

4-22

Chapter 4: AMI BIOS

COM1 Console Redirection Settings

Terminal Type

This feature allows the user to select the target terminal emulation type for Con-

sole Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to

add color and function key support. Select ANSI to use the Extended ASCII Char-

acter Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters

into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this item to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this item to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

the receiving buffer is full. Send a "Start" signal to start sending data when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

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X10DRL-CT/-iT/-C Motherboard User’s Manual

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this item to select the number of rows and columns used in Console Redi-

rection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a

terminal emulator designed for the Windows OS. The options are VT100, LINUX,

XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS

POST. When the option-Bootloader is selected, legacy Console Redirection is

disabled before booting the OS. When the option- Always Enable is selected,

legacy Console Redirection remains enabled upon OS bootup. The options are

Always Enable and Bootloader.

SOL/COM2

Console Redirection

Select Enabled to use the SOL port for Console Redirection. The options are

Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for

user's conguration:

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Chapter 4: AMI BIOS

SOL/COM2 Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client

computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirec-

tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color

and function key support. Select ANSI to use the Extended ASCII Character Set.

Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or

more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

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X10DRL-CT/-iT/-C Motherboard User’s Manual

the receiving buffer is full. Send a "Start" signal to start data-sending when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console

Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a

terminal emulator designed for the Windows OS. The options are VT100, LINUX,

XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS

POST (Power-On Self-Test). When this feature is set to Bootloader, legacy

Console Redirection is disabled before booting the OS. When this feature is set

to Always Enable, legacy Console Redirection remains enabled upon OS boot.

The options are Always Enable and Bootloader.

Legacy Console Redirection Settings

Legacy Serial Redirection Port

Select a COM port to redirect legacy OS and OPROM messages. The options

are COM1 and SOL/COM2.

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Chapter 4: AMI BIOS

Serial Port for Out-of-Band Management/Windows Emergency

Management Services (EMS)

The submenu allows the user to congure Console Redirection settings to sup-

port Out-of-Band Serial Port management.

EMS Console Redirection

Select Enabled to use a COM port selected by the user for EMS Console Redi-

rection. The options are Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for

user's conguration:

EMS Console Redirection Settings

Out-of-Band Management Port

The feature selects a serial port in a client server to be used by the Windows

Emergency Management Services (EMS) to communicate with a remote host

server. The options are COM1 (Console Redirection) and COM2/SOL (Console

Redirection).

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirec-

tion. Select VT100 to use the ASCII character set. Select VT100+ to add color

and function key support. Select ANSI to use the extended ASCII character set.

Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or

more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per Second

This item sets the transmission speed for a serial port used in Console Redirec-

tion. Make sure that the same speed is used in both host computer and the client

computer. A lower transmission speed may be required for long and busy lines.

The options are 9600, 19200, 57600, and 115200 (bits per second).

Flow Control

Use this item to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop data-sending when

the receiving buffer is full. Send a "Start" signal to start data-sending when

the receiving buffer is empty. The options are None, Hardware RTS/CTS, and

Software Xon/Xoff.

The setting for each these features is displayed:

Data Bits, Parity, Stop Bits

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X10DRL-CT/-iT/-C Motherboard User’s Manual



ACPI Settings

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) plat-

form and provide a common infrastructure for the system to handle hardware errors

within the Windows OS environment to reduce system crashes and to enhance

system recover y and health monitoring. The options are Enabled and Disabled.

High Precision Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces

periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in

synchronizing multimedia streams, providing smooth playback and reducing the de-

pendency on other timestamp calculation devices, such as an x86 RDTSC Instruc-

tion embedded in the CPU. The High Performance Event Timer is used to replace

the 8254 Programmable Interval Timer. The options are Enabled and Disabled.

NUMA (Available when the OS supports this feature)

Select Enabled to enable Non-Uniform Memory Access support to enhance system

performance. The options are Enabled and Disabled.

4-28