Supermicro SuperO X10DRC-T4+, SuperO X10DRC-LN4+, SuperO X10DRi-T4+, SuperO X10DRi-LN4+, X10DRC-LN4+ User Manual

USER’S MANUAL

Revision 1.0b

X10DRC-T4+

X10DRC-LN4+

X10DRi-T4+

X10DRi-LN4+

Manual Revision 1.0b
Release Date: Feb. 18, 2015
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of
this document.
Information in this document is subject to change without notice. Other products and companies referred to herein
are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2015 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

The information in this user’s manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

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Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.

Preface

iii

Preface

This manual is written for system integrators, IT Professionals, and

knowledgeable end users. It provides information for the installation and use of the

X10DRC/i-LN4+/-T4+ motherboard.

About This Motherboard

The Super X10DRC/i-LN4+/-T4+ motherboard supports dual Intel E5-2600v3 Series

processors (Socket R3) that offer the new Intel Microarchitecture 22nm Processing

Technology, delivering the most-balanced solution of performance, power efciency,

and features to address the diverse needs of next-generation data centers. With the

PCH C612 built in, the X10DRC/i-LN4+/-T4+ motherboard supports MCTP Protocol,

and Intel® Node Manager 3.0. This motherboard is ideal for visualization, CRM,

storage, and general server platforms. Please refer to our website (http://www.

supermicro.com) for CPU and memory support updates.

Manual Organization

Chapter 1 describes the features, specications and performance of the moth-

erboard. It also provides detailed information about the Intel PCH C612 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules and other hardware components into the

system. If you encounter any problems, see Chapter 3, which describes trouble-

shooting procedures for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to BIOS, and provides detailed information on

running the BIOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists Software Installation Instructions.

Appendix C contains UEFI BIOS Recovery instructions.

Conventions Used in the Manual

Pay special attention to the following symbols for proper system installation:

Warning: Important information given to ensure proper system installation or to prevent

damage to the components or injury to yourself;

Note: Additional information given to differentiate between models or

instructions provided for proper system setup.

iv

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Preface

v

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

vi

Table of Contents

Preface

Chapter 1 Overview

1-1 Overview ......................................................................................................... 1-1

1-2 Processor and Chipset Overview...................................................................1-11

1-3 Special Features ........................................................................................... 1-12

1-4 System Health Monitoring ............................................................................. 1-12

1-5 ACPI Features ............................................................................................... 1-13

1-6 Power Supply ................................................................................................ 1-13

1-7 Advanced Power Management ..................................................................... 1-14

Intel® Intelligent Power Node Manager (NM) (Available when the Supermicro

Power Manager [SPM] is Installed) .............................................................. 1-14

Management Engine (ME) ............................................................................ 1-14

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

2-2 Static-Sensitive Devices .................................................................................. 2-4

2-3 Motherboard Installation .................................................................................. 2-5

Tools Needed .................................................................................................. 2-5

Location of Mounting Holes ............................................................................ 2-5

Installing the Motherboard .............................................................................. 2-6

2-4 Processor and Heatsink Installation................................................................ 2-7

Installing the LGA2011 Processor ................................................................. 2-7

Installing a Passive CPU Heatsink ................................................................2-11

Removing the Heatsink ................................................................................. 2-12

2-5 Installing and Removing the Memory Modules ............................................. 2-13

Installing & Removing DIMMs ....................................................................... 2-13

Removing Memory Modules ......................................................................... 2-13

2-6 Control Panel Connectors and I/O Ports ...................................................... 2-16

Back Panel Connectors and I/O Ports .......................................................... 2-16

Back Panel I/O Port Locations and Denitions ........................................... 2-16

Serial Ports ............................................................................................... 2-17

Video Connection ..................................................................................... 2-17

Universal Serial Bus (USB) ...................................................................... 2-18

GLAN/10G-LAN (TLAN) Ports & IPMI_LAN Port ..................................... 2-19

Unit Identier Switch/UID LED Indicator .................................................. 2-20

Front Control Panel ....................................................................................... 2-21

Front Control Panel Pin Denitions............................................................... 2-22

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

vii

Table of Contents

NMI Button ............................................................................................... 2-22

Power LED .............................................................................................. 2-22

HDD/UID LED .......................................................................................... 2-23

NIC1/NIC2 LED Indicators ....................................................................... 2-23

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-24

Power Fail LED ........................................................................................ 2-24

Reset Button ........................................................................................... 2-25

Power Button ........................................................................................... 2-25

2-7 Connecting Cables ........................................................................................ 2-26

Power Connectors ................................................................................... 2-26

Fan Headers ............................................................................................. 2-27

Chassis Intrusion ..................................................................................... 2-27

Internal Speaker ....................................................................................... 2-28

DOM Power Connectors .......................................................................... 2-28

TPM/Port 80 Header ................................................................................ 2-29

Standby Power Header ............................................................................ 2-29

Power SMB (I2C) Connector .................................................................... 2-30

IPMB ......................................................................................................... 2-30

T-SGPIO1/2 & S-SGPIO1 Headers .......................................................... 2-31

Power LED/Speaker ................................................................................. 2-31

2-8 Jumper Settings ............................................................................................ 2-32

Explanation of Jumpers ................................................................................ 2-32

LAN Enable/Disable ................................................................................. 2-32

CMOS Clear ............................................................................................. 2-33

Watch Dog Enable/Disable ...................................................................... 2-33

VGA Enable .............................................................................................. 2-34

BMC Enable ............................................................................................ 2-34

I2C Bus to PCI-Exp. Slots ........................................................................ 2-35

Manufacturer Mode Select ....................................................................... 2-36

SAS Enable (For X10DRC-LN4+/T4+) ..................................................... 2-36

2-9 LED Indicators ............................................................................................... 2-37

LAN Port LEDs ......................................................................................... 2-37

IPMI Dedicated LAN LEDs ....................................................................... 2-37

Onboard Power LED ............................................................................... 2-38

BMC Heartbeat LED ................................................................................ 2-38

SAS Heartbeat LED (for the X10DRC-LN4+/T4+ only) ........................... 2-39

SAS Activity LED (for the X10DRC-LN4+/T4+ only) ................................ 2-39

SAS Error LED (for the X10DRC-LN4+/T4+ only) ................................... 2-40

viii

2-10 SATA/SAS Connections ................................................................................ 2-41

SATA 3.0 Ports ......................................................................................... 2-41

SAS 3.0 Ports (for the X10DRC-LN4+/T4+) ............................................ 2-42

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

3-2 Technical Support Procedures ........................................................................ 3-5

3-3 Battery Removal and Installation .................................................................... 3-6

3-4 Frequently Asked Questions ........................................................................... 3-7

3-5 Returning Merchandise for Service................................................................. 3-8

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

4-2 Main Setup ...................................................................................................... 4-2

4-3 Advanced Setup Congurations...................................................................... 4-4

4-4 Event Logs .................................................................................................... 4-32

4-5 IPMI ............................................................................................................... 4-34

4-6 Security Settings ........................................................................................... 4-36

4-7 Boot Settings ................................................................................................. 4-37

4-8 Save & Exit ................................................................................................... 4-39

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes .................................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Installing SuperDoctor5 ...................................................................................B-2

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Chapter 1: Overview

1-1

Chapter 1

Overview

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention to

detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.

If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box.

• One (1) Supermicro Mainboard

•Two (2) SATA Cables (CBL-0044L x2) (X10DRC-LN4+/T4+ Only)

•Two (2) SAS Cables (CBL-SAST-0532 x2) (X10DRC-LN4+/T4+ Only)

•Six (6) SATA Cables (CBL-0044L x6) (X10DRi-LN4+/T4+ Only)

• One (1) I/O Shield (MCP-260-00042-0N)

• One (1) Quick Reference Guide (MNL#1560-QRG)

Note 1: For your system to work properly, please follow the links below

to download all necessary drivers/utilities and the user's manual for your

motherboard.

•Supermicro product manuals: http://www.supermicro.com/support/manuals/

•Product Drivers and utilities: ftp://ftp.supermicro.com/

Note 2: For safety considerations, please refer to the complete list of safety

warnings posted on the Supermicro website at http://www.supermicro.com/

about/policies/safety_information.cfm.

If you have any questions, please contact our support team at support@supermicro.

com.

1-2

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

X10DRC/i-LN4+/-T4+ Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

Revision available at the time of publishing of the manual. The motherboard

you've received may or may not look exactly the same as the graphics

shown in this manual.

Chapter 1: Overview

1-3

Motherboard Layout

Note: For the latest CPU/Memory updates, please refer to our website at

http://www.supermicro.com/products/motherboard/ for details.

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

1-4

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Notes:

•See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

•" " indicates the location of "Pin 1".

•Jumpers/LED Indicators not indicated are for testing only.

•LAN1/LAN2/LAN3/LAN4 ports support Gigabit_LAN (GLAN) connections on the

X10DRC/i-LN4+, and 10G (T) LAN connections on the X10DRC/i-T4+.

•The LSI 3108 is available on the X10DRC-LN4+/T4+ only.

•Use only the correct type of onboard CMOS battery as specied by the manufac-

turer. Do not install the onboard battery upside down to avoid possible explosion.

X10DRC/i-LN4+/-T4+ Quick Reference

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

Chapter 1: Overview

1-5

X10DRC/i-LN4+/-T4+ Jumpers

Jumper Description Default Setting

JBT1 Clear CMOS/Reset BIOS Conguration See Chapter 2

JI2C1/JI2C2 SMB to PCI-E Slots Pins 1-2 (Enabled)

JPB1 BMC Enable Pins 1-2 (Enabled)

JPG1 VGA Enable Pins 1-2 (Enabled)

JPLAN1 GLAN1/2 Enable (X10DRC/i-LN4+)

10G(T)_LAN1/2 Enable (X10DRC/i-T4+)

Pins 1-2 (Enabled)

JPLAN2 GLAN3/4 Enable (X10DRC/i-LN4+)

10G(T)_LAN3/4 Enable (X10DRC/i-T4+)

Pins 1-2 (Enabled)

JPME2 Manufacture (ME) Mode Select Pins 1-2 (Normal)

JPS1 SAS Enable Pins 1-2 (Enabled)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)

X10DRC/i-LN4+/-T4+ Connectors

Connectors Description

Battery Onboard CMOS Battery (See Chpt. 3 for Used Battery Disposal)

(JBAT1)

COM1/COM2 Backplane COM Port1/Front Accessible COM2 Header

FAN1-6,
FANA-C

CPU/System Fan Headers

J24 24-pin ATX Main Power Connector (See Warning on Pg. 1-6.)

JD1 Speaker/Power LED

JF1 Front Panel Control Header

JIPMB1 4-pin External BMC I2C Header (for an IPMI Card)

JL1 Chassis Intrusion

JPI2C1 Power Supply SMBbus I2C Header

JPWR1/2 8-Pin Power Connectors

JSD1/JSD2 SATA DOM (Device on Module) Power Connectors

JTPM1 TPM (Trusted Platform Module)/Port 80 Header

JUIDB1 UID (Unit Identication) Button

LAN1/LAN2 Gigabit LAN(GLAN) Ethernet Ports 1/2 (X10DRC/i-LN4+)

10G(T) LAN Ethernet Ports 1/2 (X10DRC/i-T4+)

LAN3/LAN4 Gigabit LAN (GLAN) Ethernet Ports 3/4 (X10DRC/i-LN4+)

10G(T) LAN Ethernet Ports 3/4 (X10DRC/i-T4+)

(IPMI) LAN IPMI_Dedicated LAN support by the ASpeed controller

(I-)SATA 0-5 SATA 3.0 Connectors supported by Intel PCH (I-SATA 0-5)

(S-)SATA 0-3 SATA 3.0 Connectors supported by Intel SCU (S-SATA 0-3)

SAS0-3, 4-7
(3.0)

SAS 3.0 Connections supported by the LSI 3108 controller
(JS39) (for the X10DRC-LN4+/T4+ only)

1-6

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Note: Available on the X10DRC-LN4+/T4+ only.

Warning: To avoid damaging the power supply or the motherboard, be sure to use

a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to

connect the power supply to the 24-pin power connector (J24), and two 8-pin power

connectors (JPWR1, JPWR2) on the motherboard. Failure in doing so may void the

manufacturer warranty on your power supply and motherboard.

(CPU2) Slot1 PCI-Express 3.0 x8 Slot from CPU2

(CPU2) Slot2 PCI-Express 3.0 x8 Slot from CPU2

(CPU1) Slot3 PCI-Express 3.0 x16 Slot from CPU1

(CPU2) Slot4 PCI-Express 2.0 x4 in x8 Slot from CPU2

(CPU2) Slot5 PCI-Express 3.0 x16 Slot from CPU2

(CPU2) Slot6 PCI-Express 3.0 x8 Slot from CPU2

S-SGPIO1,
T-SGPIO1/2

Serial_Link General Purpose I/O Headers 1/2/3 (for SATA ports),
(T-SGPIO1 for I-SATA0-3, T-SGPIO2 for I-SATA4/5, S-SGPIO1
for S-SATA0-3)

SP1 Internal Speaker/Buzzer

JSTBY1 +5V Standby Power Header

(BP) USB 0/1
(2.0)

Backpanel USB 2.0 Ports 0/1

(BP) USB 4/5
(3.0)

Backpanel USB 3.0 Ports 4/5

(FP) USB 7/8
(3.0)

Front Accessible USB 3.0 Connection Header 7/8

(FP) USB 2/3
(2.0)

Front Accessible USB 2.0 Connection Header 2/3

(FP) USB 6
(3.0)

Front Accessible USB 3.0 Connection Header 6

VGA Backpanel VGA Port

X10DRC/i-LN4+/-T4+ LED Indicators

LED Description State Status

DS13 (Note below) SAS Heartbeat LED Green: Blinking SAS Normal

LE1 Rear UID LED Blue: On Unit Identied

LE2 Onboard Power LED Green: On System PWR On

LEDM1 BMC Heartbeat LED Green: Blinking BMC Normal

LEDS5 (Note below) SAS Activity LED Green: Blinking SAS Active

LEDS6 (Note below) SAS Error LED Red: On SAS Error(s)

Chapter 1: Overview

1-7

Motherboard Features

CPU

• Dual Intel

®

E5-2600v3 Series Processors (Socket

R3-LGA 2011); each processor supports dual full-

width Intel QuickPath Interconnect (QPI) links (of up

to 9.6 GT/s one direction per QPI)

Note: Both CPU’s need to be installed for full

access the PCI-E slots and on-board con-

trollers. See the attached block diagram to

determine which PCI-E slots or devices may

be impacted.

Memory

• Integrated memory controller supports: up to 1536

GB of Load Reduced (LRDIMM) or up to 768 GB of

Registered (RDIMM) DDR4 (288-pin) ECC modules

2133/1866/1600 MHz in 24 slots

Note: Memory speed support is pending on

the CPUs used in the motherboard. For the

latest CPU/memory updates, please refer to

our website at http://www.supermicro.com/

products/motherboard.

DIMM sizes

• DIMM Up to 64 GB (per DIMM) @ 1.2V

Chipset

• Intel® PCH C612

Expansion

• Three (3) PCI Express 3.0 x8 slots (CPU2 Slot1/

Slot2/Slot6)

• Two (2) PCI-Express 3.0 x16 slots (CPU1 Slot3/

CPU2 Slot5)

• One (1) PCI-Express 2.0 x4 in x8 slot (CPU2 Slot4)

Slots

Graphics

• Graphics Controller via ASpeed AST 2400 BMC

Network

• Dual Intel i350 1GBASE-T (10/100/1000 Mb/s) Ether-

net controllers for GLAN1-GLAN4 ports (X10DRC/i-

LN4+), or

• Dual Intel X540 10GBASE-T (100/1000/10000

Mb/s) Ethernet controllers for TLAN1-TLAN4 ports

(X10DRC/i-T4+)

• ASpeed 2400 Baseboard Controller (BMC) supports

IPMI_LAN 2.0

1-8

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

I/O Devices

SATA Connections

• SATA 3.0 Six (6) SATA 3.0 Ports support-

ed by Intel PCH (I-SATA 0-5),

Four (4) SATA 3.0 Ports support-

ed by Intel SCU (S-SATA 0-3)

• RAID 0, 1, 10 (from Intel PCH)

SAS Connections (for the X10DRC-LN4+/T4+)

• SAS 3.0 Eight (8) SAS Connections 0-3,

4-7 from the LSI 3108 controller

• RAID 0, 1, 5, 6, 10, 50, and 60 (from

the LSI SAS controller with

optional SuperCAP for battery

backup. See Note 1 next page.)

IPMI 2.0

• IPMI 2.0 supported by ASpeed AST 2400

Serial (COM) Port

• One (1) Fast UART 16550 Port

• One (1) Header

Peripheral
Devices

USB Devices

• Two (2) USB 2.0 ports (USB 0/1) and two (2) USB

3.0 ports (USB 4/5) on the I/O backpanel

• One (1) internal USB 2.0 header for two (2) USB

connections for front panel support (USB 2/3)

• One (1) internal USB 3.0 header for two (2) USB

connections for front panel support (USB 7/8)

• One (1) USB 3.0 Type A connector (USB 6)

BIOS

• 16 MB SPI AMI BIOS

®

SM Flash UEFI BIOS

• APCI 2.3, ACPI 2.0/3.0/4.0, USB Keyboard, Plug &

Play (PnP) and SMBIOS 2.3

Power

• ACPI Power Management

Management

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel

®

Intelligent Power Node Manager 3.0 (Avail-

able when the Supermicro Power Manager (SPM)

is installed and special power supply used. See

Page 1-14.)

• Management Engine (ME)

Chapter 1: Overview

1-9

CPU

CPU Monitoring

Monitoring

• Onboard voltage monitoring for +3.3V, 3.3V Standby,

+5V, +5V Standby, +12V, CPU core, memory, chipset,

BMC, and battery voltages

• CPU/System overheat LED and control

• CPU Thermal Trip support

• Status Monitor for Speed Control

• Status Monitor for On/Off Control

• CPU Thermal Design Power (TDP): support up to

145W (See Note 2 below)

Fan Control

• Fan status monitoring via IPMI connections

• Dual Cooling Zone

• Low noise fan speed control

• Pulse Width Modulation (PWM) fan contorl

System
Management

• PECI (Platform Environment Conguration Interface)

2.0 support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor 5

• SuperDoctor® 5, Watch Dog, NMI

• Chassis Intrusion Header and Detection

Dimensions

• 13.68" (L) x 13.05" (W) (347.47 mm x 331.47 mm)

Note 1: For SAS is supported by the onboard LSI3108 controller, and is

available on the X10DRC-LN4+/T4+ only)

Note 2: CPU Maximum Thermal Design Power (TDP) is subject to chassis

and heatsink cooling restrictions. For proper thermal management, please

check the chassis and heatsink specications for proper CPU TDP sizing.

Note 3: For IPMI Conguration Instructions, please refer to the Embedded

IPMI Conguration User's Guide available @ http://www.supermicro.com/

support/manuals/.

1-10

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

System Block Diagram

Note 1: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features pages

for the actual specications of each motherboard.

Note 2: Both CPU’s need to be installed for full access the PCI-E slots and

on-board controllers. See the attached block diagram to determine which

PCI-E slots or devices may be impacted.

P0P0P1

P1

D

D

E

E

E

F

F

F

G

G

G

H

H

H

PCI-E x16 SLOT 3

PCI-E

SATA #1

SATA #2

DDR4 DIMM

SATA #3

SATA #4

SATA #5

SATA #6

USB 3.0

SATA

DDR4 DIMM

#3

#2

#1

DDR4 DIMM

G

A

LPC

USB 3.0

LAN

I350/

X540/

SAGEVILL

ABD

BC

PROCESSOR1

A

C

PROCESSOR2

A

B

C

QPI

#1

DDR4 DIMM

#2

#3

DDR4 DIMM

PCI-E x8 SLOT 4

DDR4 DIMM

x16

LSI

3108

x8

x8 (0-7)

TPM HDR

PCH 612

QPI

x16

DMI

VGA BMC

VGA
CONN

AST2400

DDR 3

DDR4 DIMM

PHY1

LAN

RTL8211

B

PCI-E x8 SLOT 6

PCI-E x16 SLOT 5

DDR4 DIMM

PCI-E x8 SLOT 2

PCI-E X1 G2

D

C

H

F

E

#1

#2

#3

#1

#2

#3

#1

#2

#3

#1

#2

#3

#1

#2

#3

#1

#2

#3

SYSTEM

BIOS

SPI

SPI

COM

SATA #7

SATA #8

SATA #9

SATA #10

BMC BOOT FLASH

1

2

3

4

5

USB

LAN

x8 (8-15)

9.6G

6GB/s

x8

x16

x16

PCI-E x8 SLOT 1

x8

x8

x8

SPI

USB2.0

USB2.0

I350/

X540/

SAGEVILL

Gen2 x4

x16

Gen2 x4

USB 2.0

1

2

3

4

5

6

USB

USB 2.0

9

8

7

x8

x16

(7-0)

(15-8)

(15-0)

RJ45 RJ45

RJ45

RJ45

PE2 PE3

PE1

DM1

PE2

PE3 PE1

DM1

Chapter 1: Overview

1-11

1-2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel E5-2600v3 Series Proces-

sors (Socket R3) and the Intel C612 PCH, the X10DRC/i-LN4+/-T4+ motherboard

provides the b est b alanced soluti on of p erformance, powe r ef cienc y, and features

to address the diverse needs of next-generation data server platforms.

With support of new Intel Microarchitecture 22nm Process Technology, the
X10DRC/i-LN4+/-T4+ dramatically increases system performance for a multitude

of server applications.

The PCH C612 chip provides Enterprise SMbus and MCTP support, including the

following features:

•DDR4 288-pin memory support on Socket R3

•Support for MCTP Protocol and ME

•Support of SMBus speeds of up to 1 MHz for BMC connectivity

•Improved I/O capabilities to high-storage-capacity congurations

•SPI Enhancements

•Intel® Node Manager 3.0 support (See Note below.)

•BMC supports remote management, virtualization, and the security package

for enterprise platforms

Note: Node Manager 3.0 support is dependent on the power supply used

in the system.

1-12

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

1-3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will

respond when AC power is lost and then restored to the system. You can choose for

the system to remain powered off (in which case you must press the power switch

to turn it back on), or for it to automatically return to the power-on state. See the

Advanced BIOS Setup section for this setting. The default setting is Last State.

1-4 System Health Monitoring

This section describes the features of system health monitoring of the motherboard.

This motherboard has an onboard BaseBoard Management Controller (BMC) that

supports system health monitoring. An onboard voltage monitor will scan the follow-

ing onboard voltages continuously: +3.3V, 3.3V Standby, +5V, +5V Standby, +12V,

CPU core, memory, chipset, BMC, and battery voltages. Once a voltage becomes

unstable, a warning is given, or an error message is sent to the screen. The user

can adjust the voltage thresholds inside the BMC Web GUI to dene the sensitivity

of the voltage monitor.

Fan Status Monitor with Firmware Control

System health monitoring support provided by the BMC controller can check the

RPM status of a cooling fan. The onboard CPU and chassis fans are controlled by

IPMI Thermal Management.

Environmental Temperature Control

System health sensors monitor temperatures and voltage settings of onboard

processors and the system in real time via the IPMI interface. Whenever the tem-

perature of the CPU or the system exceeds a user-dened threshold, system/CPU

cooling fans will be turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5. SuperDoctor 5 is used

to notify the user of certain system events. For example, you can congure

SuperDoctor 5 to provide you with warnings when the system temperature, CPU

temperatures, voltages, and fan speeds go beyond a predened range.

Chapter 1: Overview

1-13

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-

tion denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a system, including its

hardware, operating system and application software. This enables the system to

automatically turn on and off peripherals such as CD-ROMs, network cards, hard

disk drives and printers.

In addition to operating system-directed power management, ACPI also provides

a generic system event mechanism for Plug and Play, and an operating system-

independent interface for conguration control. ACPI leverages the Plug and Play

BIOS data structures, while providing a processor architecture-independent imple-

mentation that is compatible with Windows 8/R2, and Windows 2012/R2 Operating

Systems.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

The X10DRC/i-LN4+/-T4+ motherboard accommodates 24-pin ATX power sup-

plies. Although most power supplies generally meet the specications required by

the CPU, some are inadequate. In addition, two 8-pin power connections are also

required to ensure adequate power supply to the system.

Warning! To avoid damaging the power supply or the motherboard, be sure to use

a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to

connect the power supply to the 24-pin power connector (J24), and two 8-pin power

connectors (JPWR1, JPWR2) on the motherboard. Failure in doing so may void the

manufacturer warranty on your power supply and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX

power supply Specication 2.02 or above. It must also be SSI compliant. (For more

information, please refer to the website at http://www.ssiforum.org/). Additionally, in

areas where noisy power transmission is present, you may choose to install a line

lter to shield the computer from noise. It is recommended that you also install a

power surge protector to help avoid problems caused by power surges.

1-14

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

1-7 Advanced Power Management

The following new advanced power management features are supported by this

motherboard:

Intel® Intelligent Power Node Manager (NM) (Available
when the Supermicro Power Manager [SPM] is Installed)

The Intel® Intelligent Power Node Manager 3.0 (IPNM) provides your system with

real-time thermal control and power management for maximum energy efciency.

Although IPNM Specication Version 2.0/3.0 is supported by the BMC (Baseboard

Management Controller), your system must also have IPNM-compatible Manage-

ment Engine (ME) rmware installed to use this feature.

Note: IPNM 2.0/3.0 support is dependent on the power supply used in

the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the PCH, pro-

vides Server Platform Services (SPS) to your system. The services provided by

SPS are different from those provided by the ME on client platforms.

Chapter 2: Installation

2-1

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user

of situations which have the potential for bodily injury. Should you have questions or

experience difculty, contact Supermicro's Technical Support department for assis-

tance. Only certied technicians should attempt to install or congure components.

Read this section in its entirety before installing or conguring components in the

Supermicro chassis.

Battery Handling

Warnung

Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.

Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the

battery only with the same or equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメー
カーが推奨する型、または同等のものを使用下さい。 使用済電池は製造元の指示に従
って処分して下さい。

警告

电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更

换原有电池。请按制造商的说明处理废旧电池。

警告

電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有

電池。請按照製造商的說明指示處理廢棄舊電池。

2-2

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Attention

Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.

Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!

Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-

dado por el fabricante. Desechar las baterías gastadas según las instrucciones

del fabricante.

!הרהזא

תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי

גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.

תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל









경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing

Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-

bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften

afgevoerd te worden.

Chapter 2: Installation

2-3

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws

and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
ありま す。

警告
本产品的废弃处理应根据所有国家的法律和规章进行。

警告
本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung

Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.

¡Advertencia!

Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.

Attention

La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de

l'organisme compétent.

רצומה קוליס

!הרהזא

ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח

2-4

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

2-2 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your system board, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

•Use a grounded wrist strap designed to prevent static discharge.

•Touch a grounded metal object before removing the board from the antistatic

bag.

•Handle the motherboard by its edges only; do not touch its components, periph-

eral chips, memory modules or gold contacts.

•When handling chips or modules, avoid touching their pins.

•Put the motherboard and peripherals back into their antistatic bags when not

in use.

•For grounding purposes, make sure that your system chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage.

When unpacking the motherboard, make sure that the person handling it is static

protected.

Waarschuwing

De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

 

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Chapter 2: Installation

2-5

IPMI CODE

SAS CODE

SAN MAC

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRC/i-LN4+(-T4+)

Rev. 1.01

2-3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Although a chassis may have both plastic and metal mounting fas-

teners, metal ones are highly recommended because they ground the motherboard

to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

•Phillips Screwdriver

•Pan head screws (11 pieces)

•Standoffs (11 pieces, if needed)

Location of Mounting Holes

There are eleven (11) mounting holes on this motherboard indicated by the arrows.

Caution: 1) To avoid damaging the motherboard and its components, please do

not use a force greater than 8 lb/inch on each mounting screw during motherboard

installation. 2) Some components are very close to the mounting holes. Please take

precautionary measures to prevent damage to these components when installing the

motherboard to the chassis.

2-6

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Installing the Motherboard

Note: Always connect the power cord last, and always remove it before

adding, removing or changing any hardware components.

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother-

board components.

6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo-

nents might look different from those shown in this manual.

Chapter 2: Installation

2-7

OPEN 1st

WARNING!

2-4 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on

the label area. Also, improper CPU installation or socket/pin misalignment can cause

serious damage to the CPU or the motherboard that will require RMA repairs. Be sure

to read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

•Always connect the power cord last, and always remove it before adding, re-

moving or changing any hardware components. Make sure that you install the

processor into the CPU socket before you install the CPU heatsink.

•If you buy a CPU separately, make sure that you use an Intel-certied multi-

directional heatsink only.

•Make sure to install the motherboard into the chassis before you install the

CPU heatsink.

•When receiving a motherboard without a processor pre-installed, make sure that

the plastic CPU socket cap is in place and none of the socket pins are bent;

otherwise, contact your retailer immediately.

•Refer to the Supermicro website for updates on CPU support.

Press down on

the

Load Lever

labeled 'Open 1st'.

Installing the LGA2011 Processor

1. There are two load levers on the LGA2011 socket. To open the socket cover,

rst press and release the load lever labeled 'Open 1st'.

OPEN 1st

WARNING!

1 2

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-8

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Gently push the
lever down to pop
the load plate open.

2. Press the second load lever labeled 'Close 1st' to release the load plate that

covers the CPU socket from its locking position.

3. With the lever labelled 'Close 1st' fully retracted, gently push down on the

lever labelled 'Open 1st' to open the load plate. Lift the load plate to open it

completely.

OPEN 1st

WARNING!

OPEN 1st

WARNING!

1

2

Press down on the

Load

Lever

labeled

'Close 1st'

WARNING!

OPEN 1st

WARNING!

1

Pull the lever away
from the socket

2

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

Chapter 2: Installation

2-9

4. Use your thumb and the index nger to loosen the lever and open the load

plate.

5. Using your thumb and index nger, hold the CPU on its edges. Align the CPU

keys, which are semi-circle cutouts, against the socket keys.

6. Once they are aligned, carefully lower the CPU straight down into the socket.

(Do not drop the CPU on the socket. Do not move the CPU horizontally or

vertically. Do not rub the CPU against the surface or against any pins of the

socket to avoid damaging the CPU or the socket.)

Socket Keys

CPU Keys

Warning: You can only install the CPU

inside the socket in one direction. Make

sure that it is properly inserted into the

CPU socket before closing the load

plate. If it doesn't close properly, do not

force it as it may damage your CPU.

Instead, open the load plate again to

make sure that the CPU is aligned

properly.

WARNING!

2-10

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

7. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

OPEN 1st

OPEN 1st

OPEN 1st

Lever Lock

Lever Lock

Push down and

lock the lever

labeled 'Open

1st'.

Push down and lock the

lever labeled 'Close 1st'.

Gently close

the load plate.

1 2

3

4

8. Close the load plate with the CPU inside the socket. Lock the lever labelled

'Close 1st' rst, then lock the lever labelled 'Open 1st' second. Using your

thumb gently push the load levers down to the lever locks.

Chapter 2: Installation

2-11

OPEN 1st

Motherboard

Screw#1

Screw#2

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the Motherboard and the Heatsink Bracket underneath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug

(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Mounting Holes

Direction of Airow

Note: For optimized airow, please follow your chassis airow direction to

properly install the heatsink. Graphics and drawings included in this manual

are for reference only. They might look different from the components

installed in your system.

2-12

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the heatsink, please follow the instructions below to uninstall

the heatsink to avoid damaging the CPU or the CPU socket.

1. Unscrew the heatsink screws from the motherboard in the sequence as

shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive

force when wriggling the heatsink!)

3. Once the heatsink is loosened from the socket, remove the heatsink from the

CPU socket.

4. Remove the used thermal grease and clean the surface of the CPU and the

heatsink, Reapply the proper amount of thermal grease on the surface before

reinstalling the CPU and the heatsink.

Loosen the
screws in the
sequence as
shown.

Screw#2

Motherboard

Screw#1

Screw#3

Screw#4

Note: For optimized airow, please follow your chassis airow direction to

properly install the heatsink. Graphics and drawings included in this manual

are for reference only. They might look different from the components

installed in your system.

Direction of Airow

Chapter 2: Installation

2-13

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Release Tabs

Notches

2-5 Installing and Removing the Memory Modules

Note: Check Supermicro's website for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage.

Installing & Removing DIMMs

1. Insert the desired number of DIMMs into the memory slots, starting with

P1-DIMM A1. (For best performance, please use the memory modules of the

same type and speed in the same bank.)

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

Removing Memory Modules

Press both notches on the ends of the DIMM module to unlock it. Once the DIMM

module is loosened, remove it from the memory slot.

3. Align the key of the DIMM module with the receptive point on the memory

slot.

4. Align the notches on both ends of the module against the receptive points on

the ends of the slot.

5. Use two thumbs together to press the notches on both ends of the module

straight down into the slot until the module snaps into place.

6. Press the release tabs to the locking positions to secure the DIMM module

into the slot.

Press both notches straight

down into the memory slot at

the same time.

2-14

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Memory Support for the X10DRC/i-LN4+/-T4+ Motherboard

The X10DRC/i-LN4+/-T4+ motherboard supports up to 1536 GB of Load Reduced

(LRDIMM) or up to 768 GB of Registered (RDIMM) DDR4 (288-pin) ECC modules

2133/1866/1600 MHz in 24 slots. Memory speed support is pending on the CPUs

installed in your system. For the latest memory updates, please refer to our website

a at http://www.supermicro.com/products/motherboard.

Processor & Memory Module Population Conguration

For memory to work properly, follow the tables below for memory installation.

Processors and their Corresponding Memory Modules

CPU# Corresponding DIMM Modules

CPU1 P1-DIMMA1~P1-DIMMD3

P1-DIMM- A1 B1 C1 D1 A2 B2 C2 D2 A3 B3 C3 D3

CPU2 P2-DIMME1~P1-DIMMH3

P2-DIMM- E1 F1 G1 H1 E2 F2 G2 H2 E3 F3 G3 H3

Processor and Memory Module Population for Optimal Performance

Number of

CPUs+DIMMs

CPU and Memory Population Conguration Table

(For memory to work properly, please follow the instructions below.)

1 CPU &
2 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1

1 CPU &
4 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1, P1-DIMMC1/P1-DIMMD1

1 CPU &

5~8 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1, P1-DIMMC1/P1-DIMMD1 + Any memory pairs in P1­DIMMA2/P1-DIMMB2/P1-DIMMC2/P1-DIMMD2 slots

2 CPUs &

4 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1, P2-DIMME1/P2-DIMMF1

2 CPUs &

6 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1

2 CPUs &

8 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2­DIMMG1/P2-DIMMH1

2 CPUs &

9~16 DIMMs

CPU1/CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2­DIMMG1/P2-DIMMH1 + Any memory pairs in P1, P2 DIMM slots

2 CPUs &
16 DIMMs

CPU1/CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2-DIM­MG1/P2-DIMMH1,P1-DIMMA2/P1-DIMMB2/P1-DIMMC2/P1-DIMMD2, P2-DIMME2/
P2-DIMMF2/P2-DIMMG2/P2-DIMMH2

2 CPUs &

16~24 DIMMs

CPU1/CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2-DIM­MG1/P2-DIMMH1, P1-DIMMA2/P1-DIMMB2/P1-DIMMC2/P1-DIMMD2, P2-DIMME2/
P2-DIMMF2/P2-DIMMG2/P2-DIMMH2, P1-DIMMA3/P1-DIMMB3/P1-DIMMC3/P1­DIMMD3, P2-DIMME3/P2-DIMMF3/P2-DIMMG3/P2-DIMMH3

Chapter 2: Installation

2-15

Populating DDR4 RDIMM/LRDIMM Memory Modules

2-16

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

2-6 Control Panel Connectors and I/O Ports

The I/O ports are color coded in conformance with the industry standards. See

the picture below for the colors and locations of the various I/O ports.

Back Panel Connectors and I/O Ports

Back Panel I/O Port Locations and Denitions

1. COM Port 1 (Turquoise)

2. Back Panel USB Port 0 (2.0)

3. Back Panel USB Port 1 (2.0)

4. IPMI_Dedicated LAN

5. Back Panel USB Port 4 (3.0)

6. Back Panel USB Port 5 (3.0)

7. GLAN 1 (X10DRC/i-LN4+), 10G­LAN (TLAN) 1 (X10DRC/i-T4+)

8. GLAN 2 (X10DRC/i-LN4+), 10G­LAN (TLAN) 2 (X10DRC/i-T4+)

9. GLAN 3 (X10DRC/i-LN4+), 10G­LAN (TLAN) 3 (X10DRC/i-T4+)

10. GLAN 4 (X10DRC/i-LN4+), 10G­LAN (TLAN) 4 (X10DRC/i-T4+)

11. Back Panel VGA (Blue)

12. UID Button/UID LED (LE1)

123

4

5

6

7

8

9

11

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Video Connection

A Video (VGA) port is located next to

LAN Ports 3/4 on the I/O backplane.

Refer to the board layout below for

the location.

1. COM1

2. COM2

3. VGA

Serial Ports

Two COM connections (COM1 &

COM2) are located on the mother-

board. COM1 is located on the Back-

plane I/O panel. COM2, located next

to CPU2 PCI-E Slot1, provides front

access support. See the table on the

right for pin denitions.

Serial COM) Ports

Pin Denitions

Pin # Denition Pin # Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

COM1

COM2

COM1

COM2

2

1

2

1

3

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1. Backpanel USB0 (USB 2.0)

2. Backpanel USB1 (USB 2.0)

3. Backpanel USB4 (USB 3.0)

4. Backpanel USB5 (USB 3.0)

5. FP USB 7/8 (USB3.0)

6. FP USB 2/3 (USB2.0)

7. FP USB 6 (USB 3.0)

Universal Serial Bus (USB)

Two USB 2.0 ports (USB 0/1) and two

USB 3.0 ports (USB 4/5), located on

the I/O backpanel, provide backpanel

USB support. In addition, two USB 3.0

headers, located on the motherboard,

provide three front accessible USB

3.0 connections (USB 7/8, USB6).

A USB 2.0 header is also located

on the motherboard to provide two

USB 2.0 connections (USB 2/3) for

front access support. (Cables are not

included). See the tables on the right

for pin denitions.

234

5

6

7

Back Panel USB (2.0) 0/1, 2/3

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 5 +5V

2 USB_PN1 6 USB_PN0

3 USB_PP1 7 USB_PP0

4 Ground 8 Ground

USB (3.0) USB 4/5, 7/8, 6

Pin Denitions

Pin# Description

1 VBUS

2 SSRX-

3 SSRX+

4 Ground

5 SSTX-

6 SSTX+

7 GND_DRAIN

8 D-

9 D+

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1. GLAN1 (for -LN4+),10-GLAN1 (for -T4+)

2. GLAN2 (for -LN4+), 10-GLAN2 (for -T4+)

3. GLAN3 (for -LN4+),10-GLAN3 (for -T4+)

4. GLAN4 (for -LN4+),10-GLAN4 (for -T4+)

5. IPMI_LAN

GLAN/10G-LAN (TLAN) Ports & IPMI_LAN Port

Four Ethernet ports (LAN1/2, LAN3/4) are located on the I/O backplane on the

motherboard. These Ethernet ports support Gigabit LANs on the X10DRC/i-LN4+

and support 10G-LANs on the X10DRC/i-T4+. In addition, an IPMI_LAN, located

above USB 0/1 ports, can be used for IPMI SOL (Serial-over LAN) support. All

these ports accept RJ45 type cables. Please refer to the LED Indicator Section for

LAN LED information.

GLAN/TLAN Ports

Pin Denition

Pin# Denition Pin# Denition

A1 TDR1+ A10 TDR4+

A3 TRCT1 A12 TRCT4

A2 TDR1- A 11 TDR4-

A4 TDR2+- A13 IET+

A6 TRCT2 A14 IET-

A5 TDR2-- A15 YEL+

A7 TDR3+ A16 YEL-

A9 TRCT3 A17 ORG-/GRE+

A8 TDR3- A18 ORG+/GRE-

123

4

5

IPMI LAN Port

Pin Denition

Pin# Denition Pin# Denition

11 TX1- 20 YEL+

10 TX1+ 19 YEL-

13 TX2- 22 ORG-/GRN+

12 TX2+- 21 ORG+/GRN-

15 TX3- 23 SGND

14 TX3+ 24 SGND

17 TX4- 25 SGND

16 TX4+ 26 SGND

9 VCC

18 GND

2-20

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

1. UID Button

2. Rear UID LED

3. Front UID LED

4. Front UID Switch

3

1

2

Unit Identier Switch/UID LED Indicator

A rear Unit Identier (UID) switch and a rear

UID LED is located on the IO back panel.

The front UID is located on pin 13 on the

Front Panel Control (JF1), and the front

UID LED is located on pin 7 on JF1. When

you press the front or rear UID switch, both

front and rear UID LEDs will be turned on.

Press the UID switch again to turn off the

LED indicators. The UID Indicators provide

easy identication of a system unit that may

be in need of service.

Note: UID can also be triggered via

IPMI on the motherboard. For more

information on IPMI, please refer to

the IPMI User's Guide posted on

our website @http://www.super-

micro.com.

UID Switch

Pin# Denition

1 Ground

2 Ground

3+4 Button In

UID LED

Status

Color/State Status

Blue: On Unit Identied

4

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Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo-

cated on a control panel at the front of the chassis. These connectors are designed

specically for use with Supermicro's server chassis. See the gure below for the

descriptions of the various control panel buttons and LED indicators. Refer to the

following section for descriptions and pin denitions.

JF1 Header Pins

Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

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Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

Front Control Panel Pin Denitions

A. NMI

B. PWR LED

A

B

Chapter 2: Installation

2-23

Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

B

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control-

ler) LED connection for LAN port 1 is

located on pins 11 and 12 of JF1, and

the LED connection for LAN Port 2 is

on pins 9 and 10. Attach the NIC LED

cables here to display network activity.

Refer to the table on the right for pin

denitions.

HDD/UID LED

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach a

cable to pin 14 to show HDD activity

status. Attach a cable to pin 13 to use

UID switch. See the table on the right

for pin denitions.

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 UID Switch

14 HD Active

C

A. HDD/UUID Switch

B. NIC1 LED

C. NIC2 LED

A

GLAN1/2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

10 NIC 2 Link LED

11 NIC 1 Activity LED

12 NIC 1 Link LED

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

denitions.

A. OH/Fail/PWR Fail LED

B. PWR Supply Fail

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

B

A

Overheat (OH)/Fan Fail/PWR Fail/
UID LED

Connect an LED cable to pins 7 and

8 of the front control panel to use the

Overheat/Fan Fail/Power Fail and

UID LED connections. The red LED

on pin 8 provides warnings of over-

heat, fan failure or power failure. The

blue LED on pin 7 works as the front

panel UID LED indicator. Refer to the

table on the right for pin denitions.

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Denitions (JF1)

Pin# Denition

7 Blue_UID LED

8 OH/Fan Fail/Power Fail

OH/Fan Fail/PWR Fail

LED Status (Red LED)

State Denition

Off Normal

On Overheat

Flashing Fan Fail

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2-25

Power Button

OH/Fan Fail/
PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

Power Button

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. To turn off the power when

the system is on, press the button for 4

seconds or longer. Refer to the table on

the right for pin denitions.

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case. Refer to the table on the right for

pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

A. Reset Button

B. PWR Button

A

B

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

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T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

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SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

Warning: To provide adequate power supply

to the motherboard, be sure to connect the

24-pin ATX PWR (J24) and the two 8-pin

power connectors (JPWR1, JPWR2) to the

power supply. Failure to do so may void the

manufacturer warranty on your power supply

and motherboard.

2-7 Connecting Cables

Power Connectors

A 24-pin main power supply connector

(J24), and two 8-pin CPU power connec-

tors (JPWR1/JPWR2) are located on the

motherboard. These power connectors

meet the SSI EPS 12V specication and

must be connected to your power supply

to provide adequate power to the system.

See the tables on the right for pin deni-

tions.

A. J24: 24-pin ATX PWR

(Req'd)

B. JPWR1: 8-pin Processor

PWR (Req'd)

C. JPWR2: 8-pin Processor

PWR (Req'd)

A

B

C

ATX Power 24-pin Connector

Pin Denitions (JPW1)

Pin# Denition Pin # Denition

13 +3.3V 1 +3.3V

14 -12V (NC) 2 +3.3V

15 COM 3 COM

16 PS_ON 4 +5V

17 COM 5 COM

18 COM 6 +5V

19 COM 7 COM

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 COM 12 +3.3V

(Required)

12V 8-pin Power Connec-

tor Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

Chapter 2: Installation

2-27

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

Chassis Intrusion

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach an

appropriate cable from the chassis to

inform you of a chassis intrusion when

the chassis is opened.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

C

A. Fan 1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. Fan A

H. Fan B

I. Fan C

J. Chassis Intrusion

D

E

F

Fan Headers

This motherboard has nine system/CPU

fan headers (Fan 1-Fan 6, Fan A-Fan

C) on the motherboard. All these 4-pin

fans headers are backward compatible

with the traditional 3-pin fans. However,

fan speed control is available for 4-pin

fans only. The fan speeds are controlled

by Thermal Management via IPMI 2.0

interface. See the table on the right for

pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground

2 +12V

3 Tachometer

4 PWR Modulation

A

B

H

G

I

J

2-28

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1
JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

B

A

A. Internal Speaker (Buzzer)

B. SATA DOM PWR (JSCD1)

C. SATA DOM PWR (JSCD2)

Internal Speaker

The Internal Speaker (SP1) can be

used to provide audible indications for

various beep codes. See the table on

the right for pin denitions.

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm

Speaker

DOM Power Connectors

Two power connectors for SATA

DOM (Disk_On_Module) devices

are located at JSD1/JSD2. Connect

appropriate cables here to provide

power support for your Serial-Link

DOM devices.

DOM PWR

Pin Denitions

Pin# Denition

1 +5V

2 Ground

3 Ground

C

Chapter 2: Installation

2-29

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A

B

A. TPM/Port 80 Header

B. Standby PWR

TPM/Port 80 Header

A Trusted Platform Module/Port 80

header is located at JTPM1 to provide

TPM support and Port 80 connection.

Use this header to enhance system

performance and data security. See

the table on the right for pin deni-

tions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 +5V (X)

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

11 LAD0 12 GND

13 SMB_CLK4 14 SMB_DAT4

15 +3V_DUAL 16 SERIRQ

17 GND 18 CLKRUN# (X)

19 LPCPD# 20 LDRQ# (X)

Standby Power Header

The +5V Standby Power header is

located at JSTBY1 on the mother-

board. See the table on the right for

pin denitions. (You must also have a

card with a Standby Power connector

and a cable to use this feature.)

Standby PWR

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

2-30

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A

A. JPI

2

C1

B. JIPMB1

Power SMB (I2C) Connector

Power System Management Bus (I2C)

connector (JPI2C1) monitors power

supply, fan and system temperatures.

See the table on the right for pin

denitions.

PWR SMB

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

IPMB

A System Management Bus header

for IPMI 2.0 is located at JIPMB1.

Connect an appropriate cable here to

use the IPMB I2C connection on your

system.

IPMB Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

B

Chapter 2: Installation

2-31

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A

B

A. T-SGPIO1

B. T-SGPIO2

C. S-SGPIO1

D. PWR LED/Speaker

T-SGPIO1/2 & S-SGPIO1 Headers

Three SGPIO (Serial Link Gener-

al Purpose Input/Output) headers

are located on the motherboard. T-

SGPIO1/2 support onboard I-SATA

connections from the Intel PCH, and

S-SGPIO1 supports onboard S-SATA

connections from the Intel SCU. See

the table on the right for pin deni-

tions.

Note: NC= No Connection

T-SGPIO/S-SGPIO Headers

Pin Denitions

Pin# Denition Pin Denition

1 NC 2 NC

3 Ground 4 Data

5 Load 6 Ground

7 Clock 8 NC

C

D

T-SGPIO0-1, & S-SGPIO1 Support

T/S-SGPIO# I-SATA Ports Supported

T-SGPIO1 I-SATA Ports 0-3 Supported

T-SGPIO2 I-SATA Ports 4/5 Supported

S-SGPIO1 S-SATA Ports 0-3 Supported

Power LED/Speaker

Pins 1-3 of JD1 are used for power

LED indication, and pins 4-7 are for

the speaker. Close pins 4-7 of JD1 to

use the speaker connector as an ex-

ternal speaker. To use it as an onboard

buzzer, please close pins 6-7 of JD1

with a cap. See the tables on the right

for pin denitions.

Speaker Connector

Pin Settings

Pin Setting Denition

Pin 4 P5V

Pin 5 Key

Pin 6 R_SPKPIN_N

Pin 7 R_SPKPIN

PWR LED Connector

Pin Denitions

Pin Setting Denition

Pin 1 JD1_PIN1

Pin 2 FP_PWR_LED

Pin 3 FP_PWR_LED

2-32

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

2-8 Jumper Settings

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers create

shorts between two pins to change the

function of the connector. Pin 1 is identied

with a square solder pad on the printed

circuit board. See the motherboard layout

pages for jumper locations.

Note: On two-pin jumpers,

"Closed" means the jumper is

on and "Open" means the jumper

is off the pins.

Connector

Pins

Jumper

Cap

Setting

Pin 1-2 short

3 2 1

3 2 1

LAN Enable/Disable

Use JPLAN1 to enable Gigabit LAN ports 1/2

on the -LN4+ model and 10G-LAN ports 1/2

on the -T4+ model. Use JPLAN2 to enable

Gigabit LAN Ports 3/4 on the -LN4+ model and

(10G) T- LAN Ports 3/4 on the -T4+ model. See

the table on the right for jumper settings. The

default setting is Enabled.

LAN Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (default)

2-3 Disabled

A

A. GLAN1/2 Enable (-LN4+)

A. TLAN1/2 Enable (-T4+)

B. GLAN3/4 Enable (-LN4+)

B. TLAN3/4 Enable (-T4+)

B

Chapter 2: Installation

2-33

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1
JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads

to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such

as a small screwdriver to touch both pads at the same time to short the connection.

Note: Please completely shut down the system, and then short JBT1 to

clear CMOS.

A

B

A. Clear CMOS

B. Watch Dog Enable

Watch Dog Enable/Disable

Watch Dog (JWD1) is a system monitor that

will reboot the system when a software ap-

plication hangs. Close pins 1-2 to reset the

system if an application hangs. Close pins

2-3 to generate a non-maskable interrupt

signal for the application that hangs. See the

table on the right for jumper settings. Watch

Dog must also be enabled in the BIOS.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset (default)

Pins 2-3 NMI

Open Disabled

2-34

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A. VGA Enabled

B. BMC Enabled

A

B

VGA Enable

Jumper JPG1 allows the user to enable

the onboard VGA connector. The default

setting is on pins 1-2 to enable the con-

nection. See the table on the right for

jumper settings.

VGA Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

BMC Enable

Jumper JPB1 allows you to enable the

embedded ASpeed AST 2400 BMC

(Baseboard Management) Controller to

provide IPMI 2.0/KVM support on the

motherboard. See the table on the right

for jumper settings.

BMC Enable

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC Enable (Default)

Pins 2-3 Disabled

Chapter 2: Installation

2-35

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1
JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

I2C Bus to PCI-Exp. Slots

Use Jumpers JI2C1 and JI2C2 to con-

nect the System Management Bus (I2C)

to PCI-Express slots to improve PCI

performance. These two jumpers are

to be set at the same time. The default

setting is on pins 1-2 to enable the con-

nections. See the table on the right for

jumper settings.

I2C for PCI-E slots

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

A

A. JI

2

C1

B. JI

2

C2

B

2-36

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A

A. ME Mode Se-

lect

B. SAS Enable

(X10DRC only)

Manufacturer Mode Select

Close pins 2-3 of Jumper JPME2 to by-

pass SPI ash security and force the sys-

tem to operate in the Manufacturer mode,

allowing the user to ash the system

rmware from a host server for system

setting modications. See the table on

the right for jumper settings.

ME Mode Select

Jumper Settings

Jumper Setting Denition

1-2 Normal (Default)

2-3 Manufacture Mode

SAS Enable (For X10DRC-LN4+/T4+)

Close pins 1-2 of JPS1 to enable the

onboard LSI 3108 controller on the

X10DRC-LN4+/T4+. See the table on

the right for jumper settings. The default

setting is enabled.

SAS Enable

Jumper Settings

Jumper Setting Denition

Pins 1-2 SAS Enable (Default)

Pins 2-3 Disabled

B

Chapter 2: Installation

2-37

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A. LAN1/2 & LAN3/4 LEDs

B. IPMI LAN LEDs

IPMI Dedicated LAN LEDs

In addition to LAN 1/LAN 2, an IPMI-LAN

is also located on the I/O back panel. The

amber LED on the right indicates activity,

while the green LED on the left indicates the

speed of the connection. See the tables at

right for more information.

LAN 1/LAN 2

Link LED

Activity LED

IPMI LAN

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color/State Denition

Link (Left) Green: Solid 100 Mbps

Amber: Solid 1 Gbps

Activity (Right) Orange:

Blinking

Active

A

B

LAN Port LEDs

Four LAN ports (LAN 1/2 & LAN 3/4) are

located on the IO back panel of the moth-

erboard. Each Ethernet LAN port has two

LEDs. The orange LED on the left indicates

activity, while the other Link LED may be

green, amber or off to indicate the speed

of the connections. See the tables at right

for more information.

LAN Port Activity LED (Left)

LED State

Color Status Denition

Orange Flashing Active

A

B

2-9 LED Indicators

A

Rear View (when facing the

rear side of the chassis)

Rear View (when facing the
rear side of the chassis)

Activity LED

Activity LED

Link LED

Link LED

LAN Port LEDs

10G-LAN Link LED

Settings

(For X10DRC/i-T)

Color Denition

Off No Con-

nection,
10 or 100
Mbps

Green 10 Gbps

Amber 1 Gbps

LAN Link LED

Settings

(For X10DRC/i-LN4+)

Color Denition

Off No Connec-

tion, 10 Mbps

Green 100 Mbps

Amber 1 Gbps

2-38

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Onboard PWR LED Indicator

LED States

Color/State Denition

Off System Power Off

Green: On System Power On

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

B

Onboard Power LED

An Onboard Power LED is located at LE2

on the motherboard. When this LED is on,

the system is on. Be sure to turn off the

system and unplug the power cord before

removing or installing components. See

the table at right for more information.

A

A. PWR LED

B. BMC LED

BMC Heartbeat LED

A BMC Heartbeat LED is located at

LEDM1 on the motherboard. When

LEDM1 is blinking, BMC functions nor-

mally. See the table at right for more

information.

BMC Heartbeat LED

States

Color/State Denition

Green: Blinking BMC: Normal

Chapter 2: Installation

2-39

SAS Heartbeat LED

LED Settings

Color/State Denition

Green: Blinking SAS: Normal

Off SAS: Disabled or

Failed

SAS Heartbeat LED (for the X10DRC-

LN4+/T4+ only)

A SAS Heartbeat LED is located at DS13

on the motherboard. When DS13 is blink-

ing, SAS is working properly.

SAS Activity LED (for the X10DRC-

LN4+/T4+ only)

A SAS Activity LED is located at LEDS5

on the motherboard. When LEDS5 is

blinking, SAS is active.

SAS Activity LED

LED Settings

Color/State Denition

Green: Blinking SAS: Active

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1

T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

B

A

A. SAS Heat-

beat LED

B. SAS Activity

LED

2-40

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

SAS Error LED (for the X10DRC-

LN4+/T4+ only)

A SAS Error LED is located at LEDS6 on

the motherboard. When LEDS6 is on, a

SAS error has occurred.

SAS Error LED

LED Settings

Color/State Denition

Red: On A SAS Error has occurred.

Note: Refer to Page 2-19 for information on the rear UID LED (LE1).

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A

A. SAS Error

LED

Chapter 2: Installation

2-41

Note: For more information on SATA HostRAID conguration, please refer

to the Intel SATA HostRAID User's Guide posted on our website @ http://

www.supermicro.com..

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A. I-SATA0

B. I-SATA1

C. I-SATA2

D. I-SATA3

E. I-SATA4

F. I-SATA5

G. S-SATA0

H. S-SATA1

I. S-SATA2

J. S-SATA3

SATA 3.0 Ports

Ten SATA 3.0 ports are located on the motherboard.

Six SATA 3.0 ports (I-SATA 0-5) are supported by the

Intel PCH C612. The other four SATA ports (S-SATA

0-3) are supported by the Intel SCU. These SATA

ports provide serial-link signal connections, which

are faster than the connections of Parallel ATA. See

the table on the right for pin denitions.

C

E

2-10 SATA/SAS Connections

B

F

A

G

H

J

D

SATA Connectors

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

I

2-42

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IPMI CODE

SAS CODE

SAN MAC

T-SGPIO1
T-SGPIO2

JD1

JS39

LEDS6

LEDS5

LEDM1

LE2

LE1

FANB

FANA

FAN4

FAN3

FAN2

FAN1

FAN5

FAN6

JBT1

JIPMB1

SP1

JPS7

JPG1

JPLAN1

JPLAN2

JWD1

JPME2

JI2C2

JVRM1

JPB1

JTPM1

JSD2

JSD1

JS1

JPP0

JPP1

JPWR2

JPWR1

J24

JPI2C1

BIOS
LICENSE

MAC CODE

BAR CODE

SAS 4~7 (3.0)

SAS 0~3 (3.0)

P1-DIMMD3

P1-DIMMD2

P1-DIMMD1

P1-DIMMC3

P1-DIMMC2

P1-DIMMB3

P1-DIMMB2

P1-DIMMB1

P1-DIMMA3

P1-DIMMA2

P2-DIMMH3

P2-DIMMH2

P2-DIMMH1

P2-DIMMG3

P2-DIMMG2

P2-DIMMF3

P2-DIMMF2

P2-DIMMF1

P2-DIMME3

P2-DIMME2

USB 7/8 (3.0)

USB 0/1

P1-DIMMC1

P1-DIMMA1

CPU2 SLOT6 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X16

CPU2 SLOT4 PCI-E 2.0 X4 IN X8

JL1

S-SATA0

CPU1 SLOT3 PCI-E 3.0 X16

S-SATA1

S-SATA2

CPU2 SLOT2 PCI-E 3.0 X8

S-SATA3

I-SATA0

I-SATA3

I-SATA4

I-SATA1

CPU2 SLOT1 PCI-E 3.0 X8

COM2

I-SATA5

UID

VGA

LAN3/4

LAN1/2

IPMI_LAN

COM1

CPU2

CPU1

P2-DIMME1

P2-DIMMG1

I-SATA2

JI2C1

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB 6 (3.0)

BIOS

USB2/3

S-SGPIO1

X10DRC/i-LN4+(-T4+)

Rev. 1.01

BMC

LAN CTRL

LSI 3108
SAS CTRL

Intel PCH

USB4/5
(3.0)

JBAT1

TPM/PORT80

JUIDB1

Front CTRL Panel

JF1

FANC

JVRM2

JSTBY1

1

LAN CTRL

DS13

JPS1

A. SAS 0~3

B. SAS 4~7

SAS 3.0 Ports (for the X10DRC-LN4+/T4+)

Eight SAS 3.0 ports are located at JS39 on the motherboard. These SAS ports

are supported by the LSI 3108 SAS controller. These SAS ports provide serial-link

signal connections, which are faster than the connections of Serial ATA (SATA).

See the table on the right for pin denitions.

B

A

3-1

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the ‘Technical Support

Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or installing any

hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse.

3. Remove all add-on cards.

4. Install CPU 1 rst (-making sure it is fully seated) and connect the front panel

connectors to the motherboard.

No Power

1. Make sure that no short circuits between the motherboard and the chassis.

2. Make sure that all power connectors are properly connected.

3. Check that the 115V/230V switch on the power supply is properly set, if avail-

able.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3-2

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

No Video

1. If the power is on, but you have no video, remove all the add-on cards and

cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A

for details on beep codes.

System Boot Failure

If the system does not display POST or does not respond after the power is turned

on, check the following:

1. Check for any error beep from the motherboard speaker.

•If there is no error beep, try to turn on the system without DIMM modules in-

stalled. If there is still no error beep, try to turn on the system again with only

one processor installed in CPU Socket#1. If there is still no error beep, replace

the motherboard.

•If there are error beeps, clear the CMOS settings by unplugging the power cord

and contracting both pads on the CMOS Clear Jumper (JBT1). (Refer to the

Jumper Section in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM modules.

Make sure that system power is on, and memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system

boots, check for bad DIMM modules or slots by following the Memory Errors

Troubleshooting procedure in this Chapter.

Losing the System’s Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality

power supply may cause the system to lose the CMOS setup information.

Refer to Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the Setup Conguration problem, contact your

vendor for repairs.

3-3

Chapter 3: Troubleshooting

Memory Errors

When a No-Memory Beep Code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that

the DIMM modules are properly and fully installed. (For memory compatibility,

refer to the Memory Compatibility Chart posted on our website @ http://www.

supermicro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recom-

mended that you use the same RAM type and speed for all DIMMs in the

system.

3. Make sure that you are using the correct type of Registered (RDIMM)/Load

Reduced (LRDIMM) ECC DDR4 DIMM modules recommended by the manu-

facturer.

4. Check for bad DIMM modules or slots by swapping a single module among

all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the

instructions given in Section 2-5 in Chapter 2.

6. Please follow the instructions given in the DIMM Population Tables listed in

Section 2-5 to install your memory modules.

When the System Becomes Unstable

A. When the system becomes unstable during or after OS installation, check

the following:

1. CPU/BIOS support: Make sure that your CPU is supported, and you have the

latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by test-

ing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website http:\\www.supermicro.

com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-

place the bad HDDs with good ones.

4. System cooling: Check system cooling to make sure that all heatsink fans,

and CPU/system fans, etc., work properly. Check Hardware Monitoring set-

3-4

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

tings in the IPMI to make sure that the CPU and System temperatures are

within the normal range. Also check the front panel Overheat LED, and make

sure that the Overheat LED is not on.

5. Adequate power supply: Make sure that the power supply provides adequate

power to the system. Make sure that all power connectors are connected.

Please refer to our website for more information on minimum power require-

ment.

6. Proper software support: Make sure that the correct drivers are used.

B. When the system becomes unstable before or during OS installation, check

the following:

1. Source of installation: Make sure that the devices used for installation are

working properly, including boot devices such as CD/DVD disc.

2. Cable connection: Check to make sure that all cables are connected and

working properly.

3. Using minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use minimum conguration

(with a CPU and a memory module installed) to identify the trouble areas.

Refer to the steps listed in Section A above for proper troubleshooting proce-

dures.

4. Identifying bad components by isolating them: If necessary, remove a compo-

nent in question from the chassis, and test it in isolation to make sure that it

works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several

items at the same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to

see if the system will work properly. If so, then the old component is bad.

You can also install the component in question in another system. If the new

system works, the component is good and the old system has problems.

3-5

Chapter 3: Troubleshooting

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please

note that as a motherboard manufacturer, Supermicro also sells motherboards

through its channels, so it is best to rst check with your distributor or reseller for

troubleshooting services. They should know of any possible problem(s) with the

specic system conguration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.

com).

3. If you still cannot resolve the problem, include the following information when

contacting Supermicro for technical support:

•Motherboard model and PCB revision number

•BIOS release date/version (This can be seen on the initial display when your

system rst boots up.)

•System conguration

4. An example of a Technical Support form is on our website at (http://www.

supermicro.com/RmaForm/).

•Distributors: For immediate assistance, please have your account number ready

when placing a call to our technical support department. We can be reached by

e-mail at [e-mail].

3-6

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Proper Battery Disposal

Warning! Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

3-3 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

OR

3-7

Chapter 3: Troubleshooting

3-4 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The motherboard supports Registered (RDIMM)/Load Reduced (LRDIMM)

ECC DDR4 DIMM modules. To enhance memory performance, do not mix memory

modules of different speeds and sizes. Please follow all memory installation instruc-

tions given on Section 2-5 in Chapter 2.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website

at http://www.supermicro.com. Please check our BIOS warning message and the

information on how to update your BIOS on our website. Select your motherboard

model and download the BIOS le to your computer. Also, check the current BIOS

revision to make sure that it is newer than your BIOS before downloading. You can

choose from the zip le and the .exe le. If you choose the zip BIOS le, please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format

FLASH.BAT lename.rom from your bootable USB device to ash the BIOS. Then,

your system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed.

Send your motherboard back to our RMA Department at Supermicro for

repair. For BIOS Recovery instructions, please refer to the AMI BIOS

Recovery Instructions posted at http://www.supermicro.com.

Question: How do I handle the used battery?

Answer: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment.

Do not discard a used battery in the garbage or a public landll. Please comply

with the regulations set up by your local hazardous waste management agency to

dispose of your used battery properly.

3-8

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before

any warranty service will be rendered. You can obtain service by calling your ven-

dor for a Returned Merchandise Authorization (RMA) number. When returning the

motherboard to the manufacturer, the RMA number should be prominently displayed

on the outside of the shipping carton, and the shipping package is mailed prepaid

or hand-carried. Shipping and handling charges will be applied for all orders that

must be mailed when service is complete. For faster service, You can also request

a RMA authorization online (http://www.supermicro.com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages in-

curred in shipping or from failure due to the alternation, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product problems.

Chapter 4: AMI BIOS

4-1

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10DRC/i-LN4+/-T4+. The

ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter

describes the basic navigation of the AMI BIOS setup utility screens.

Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery

Instructions in Appendix C.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Delete> key while the

system is booting up.

Note: In most cases, the <Delete> key is used to invoke the AMI BIOS

setup screen.

Each main BIOS menu option is described in this manual. The AMI BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for a text message. When an option is selected in the

left frame, it is highlighted in white. Often a text message will accompany it.

Note: the AMI BIOS has default text messages built in. Supermicro retains

the option to include, omit, or change any of these text messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during the

setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow

keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Del> at the appropriate time during system boot.

4-2

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

How to Start the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen, below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall

Supermicro be liable for direct, indirect, special, incidental, or consequential damages

arising from a BIOS update. If you have to update the BIOS, do not shut down or reset

the system while the BIOS is updating to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS setup screen is shown below.

Chapter 4: AMI BIOS

4-3

The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or

System Time using the arrow keys. Enter new values using the keyboard. Press the

<Tab> key or the arrow keys to move between elds. The date must be entered in

Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears

as 17:30:00.

Supermicro X10DRC-T4+ Series

BIOS Version: This item displays the version of the BIOS ROM used in the

system.

Build Date: This item displays the date when the version of the BIOS ROM used

in the system was built.

Memory Information

Total Memory: This item displays the total size of memory available in the system.

Memory Speed: This item displays the default speed of the memory modules

installed in the system.

4-4

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

4-3 Advanced Setup Congurations

Use the arrow keys to select Advanced setup and press <Enter> to access the

submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, a

very high DRAM frequency or an incorrect BIOS timing setting may cause the system

to malfunction. When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen display between POST messages or the OEM

logo at bootup. Select Disabled to display the POST messages. Select Enabled

to display the OEM logo instead of the normal POST messages. The options are

Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to

use the current AddOn ROM display setting. Select Force BIOS to use the Option

ROM display mode set by the system BIOS. The options are Force BIOS and

Keep Current.

Bootup Num-Lock State

Use this item to set the Power-on state for the Numlock key. The options are Off

and On.

Chapter 4: AMI BIOS

4-5

Wait For 'F1' If Error

Select Enabled to force the system to wait until the <F1> key is pressed if an error

occurs. The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt

19 at bootup immediately and allow the drives that are attached to the host adap-

tors to function as bootable disks. If this item is set to Postponed, the ROM BIOS

of the host adaptors will not capture Interrupt 19 immediately to allow the drives

attached to the adaptors to function as bootable devices at bootup. The options

are Immediate and Postponed.

Re-try Boot

Select EFI Boot to allow the BIOS to automatically reboot the system from an EFI

boot device after its initial boot failure. Select Legacy Boot to allow the BIOS to

automatically reboot the system from a Legacy boot device after its initial boot

failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inac-

tive for more than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed.

Select 4 Seconds Override for the user to power off the system after pressing and

holding the power button for 4 seconds or longer. Select Instant Off to instantly

power off the system as soon as the user presses the power button. The options

are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for

the system power to remain off after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power-On,

Stay-Off, and Last State.

4-6

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

CPU Conguration

This submenu displays the following CPU information as detected by the BIOS. It

also allows the user to congure CPU settings.

•Processor Socket

•Processor ID

•Processor Frequency

•Processor Max Ratio

•Processor Min Ratio

•Microcode Revision

•L1 Cache RAM

•L2 Cache RAM

•L3 Cache RAM

•CPU 1 Version

•CPU 2 Version

Clock Spread Spectrum

Select Enabled to allow the BIOS to monitor and attempt to reduce the level of

Electromagnetic Interference caused by the components whenever needed. The

options are Disabled and Enabled.

Hyper-Threading (All)

Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-

formance. The options are Enable and Disable.

Cores Enabled

This feature allows the user to determine the number of CPU cores to enable. Enter

"0" to enable all cores. There are 14 cores available in the system. The default set-

ting is 0, which enables all CPU cores in the system.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit Technology support, which will allow the

processor to designate areas in the system memory where an application code

can execute and where it cannot, thus preventing a worm or a virus from ooding

Chapter 4: AMI BIOS

4-7

illegal codes to overwhelm the processor to damage the system during an attack.

The options are Enable and Disable. (Refer to Intel's and Microsoft's websites for

more information.)

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN)

control in the system. The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-

tions from the main memory to the L2 cache to improve CPU performance. The

options are Disable and Enable.

Adjacent Cache Line Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

Note: Please reboot the system for changes on this setting to take effect.

Please refer to Intel’s website for detailed information.

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by
the CPU)

If set to Enable, the DCU Streamer prefetcher will prefetch data streams from the

cache memory to the DCU (Data Cache Unit) to speed up data accessing and

processing to enhance CPU performance. The options are Disable and Enable.

DCU IP Prefetcher

If set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP

addresses to improve network connectivity and system performance. The options

are Enable and Disable.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to improve the

efciency of data transferring and accessing. The options are Auto, Enable, and

Disable.

X2 APIC (Advanced Programmable Interrupt Controller)

Based on Intel's Hyper-Threading architecture, each logical processor (thread) is

assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to En-

able, the APIC ID will expand(X2) from 8 bits to 16 bits to provide 512 APIDs to each

thread for CPU performance enhancement. The options are Disable and Enable.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d sup­port by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and availability

in networking and data-sharing. The options are Enable and Disable.

 Advanced Power Management Conguration

Advanced Power Management Conguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to custom-

ize system power settings. Select Disabled to disable power-saving settings. The

options are Disable, Energy Efcient, and Custom.

 CPU P State Control (Available when Power Technology
is set to Custom)

EIST (P-States)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically

adjust the processor voltage and core frequency to reduce power consumption

and heat dissipation. The options are Disable and Enable.

Turbo Mode

Select Enabled to use the Turbo Mode to boost system performance. The options

are Enable and Disable.

P-State Coordination

This feature is used to change the P-state (Power-Performance State) coordi-

nation type. P-state is also known as "SpeedStep" for Intel processors. Select

HW_ALL to change the P-state coordination type for hardware components only.

Select SW_ALL to change the P-state coordination type for all software installed

in the system. Select SW_ANY to change the P-state coordination type for a soft-

ware program in the system. The options are HW_All, SW_ALL, and SW_ANY.

Chapter 4: AMI BIOS

4-9

 CPU C State Control (Available when Power Technology
is set to Custom)

Package C State limit

Use this item to set the limit on the C-State package register. The options are

C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state.

CPU C3 Report

Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the

operating system. During the CPU C6 state, power to all cache is turned off.

The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly

reduce CPU power consumption by reducing CPU clock cycles and voltages

during a Halt-state. The options are Disable and Enable.

 CPU T State Control (Available when Power Technology
is set to Custom)

ACPI (Advanced Conguration Power Interface) T-States

Select Enable to support CPU throttling by the operating system to reduce power

consumption. The options are Enable and Disable.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Chipset Conguration

Warning! Please set the correct settings for the items below. A wrong conguration

setting may cause the system to become malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

IIO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a

processor will always remain clear during electric tuning. The options are Dis-

able and Enable.

IIO1 Conguration

IOU2 (II0 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, x8, and Auto.

II01 PORT 1A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

IOU0 (II0 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

II01 PORT 2A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

IOU1 (II01 PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

Chapter 4: AMI BIOS

4-11

II01 PORT 3A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

II01 PORT 3C Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

IIO2 Conguration

IOU2 (II02 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, x8, and Auto.

II02 PORT 1A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

IOU0 (II02 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

II02 PORT 2A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

IOU1 (II02 PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

II02 PORT 3A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

II02 PORT 3C Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Gen 3 (Generation 3) (8 GT/s).

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

IOAT (Intel® IO Acceleration) Conguration

Enable IOAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support, which

signicantly reduces CPU overhead by leveraging CPU architectural improve-

ments and freeing the system resource for other tasks. The options are Enable

and Disable.

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain

transactions to violate the strict-ordering rules of PCI bus for a transaction to

be completed prior to other transactions that have already been enqueued. The

options are Disable and Enable.

 Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support

by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and avail-

ability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance.

The options are Enable and Disable.

QPI (Quick Path Interconnect) Conguration

QPI General Conguration

QPI Status

The following information will display:

•Number of CPU

•Number of II0

•Current QPI Link Speed

Chapter 4: AMI BIOS

4-13

•Current QPI Link Frequency

•QPI Global MMIO Low Base/Limit

•QPI Global MMIO High Base/Limit

•QPI PCIe Conguration Base/Size

Link Frequency Select

Use this item to select the desired frequency for QPI Link connections. The op-

tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited.

Link L0p Enable

Select Enable for Link L0p support to reduce power consumption. The options

are Enable and Disable.

Link L1 Enable

Select Enable for Link L1 support to reduce power consumption. The options

are Enable and Disable.

COD Enable (Available when the OS and the CPU support this feature)

Select Enable for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Enable, Disable, and Auto.

Early Snoop (Available when the OS and the CPU support this feature)

Select Enable for Early Snoop support to enhance system performance. The

options are Enable, Disable, and Auto.

Isoc Mode

Select Enable for Isochronous support to meet QoS (Quality of Service) require-

ments. This feature is especially important for Virtualization Technology. The

options are Enable and Disable.

Memory Conguration

Enforce POR

Select Enabled to enforce POR restrictions on DDR4 frequency and voltage

programming. The options are Enabled and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory

modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,

2200, 2400, and Reserved (Do not select Reserved).

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Auto, Disabled and Enabled.

DRAM RAPL (Running Average Power Limit) Baseline

Use this feature to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Set Throttling Mode

Throttling improves CPU reliability and reduces power consumption via automat-

ic-voltage control during CPU idle states. The options are Disabled and CLTT

(Closed Loop Thermal Throttling).

Socket Interleave Below 4GB

Select Enable for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

A7 Mode

Select Enable to support the A7 (Addressing) mode to improve memory perfor-

mance. The options are Enable and Disable.

DIMM Information

This item displays the status of a DIMM module as detected by the AMI

BIOS.

Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

RAS Mode

When Disable is selected, RAS is not supported. When Mirror is selected, the

motherboard maintains two identical copies of all data in memory for data backup.

When Lockstep is selected, the motherboard uses two areas of memory to run

the same set of operations in parallel to boost performance. The options are

Disable, Mirror, and Lockstep Mode.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve

memory performance. The options are Disabled and Enabled.

Chapter 4: AMI BIOS

4-15

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected on a memory module and send the correction to the requestor

(the original source). When this item is set to Enable, the IO hub will read and

write back one cache line every 16K cycles, if there is no delay caused by internal

processing. By using this method, roughly 64 GB of memory behind the IO hub

will be scrubbed every day. The options are Enable and Disable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before

the next complete patrol scrub is performed. Use the keyboard to enter a value

from 0-24. The Default setting is 24.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable

memory errors found on a memory module. When the CPU or I/O issues a

demand-read command, and the read data from memory turns out to be a

correctable error, the error is corrected and sent to the requestor (the original

source). Memory is updated as well. Select Enable to use Demand Scrubbing

for ECC memory correction. The options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable and Enable.



South Bridge Conguration

The following South Bridge information will display:



USB Conguration

•USB Module Version

•USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable

legacy support if there are no legacy USB devices present. Select Disabled to

have all USB devices available for EFI applications only. The options are Enabled,

Disabled and Auto.

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XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Ex-

tensible Host Controller Interface) hand-off. The XHCI ownership change should be

claimed by the XHCI driver. The settings are Enabled and Disabled.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled to support I/O port 60h/64h emulation, which will provide complete

legacy USB keyboard support for the operating systems that do not support legacy

USB devices. The options are Disabled and Enabled.

USB 3.0 Support

Select Enabled for USB 3.0 support. The options are Smart Auto, Auto, Enabled,

Disabled, and Manual.

EHCI1

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #1 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

EHCI2

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #2 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

XHCI Pre-Boot Drive

Select Enabled to enable XHCI (Extensible Host Controller Interface) support on a

pre-boot drive specied by the user. The options are Enabled and Disabled.

Chapter 4: AMI BIOS

4-17



SATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the Intel PCH chip and displays the fol-

lowing items:

SATA Controller

Select Enabled to enable the onboard SATA controller supported by the Intel PCH

chip. The options are Enabled and Disabled.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

*If the item above "Congure SATA as" is set to AHCI, the following items will display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the

particular SATA port.

•Model number of drive and capacity

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the

device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

*If the item above "Congure SATA as" is set to IDE, the following items will

display:

Serial ATA Port 0~ Port 5

This item indicates that a SATA port specied by the user is installed (present)

or not.

Port 0 ~ Port 5 SATA Device Type (Available when a SATA port is
detected)

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to RAID, the following items will

display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

OPROM for system boot. The options are Disabled, EFI, and Legacy.

SATA/sSATA RAID Boot Select

Select SATA Controller to boot the system from a SATA RAID device. Select sSATA

Controller to boot the system from a sSATA RAID device. Select Both to boot the

system either from a SATA RAID device or from an sSATA RAID device. Please

note that the option-Both is not supported by the Windows Server 2012/R2 OS.

The options are Both, SATA Controller, and sSATA Controller.

Serial ATA Port 0~ Port 5

This item displays the information detected on the installed SATA drives on the

particular SATA port.

•Model number of drive and capacity

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Chapter 4: AMI BIOS

4-19

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.



sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the PCH-sSATA controller and displays

the following items:

sSATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH-sSATA controller. The options are Enabled and Disabled.

Congure sSATA as

Select IDE to congure an sSATA drive specied by the user as an IDE drive. Select

AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select

RAID to congure an sSATA drive specied by the user as a RAID drive. The op-

tions are IDE, AHCI, and RAID.

*If the item above "Congure sSATA as" is set to AHCI, the following items will

display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

sSATA Port 0~ Port 3

This item displays the information detected on the installed on the sSATA port.

specied by the user.

•Model number of drive and capacity

sSATA Port 0~ Port 3

Select Enabled to enable an sSATA port specied by the user. The options are

Disabled and Enabled.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

sSATA Port 0 ~ Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 3 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure sSATA as" is set to IDE, the following items will

display:

sSATA Port 0~ Port 3

This item indicates that an sSATA port specied by the user is installed (pres-

ent) or not.

Port 0 ~ Port 3 sSATA Device Type (Available when a SATA port is
detected)

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure sSATA as" is set to RAID, the following items will

display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

sSATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

OPROM for system boot. The options are Disabled, EFI, and Legacy.

SATA/sSATA RAID Boot Select

Select SATA Controller to boot the system from a SATA RAID device. Select sSATA

Controller to boot the system from a sSATA RAID device. Select Both to boot the

system either from a SATA RAID device or from an sSATA RAID device. Please

note that the option-Both is not supported by the Windows Server 2012/R2 OS.

The options are Both, SATA Controller, and sSATA Controller.

Chapter 4: AMI BIOS

4-21

sSATA Port 0~ Port 3

This item displays the information detected on the installed sSATA drives on the

particular sSATA port.

•Model number of drive and capacity

sSATA Port 0~ Port 3

Select Enabled to enable an sSATA port specied by the user. The options are

Disabled and Enabled.

sSATA Port 0 ~ Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 3 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

•General ME Conguration

•Operational Firmware Version

•Recovery Firmware Version

•ME Firmware Features

•ME Firmware Status #1

•ME Firmware Status #2

•Current State

•Error Code

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

•PCI Bus Driver Version

•PCI Device Common Settings

PCI Latency Timer

Use this item to congure the PCI latency timer for a device installed on a PCI bus.

Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are 32,

64, 96, 128, 160, 192, 224, and 248 (PCI Bus Clocks).

PCI-X Latency Timer

Use this item to congure the PCI-X latency timer for a device installed on a PCI

bus. Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are

32, 64, 96, 128, 160, 192, 224, and 248 (PCI Bus Clocks).

PCI PERR/SERR Support

Select Enabled to support PERR (PCI/PCI-E Parity Error)/SERR (System Error)

runtime error reporting for a PCI/PCI-E slot. The options are Enabled and Disabled.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G

Address. The options are Enabled and Disabled.

SR-IOV (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled

and Disabled.

Maximum Payload

Select Auto for the system BIOS to automatically set the maximum payload value

for a PCI-E device to enhance system performance. The options are Auto, 128

Bytes, and 256 Bytes.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read

request for a PCI-E device to enhance system performance. The options are Auto,

128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

Chapter 4: AMI BIOS

4-23

ASPM Support

Use this item to set the Active State Power Management (ASPM) level for a PCI-E

device. Select Auto for the system BIOS to automatically set the ASPM level based

on the system conguration. Select Disabled to disable ASPM support. The options

are Disabled and Auto.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

MMIOHBase

Use this item to select the I/O base memory size according to memory-address

mapping for the PCH chip. The base memory size must be between 4032G to

4078G. The options are 56T, 48T, 24T, 512G, and 256G.

MMIO High Size

Use this item to select the high I/O memory size according to memory-address

mapping for the PCH chip. The options are 256G, 128G, 512G, and 1024G.

CPU2 Slot1 PCI-E 3.0 x8 OPROM/CPU2 Slot2 PCI-E 3.0 x8 OPROM/CPU1
Slot3 PCI-E 3.0 x16 OPROM/CPU2 Slot4 PCI-E 2.0 x4 in x8 OPROM/CPU2
Slot5 PCI-E 3.0 x16 OPROM/CPU2 Slot6 PCI-E 3.0 x8 OPROM/Onboard SAS
Option ROM

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy,

and EFI.

Onboard LAN Option ROM Type

Select Enabled to enable Option ROM support to boot the computer using a device

installed on the slot specied by the user. The options are Legacy and EFI.

Onboard LAN1 Option ROM/Onboard LAN2 Option ROM/ Onboard LAN3
Option ROM/Onboard LAN4 Option ROM/Onboard Video Option ROM

Use this option to select the type of device installed in LAN Port1, LAN Port2

or the onboard video device used for system boot. The default settings for LAN1

Option ROM is PXE, for LAN2/LAN3/LAN4 Option ROMs are Disabled ,and for

Onboard Video Option ROM is Legacy.

VGA Priority

Use this item to select the graphics device to be used as the primary video display

for system boot. The options are Onboard and Offboard.

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Uni-

ed Extensible Firmware Interface) for network stack support. The options are

Enabled and Disabled.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual



Super IO Conguration

Super IO Chip AST2400



Serial Port 1 Conguration/Serial Port 2 Conguration

Serial Port 1/Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options

are Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of

a serial port specied by the user.

Change Port 1 Settings/Change Port 2 Settings

This feature species the base I/O port address and the Interrupt Request address

of Serial Port 1 or Serial Port 2. Select Auto for the BIOS to automatically assign

the base I/O and IRQ address to a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

The options for Serial Port 2 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redi-

rection. The options are COM and SOL.



Serial Port Console Redirection

COM 1

COM 1 Console Redirection

Select Enabled to enable COM Port 1 Console Redirection, which will allow a client

machine to be connected to a host machine at a remote site for networking. The

options are Disabled and Enabled.

Chapter 4: AMI BIOS

4-25

*If the item above set to Enabled, the following items will become available for

conguration:

COM1 Console Redirection Settings

Terminal Type

Use this item to select the target terminal emulation type for Console Redirec-

tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color

and function key support. Select ANSI to use the Extended ASCII Character Set.

Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or

more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this item to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this item to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this item to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

the receiving buffer is full. Send a "Start" signal to start sending data when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this item to select the number of rows and columns used in Console Redi-

rection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

Use this feature to select Function Keys and KeyPad settings for Putty, which

is a terminal emulator designed for the Windows OS. The options are VT100,

LINUX, XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS

POST (Power-On Self-Test). When the option-Bootloader is selected, legacy

Console Redirection is disabled before booting the OS. When the option-Always

Enable is selected, legacy Console Redirection remains enabled while the OS

boots up. The options are Always Enable and Bootloader.

SOL/COM2

SOL/COM2 Console Redirection

Select Enabled to use the SOL port for Console Redirection. The options are En-

abled and Disabled.

*If the item above set to Enabled, the following items will become available for

user's conguration:

Chapter 4: AMI BIOS

4-27

SOL/COM2 Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client

computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirec-

tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color

and function key support. Select ANSI to use the Extended ASCII Character Set.

Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or

more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

the receiving buffer is full. Send a "Start" signal to start data-sending when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

4-28

X10DRC/i-LN4+/-T4+ Motherboard User’s Manual

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console

Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a

terminal emulator designed for the Windows OS. The options are VT100, LINUX,

XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS

POST (Power-On Self-Test). When this feature is set to Bootloader, legacy

Console Redirection is disabled before booting the OS. When this feature is set

to Always Enable, legacy Console Redirection remains enabled upon OS boot.

The options are Always Enable and Bootloader.

Legacy Console Redirection

The submenu allows the user to congure Legacy Console Redirection settings so

that legacy devices can be used for Console Redirection.

Legacy Console Redirection Settings

Use this feature to specify how the host computer will communicate with the client

compute at a remote site via legacy devices.

Legacy Serial Redirection Port

The feature selects a legacy serial port to be used for Console Redirection. The

options are COM1 and COM2/SOL.