Supermicro X10DRH-C, X10DRH-CT, X10DRH-i, X10DRH-iT User Manual

USER’S MANUAL

Revision 1.1

X10DRH-C

X10DRH-CT

X10DRH-i

X10DRH-iT

Manual Revision 1.1

Release Date: April 21, 2015

Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.

Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.

Copyright © 2015 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document
and makes no commitment to update or keep current the information in this manual nor to notify any
person or organization of updates. Please note: For the most up-to-date version of this manual,

please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE, OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
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PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING,
OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

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Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate.

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.

Preface

This manual is written for system integrators, PC technicians, and

knowledgeable PC users. It provides information for the installation and use of the

X10DRH-C/CT/i/iT motherboard.

About This Motherboard

The Super X10DRH-C/CT/i/iT motherboard supports dual Intel® E5-2600v3 Series

processors (Socket R3) that offer new Intel® Microarchitecture 22nm Process

Technology, delivering system performance, power efciency, and feature sets to

address the needs of next-generation computer users. With the PCH C612 built

in, the X10DRH-C/CT/i/iT motherboard supports Intel® Node Manager 3.0, Intel

MCTP Protocol, and Management Engine (ME). This motherboard is ideal for

general purpose, storage appliance, and head node server platforms. Please refer

to our website (http://www.supermicro.com) for CPU and memory support updates.

Manual Organization

Chapter 1 describes the features, specications, and performance of the mother-

board. It also provides detailed information about the Intel® PCH C612 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when

installing the processor, memory modules, and other hardware components into

the system. If you encounter any problems, see Chapter 3, which describes

troubleshooting procedures for video, memory, and system setup stored in CMOS.

Chapter 4 includes an introduction to BIOS and provides detailed information on

running the BIOS Setup Utility.

Appendix A denes the BIOS error beep codes.

Appendix B lists software installation instructions.

Appendix C contains UEFI BIOS recovery instructions.

Preface

iii

iv

Conventions Used in the Manual

Pay special attention to the following symbols for proper system installation:

Warning: Important information given to ensure proper system installation or to prevent

damage to the components or injury to yourself;

Note: Additional information given to differentiate between models or

instructions provided for proper system setup.

X10DRH-C/CT/i/iT Motherboard User’s Manual

Preface

v

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

vi

Table of Contents

Preface

Chapter 1 Overview

1-1 Overview ......................................................................................................... 1-1

1-2 Processor and Chipset Overview...................................................................1-11

1-3 Special Features ........................................................................................... 1-12

1-4 System Health Monitoring ............................................................................. 1-12

1-5 ACPI Features ............................................................................................... 1-13

1-6 Power Supply ................................................................................................ 1-13

1-7 Advanced Power Management ..................................................................... 1-14

Intel® Intelligent Power Node Manager (NM) (Available when the Supermicro

Power Manager [SPM] is installed)............................................................... 1-14

Management Engine (ME) ............................................................................ 1-14

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

2-2 Static-Sensitive Devices .................................................................................. 2-4

2-3 Motherboard Installation .................................................................................. 2-5

Tools Needed .................................................................................................. 2-5

Location of Mounting Holes ............................................................................ 2-5

Installing the Motherboard .............................................................................. 2-6

2-4 Processor and Heatsink Installation................................................................ 2-7

Installing the LGA2011 Processor ................................................................. 2-7

Installing a Passive CPU Heatsink ................................................................2-11

Removing the CPU and the Heatsink ........................................................... 2-12

2-5 Installing and Removing the Memory Modules ............................................. 2-13

Installing & Removing DIMMs ....................................................................... 2-13

Removing Memory Modules ......................................................................... 2-13

2-6 Onboard 3108 SAS Controller with Optional CacheVault Support (Optional for

X10DRH-C/CT) ............................................................................................. 2-16

The 3108 CacheVault Kit (Optional) ............................................................. 2-16

Installing the 3108 CacheVault Kit ................................................................ 2-17

2-7 Control Panel Connectors and I/O Ports ...................................................... 2-18

Back Panel Connectors and I/O Ports .......................................................... 2-18

Back Panel I/O Port Locations and Denitions ........................................... 2-18

Serial Ports ............................................................................................... 2-19

Video Connection ..................................................................................... 2-19

Universal Serial Bus (USB) ...................................................................... 2-20

Ethernet Ports .......................................................................................... 2-21

X10DRH-C/CT/i/iT Motherboard User’s Manual

vii

Table of Contents

Unit Identier Switches/UID LED Indicators ............................................. 2-22

Front Control Panel ....................................................................................... 2-23

Front Control Panel Pin Denitions............................................................... 2-24

NMI Button ............................................................................................... 2-24

Power LED .............................................................................................. 2-24

HDD/UID LED .......................................................................................... 2-25

NIC1/NIC2 LED Indicators ....................................................................... 2-25

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-26

Power Fail LED ........................................................................................ 2-26

Reset Button ........................................................................................... 2-27

Power Button ........................................................................................... 2-27

2-8 Connecting Cables ........................................................................................ 2-28

Power Connectors ................................................................................... 2-28

Fan Headers ............................................................................................. 2-29

Chassis Intrusion ..................................................................................... 2-29

Internal Speaker ....................................................................................... 2-30

Power LED/Speaker ................................................................................. 2-30

TPM/Port 80 Header ................................................................................ 2-31

Power SMB (I2C) Connector .................................................................... 2-32

IPMB ......................................................................................................... 2-32

I-SGPIO 1/2 Headers ............................................................................... 2-33

Standby Power Header ............................................................................ 2-33

2-9 Jumper Settings ............................................................................................ 2-34

Explanation of Jumpers ................................................................................ 2-34

LAN Enable/Disable ................................................................................. 2-34

CMOS Clear ............................................................................................. 2-35

Watch Dog Enable/Disable ...................................................................... 2-35

VGA Enable .............................................................................................. 2-36

BMC Enable ............................................................................................ 2-36

I2C Bus to PCI-Express Slots ................................................................... 2-37

Manufacturer Mode Select ....................................................................... 2-37

SAS Enable (X10DRH-C/CT only) ........................................................... 2-38

2-10 Onboard LED Indicators ............................................................................... 2-39

GLAN LEDs .............................................................................................. 2-39

IPMI-Dedicated LAN LEDs ....................................................................... 2-39

Onboard Power LED ............................................................................... 2-40

BMC Heartbeat LED ................................................................................ 2-40

SAS Activity LED (For X10DRH-C/CT) .................................................... 2-41

SAS Fault LED (For X10DRH-C/CT) ....................................................... 2-41

viii

SAS Heartbeat LED (For X10DRH-C/CT) ............................................... 2-42

2-11 SATA/SAS Connections ................................................................................ 2-43

SATA 3.0 and S-SATA 3.0 Connections ................................................... 2-43

SAS Ports (X10DRH-C/CT Only) ............................................................. 2-44

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

3-2 Technical Support Procedures ........................................................................ 3-5

3-3 Battery Removal and Installation .................................................................... 3-6

3-4 Frequently Asked Questions ........................................................................... 3-7

3-5 Returning Merchandise for Service................................................................. 3-8

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

4-2 Main Setup ...................................................................................................... 4-2

4-3 Advanced Setup Congurations...................................................................... 4-4

4-4 Event Logs ....................................................................................................4-40

4-5 IPMI ............................................................................................................... 4-42

4-6 Security Settings ........................................................................................... 4-44

4-7 Boot Settings ................................................................................................. 4-45

4-8 Save & Exit ................................................................................................... 4-46

Appendix A BIOS POST Error Beep Codes

A-1 BIOS POST Error Beep Codes .......................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Installing SuperDoctor5 ...................................................................................B-2

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

X10DRH-C/CT/i/iT Motherboard User’s Manual

Chapter 1: Overview

1-1

Chapter 1

Overview

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost care and at-

tention to detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.

If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box:

•One (1) Supermicro Mainboard

•Six (6) SATA Cables (CBL-0044L) (For X10DRH-i/iT:)

•Two (2) SATA Cables (CBL-0044L) (X10DRH-C/CT)

•Two (2) SAS Cables (CBL-SAST-0532) (X10DRH-C/CT)

•One (1) I/O Shield (MCP-260-00042-0N)

• One (1) Quick Reference Guide (MNL-1628-QRG)

Note 1: For your system to work properly, please follow the links below

to download all necessary drivers and utilities and the user's manual for

your motherboard.

•Supermicro Product Manuals: http://www.supermicro.com/support/manuals/

•Product Drivers and Utilities: ftp://ftp.supermicro.com/

Note 2: For safety considerations, please refer to the complete list of safety

warnings posted on the Supermicro website at http://www.supermicro.com/

about/policies/safety_information.cfm.

If you have any questions, please contact our support team at support@supermicro.

com.

1-2

X10DRH-C/CT/i/iT Motherboard User’s Manual

Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

revision available at the time of publication of the manual. The mother-

board you received may or may not look exactly the same as the graphics

shown in this manual.

Chapter 1: Overview

1-3

Differences between X10DRH-C/X10DRH-CT/X10DRH-i/X10DRH-iT

X10DRH-C X10DRH-CT X10DRH-i X10DRH-iT

SAS Connections (0-3, 4-7) Yes Yes No No

LSI SAS Controller Yes Yes No No

CacheVault support for the
onboard 3108 controller

Yes Yes No No

10G-LAN (TLAN) (w/X540
LAN Controller)

No Yes No Ye s

GLAN (w/i350 LANCon­troller)

Yes No Yes No

Motherboard Layout

Note: For the latest CPU/Memory updates, please refer to our website at

http://www.supermicro.com/products/motherboard/ for details.

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

1-4

X10DRH-C/CT/i/iT Motherboard User’s Manual

Notes:

•See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front

panel connections.

• indicates the location of Pin 1.

•Jumpers/LED indicators not indicated are used for testing only.

•Please refer to the table on Page 1-3 to see model variations.

•Use only the correct type of onboard CMOS battery as specied by the manufac-

turer. Do not install the onboard battery upside down to avoid possible explosion.

X10DRH-C/CT/i/iT Quick Reference

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Chapter 1: Overview

1-5

X10DRH-C/CT/i/iT Jumpers

Jumper Description Default Setting

JBT1 Clear CMOS/Reset BIOS Conguration See Chapter 2

JI2C1/JI2C2 SMB to PCI-E Slots Pins 2-3 (Disabled)

JPB1 BMC Enable Pins 1-2 (Enabled)

JPG1 VGA Enable Pins 1-2 (Enabled)

JPL1 GLAN1/GLAN2 Enable (X10DRH-C/i)

(10G) TLAN1/TLAN2 Enable (X10DRH­CT/iT)

Pins 1-2 (Enabled)

JPME2 Manufacture (ME) Mode Select Pins 1-2 (Normal)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)

JPS1 SAS Enable (X10DRH-C/CT only) Pins 1-2 (Enabled)

X10DRH-C/CT/i/iT Connectors

Connectors Description

BT1 (Battery) Onboard CMOS battery (See Chpt. 3 for Used Battery Disposal)

COM1/COM2 Backplane COM Port1/Front accessible COM2 header

FAN1-6,A, B CPU/system fan headers (Fan 1-Fan 6, Fan A, Fan B)

J24 24-pin ATX main power connector (See Warning on Pg. 1-6.)

JD1 Speaker/Power LED header

JF1 Front panel control header

JIPMB1 4-pin external BMC I2C header (for an IPMI card)

JL1 Chassis intrusion header

JPI2C1 Power supply SMBbus I2C header

JPWR1/JPWR2 12V 8-pin power connectors (See Warning on Pg. 1-6.)

JSTBY1 Standby power connector

JTPM1 TPM (Trusted Platform Module)/Port 80 header

LAN1/LAN2 G-bit Ethernet (GLAN) ports 1/2 (X10DRH-C/i)

10G-bit Ethernet (TLAN) ports 1/2 (X10DRH-CT/iT)

IPMI_LAN IPMI_dedicated LAN support by the ASpeed controller

I-SATA 0-5 SATA 3.0 connectors supported by Intel PCH (I-SATA 0-5), (I-

SATA4/I-SATA5: can be used as Supermicro SuperDOM (Disk­on-Module) with built-in power connectors)

S-SATA SATA 3.0 vertical connector w/4-SATA connections supported

by Intel SCU

SAS(0-3,4-7(JS39)
(for X10DRH-C/CT)

SAS 3.0 connections (0-3,4-7) supported by the LSI 3108

(CPU1) Slot1 PCI-Express 3.0 x8 slot from CPU1

(CPU1) Slot2 PCI-Express 3.0 x8 slot from CPU1

(CPU1) Slot3 PCI-Express 3.0 x8 slot from CPU1

1-6

X10DRH-C/CT/i/iT Motherboard User’s Manual

Warning!

To avoid damaging the power supply or the motherboard, be sure to use a power supply

that contains a 24-pin and two 8-pin power connectors. Be sure to connect the power

supply to the 24-pin power connector (J24) and two 8-pin power connectors (JPWR1,

JPWR2) on the motherboard. Failure to do so may void the manufacturer warranty on

your power supply and motherboard.

(CPU2)Slot4 PCI-Express 3.0 x16 slot from CPU2

(CPU2)Slot5 PCI-Express 3.0 x8 slot from CPU2

(CPU2)Slot6 PCI-Express 3.0 x8 slot from CPU2

(CPU2)Slot7 PCI-Express 3.0 x8 slot from CPU2

(I-)SGPIO1/2 Seria_Link General Purpose I/O headers 1/2 for SATA ports (I-

SGPIO1 for I-SATA0-3, I-SGPIO2 for I-SATA4/5)

SP1 Internal speaker/buzzer

TFM Header used
for CacheVault (Op­tional for X10DRH­C/CT)

TFM header used for onboard 3018 CacheVault (Optional)

UID UID (Unit Identication) switch

(BP) USB 0/1 (2.0) Backpanel USB 2.0 ports 0/1

(FP) USB 2/3 (2.0) Front accessible USB 2.0 connections (USB 2/3) header

(BP) USB 4/5 (3.0) Backpanel USB 3.0 ports 4/5

(FP) USB 7/8 (3.0) Front accessible USB 3.0 connections (USB 7/8) header

(FP) USB 6 (3.0) Front accessible Type A 3.0 connector (USB6)

VGA Backpanel VGA port

X10DRH-C/CT/i/iT LED Indicators

LED Description State Status

DS13 (X10DRH-C/CT) SAS Heartbeat LED Green: Blinking SAS Normal

LE1 Rear UID LED Blue: On Unit Identied

LE2 Onboard PWR LED On Power On

LEDM1 BMC Heartbeat LED Green: Blinking BMC Normal

LEDS5 (X10DRH-C/CT) SAS Activity LED Green: Blinking SAS Active

LEDS6 (X10DRH-C/CT) SAS Fault LED Red: On

SAS Error(s)
Detected

Chapter 1: Overview

1-7

Motherboard Features

CPU

• Dual Intel® E5-2600 v3 Series processors (Socket

R3-LGA 2011); each processor supports dual full-

width Intel QuickPath Interconnect (QPI) links (of up

to 9.6 GT/s one direction per QPI)

Note: Both CPUs need to be installed for full

access to the PCI-E slots, DIMM slots, and on-

board controllers. Refer to the block diagram on

page 1-10 to determine which slots or devices

may be affected.

Memory

• Integrated memory controller supports up to 1024 GB

of Load Reduced (LRDIMM) or 512 GB of Registered

(RDIMM) DDR4 (288-pin) ECC 2133/1866/1600 MHz

modules in 16 slots

Note 1: Memory speed support depends on the

processors used in the system.

Note 2: For the latest CPU/memory updates,

please refer to our website at http://www.super-

micro.com/products/motherboard.

DIMM Sizes

• DIMM Up to 64GB at 1.2V

Chipset

• Intel® PCH C612

Expansion

• Six (6) PCI Express 3.0 x8 slots (CPU1 Slot1-Slot3,

CPU2 Slot5-Slot7)

• One (1) PCI-Express 3.0 x16 slot (CPU2 Slot4)

Slots

Graphics

• Graphics controller via ASpeed 2400 BMC

Network

• Intel® i350 Gigabit (10/100/1000 Mb/s) Ethernet Con-

troller for LAN 1/LAN 2 ports (X10DRH-C/i)

• Intel® X540 10-Gigabit (T) Ethernet Controller for

LAN 1/LAN 2 ports (X10DRH-CT/iT)

• ASpeed AST 2400 Baseboard Controller (BMC) sup-

ports IPMI 2.0

I/O Devices

SATA/SAS Connections

• SATA 3.0 Six (6) SATA 3.0 ports supported

by Intel PCH (I-SATA 0-5)

One (1) SATA 3.0 vertical con-

nector with 4 connections sup-

ported by the SCU (S-SATA,

JS39)

1-8

X10DRH-C/CT/i/iT Motherboard User’s Manual

• RAID (PCH) RAID 0, 1, 10, 5

• SAS 3.0

(X10DRH-C/

CT Only)

Eight (8) SAS/SATA 3.0 connec-

tions (SAS 0-3, 4-7)

• RAID

(LSI3108)

(X10DRH-C/

CT Only)

RAID 0, 1, 5, 6, 10, 50, 60 Hard-

ware RAID + 2GB cache from

the LSI 3108 SAS controller

with optional CacheVault sup-

port (See pages 2-16, 2-17 for

more info.)

IPMI 2.0

• IPMI 2.0 supported by ASpeed AST 2400

Serial (COM) Port

• One (1) Fast UART 16550 port on the I/O back panel

• One (1) serial-port header

Peripheral
Devices

USB Devices

• Two (2) USB 2.0 ports on the rear I/O panel (USB 0/1)

• Two (2) USB 3.0 ports on the rear I/O panel (USB 4/5)

• One (1) internal USB 2.0 header for two (2) USB 2.0

connections for front-panel support (USB 2/3)

• One (1) type-A USB 3.0 connector for front access

(USB6)

• One (1) internal USB 3.0 header for two (2) USB 3.0

connections for front panel support (USB 7/8)

BIOS

• 16 MB SPI AMI BIOS

®

SM Flash UEFI BIOS

• ACPI 2.0/3.0/4.0, USB keyboard, Plug-and-Play

(PnP), SPI dual/quad speed support, RTC (Real-

Time Clock) Wake-Up, and SMBIOS 2.3

Power

• ACPI Power Management

Management

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 3.0 (avail-

able when the Supermicro Power Manager [SPM] is

installed and a special power supply is used. See the

note on Page 1-14.)

• Management Engine (ME)

Chapter 1: Overview

1-9

System
Health

System Health/CPU Monitoring

Monitoring

• Onboard voltage monitoring for 1.2V +3.3V, 3.3V

standby, +5V, +5V standby, +12V, CPU core, mem-

ory, chipset, BMC, PCH, and battery voltages

• CPU/system overheat LED and control

• CPU Thermal Trip support

• Status monitor for speed control

• Status monitor for on/off control

• CPU Thermal Design Power (TDP) support of up to

145W (See Note 1 below.)

Fan Control

• Fan status monitoring via IPMI connections

• Dual cooling zone

• Low-noise fan speed control

• Pulse Width Modulation (PWM) fan control

System
Management

• PECI (Platform Environment Control Interface) 2.0

support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5, Watch Dog, NMI

• Chassis intrusion header and detection

Dimensions

• 12.00" (L) x 13.00" (W) (304.80 mm x 330.20 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to

chassis and heatsink cooling restrictions. For proper thermal management,

please check the chassis and heatsink specications for proper CPU TDP

sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded

IPMI Conguration User's Guide available at http://www.supermicro.com/

support/manuals/.

Note 3: It is strongly recommended that you change BMC log-in informa-

tion upon initial system power-on. The manufacture default username is

ADMIN and the password is ADMIN. For proper BMC conguration, please

refer to http://www.supermicro.com/products/info/les/IPMI/Best_Practices_

BMC_Security.pdf

1-10

X10DRH-C/CT/i/iT Motherboard User’s Manual

System Block Diagram

Note 1: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features pages

for the actual specications of each motherboard.

Note 2: Both CPUs need to be installed for full access to the PCI-E slots,

DIMM slots, and onboard controllers. Refer to the block diagram above to

determine which slots or devices may be affected.

SPI

LAN3

RGRMII

Debug Card

FRONT PANEL

SYSTEM POWER

CTRL

FAN SPEED

PCI-E X1 G2

USB 2.0

X10DRH-C/i (T)

PCH 612

6.0 Gb/S

USB 2.0

LPC

#1

#0

#5

#4

RTL8211E-VB-CG

#3

#2

RJ45

BIOS

SPI

SPI

Temp Sensor

EMC1402-1 *2 at diff SMBUS

TPM HEADER

USB 3.0

BIOS
HEADER

SPI

AST2400

BMC

RMII/NCSI

COM1
Connector

COM2
Header

VGA CONN

BMC Boot Flash

DDR3

5 PHASE
145W

P1

P1

P0

VR12.5

P0

QPI

9.6G

2 x PCI-E X8 G3 (LAN REVERSE)

2IMD2IMD

CPU1 CPU2

QPI

9.6G

5 PHASE
145W

VR12.5

X540/I350

LAN1,2

PCI-E X8 G2

SLOT 4

SLOT 5

PCI-E X16

PCI-E X8

SLOT 6

PCI-E X8

PCI-E X8 G3

2 x PCI-E X8 G3

PCI-E X16 G3

#1 #2 #3#1 #3

#1-8

#2-8

#6

#7

#8

#9

VCCP1 12v

PVCCIO
(1.05/0.95)
from 3.3v

PCI-E X8

SLOT 7

LSI

3108

PCI-E X8 G3

PCI-E X8

#2

SLOT 1

PCI-E X8

SLOT 2

PCI-E X8

SLOT 3

PCI-E X8 G3 (LAN REVERSE)

USB 0/1, 2/3

USB 4/5, 6, 7/8

I-SATA 0,1,2,3

S-SATA 7,8,9,10

SATADOM 5,6

#1-7

#1-6

#1-5

#1-4

#1-3

#1-2

1333/2133

DDR4

#1-1

#2-7

#2-6

#2-5

#2-4

#2-3

#2-2

1333/2133

#2-1

DDR4

SATAUSB2USB3

Chapter 1: Overview

1-11

1-2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel E5-2600 v3 Series processors

(Socket R3) and the Intel C612 PCH, the X10DRH-C/CT/i/iT motherboard provides

system performance, power efciency, and feature sets to address the needs of

next-generation computer users.

With support of the new Intel microarchitecture 22nm process technology, the
X10DRH-C/CT/i/iT drastically increases system performance for a multitude of

server applications.

The PCH C612 chip provides Enterprise SMbus support, including the following

features:

•DDR4 288-pin memory support on Socket R3

•Support for MCTP Protocol

•Support for Management Engine (ME)

•Support of SMBus speeds of up to 400KHz for BMC connectivity

•Improved I/O capabilities to high-storage-capacity congurations

•SPI enhancements

•Intel® Node Manager 3.0 for advanced power monitoring, capping, and man-

agement for BMC enhancement

•The BMC supports remote management, virtualization, and the security pack-

age for enterprise platforms

Note: Node Manager 3.0 support is dependent on the power supply used

in the system.

1-12

X10DRH-C/CT/i/iT Motherboard User’s Manual

1-3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will

respond when AC power is lost and then restored to the system. You can choose

for the system to remain powered off (in which case you must press the power

switch to turn it back on) or for it to automatically return to the power-on state. See

the Advanced BIOS Setup section for this setting. The default setting is Last State.

1-4 System Health Monitoring

This section describes the features of system health monitoring of the motherboard.

This motherboard has an onboard Baseboard Management Controller (BMC) that

supports system health monitoring. An onboard voltage monitor will scan the follow-

ing onboard voltages continuously: 1.2V, +3.3V, 3.3V standby, +5V, +5V standby,

+12V, CPU core, memory, chipset, BMC, PCH, and battery voltages. Once a voltage

becomes unstable, a warning is given or an error message is sent to the screen. The

user can adjust the voltage thresholds to dene the sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

System health monitoring support provided by the BMC controller can check the

RPM status of a cooling fan. The onboard CPU and chassis fans are controlled by

IPMI Thermal Management.

Environmental Temperature Control

System health sensors in the BMC monitors temperatures and voltage settings of

onboard processors and the system in real time via the IPMI interface. Whenever

the temperature of the CPU or the system exceeds a user-dened threshold, system/

CPU cooling fans will be turned on to prevent the CPU or system from overheating.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5. SuperDoctor 5 is used

to notify the user of certain system events. For example, you can congure

SuperDoctor 5 to warn you when the system temperature, CPU temperatures,

voltages, or fan speeds go beyond a predened range.

Chapter 1: Overview

1-13

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI speci-

cation denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a system, including its

hardware, operating system, and application software. This enables the system to

automatically turn on and off peripherals such as network cards, hard-disk drives,

and printers.

In addition to power management directed by the operating system, the ACPI also

provides a generic system event mechanism for Plug-and-Play and an interface

(independent of the operating system) for conguration control. ACPI leverages

the Plug-and-Play BIOS data structures, while providing an implementation that is

independent of the processor architecture and compatible with Windows 8/R2 and

Windows 2012/R2 Operating Systems.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. This is even more important for processors that have high CPU

clock rates.

The X10DRH-C/CT/i/iT motherboard accommodates 24-pin ATX power supplies.

Although most power supplies generally meet the specications required by the

CPU, some are inadequate. In addition, two 12V 8-pin power connections are also

required to ensure adequate power supply to the system.

Warning! To avoid damaging the power supply or the motherboard, be sure to use

a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to

connect the power supply to the 24-pin power connector (J24) and two 8-pin power

connectors (JPWR1, JPWR2) on the motherboard. Failure to do so may void the

manufacturer warranty on your power supply and motherboard.

It is strongly recommended that you use a high-quality power supply that meets

the ATX power supply specication 2.02 or above. It must also be SSI-compliant.

(For more information, please refer to the website at http://www.ssiforum.org/.) Ad-

ditionally, in areas where noisy power transmission is present, you may choose to

install a line lter to shield the computer from noise. It is recommended that you

also install a power surge protector to help avoid problems caused by power surges.

1-14

X10DRH-C/CT/i/iT Motherboard User’s Manual

1-7 Advanced Power Management

The following new advanced power management features are supported by this

motherboard:

Intel® Intelligent Power Node Manager (NM) (Available
when the Supermicro Power Manager [SPM] is installed)

The Intel® Intelligent Power Node Manager 3.0 (IPNM) provides your system with

real-time thermal control and power management for maximum energy efciency.

Although IPNM Specication Version 2.0/3.0 is supported by the BMC (Baseboard

Management Controller), your system must also have IPNM-compatible Manage-

ment Engine (ME) rmware installed to use this feature.

Note: Support for IPNM Specication Version 2.0 or Version 3.0 is depen-

dent on the power supply used in the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the PCH, pro-

vides Server Platform Services (SPS) to your system. The services provided by

SPS are different from those provided by the ME on client platforms.

Chapter 2: Installation

2-1

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user

of situations which have the potential for bodily injury. Should you have questions or

experience difculty, contact Supermicro's Technical Support Department for assis-

tance. Only certied technicians should attempt to install or congure components.

Read this section in its entirety before installing or conguring components in the

Supermicro chassis.

Battery Handling

Warnung

Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.

Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the

battery only with the same or an equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer's instructions.

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメー
カーが推奨する型、または同等のものを使用下さい。 使用済電池は製造元の指示に従
って処分して下さい。

警告

电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更

换原有电池。请按制造商的说明处理废旧电池。

警告

電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有

電池。請按照製造商的說明指示處理廢棄舊電池。

2-2

X10DRH-C/CT/i/iT Motherboard User’s Manual

Attention

Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.

Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!

Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-

dado por el fabricante. Desechar las baterías gastadas según las instrucciones

del fabricante.

!הרהזא

תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי

גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.

תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל





경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing

Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-

bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften

afgevoerd te worden.

Chapter 2: Installation

2-3

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws

and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が

ありま す 。

警告
本产品的废弃处理应根据所有国家的法律和规章进行。

警告
本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung

Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.

¡Advertencia!

Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.

Attention

La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de

l'organisme compétent.

רצומה קוליס

!הרהזא

ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח

2-4

X10DRH-C/CT/i/iT Motherboard User’s Manual

2-2 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your system board, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

•Use a grounded wrist strap designed to prevent static discharge.

•Touch a grounded metal object before removing the board from the antistatic

bag.

•Handle the motherboard by its edges only; do not touch its components, periph-

eral chips, memory modules, or gold contacts.

•When handling chips or modules, avoid touching their pins.

•Put the motherboard and peripherals back into their antistatic bags when not

in use.

•For grounding purposes, make sure that your system chassis provides excel-

lent conductivity between the power supply, case, mounting fasteners, and the

motherboard.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When

unpacking the motherboard, make sure that the person handling it is static-

protected.

Waarschuwing

De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

 

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Chapter 2: Installation

2-5

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRH-C/i(T)

Rev. 1.00

2-3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all mounting holes for both motherboard and chassis

match. Although a chassis may have both plastic and metal mounting fasteners,

metal ones are recommended because they ground the motherboard to the chas-

sis. Make sure that the metal standoffs click in or are screwed in tightly. Then use

a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

•Phillips screwdriver

•Panhead screws (9 pieces)

•Standoffs (9 pieces, if needed)

Location of Mounting Holes

There are nine (9) mounting holes on this motherboard as indicated by the arrows.

Caution: 1) To avoid damaging the motherboard and its components, do not use a

force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please use caution to

prevent damage to these components when installing the motherboard to the chassis.

2-6

X10DRH-C/CT/i/iT Motherboard User’s Manual

Installing the Motherboard

Note: Always connect the power cord last, and always remove it before

adding, removing, or changing any hardware components.

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis if needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother-

board components.

6. Using the Phillips screwdriver, insert a panhead #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo-

nents might look different from those shown in this manual.

Chapter 2: Installation

2-7

2-4 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the

label area. Also, improper CPU installation and socket/pin misalignment may cause

serious damage to the CPU or the motherboard that will require RMA repairs. Be sure

to read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

Always connect the power cord last, and always remove it before adding,

removing, or changing any hardware components. Make sure that you in-

stall the processor into the CPU socket before you install the CPU heatsink.

If you buy a CPU separately, make sure that you use an Intel-certied

multidirectional heatsink only.

Make sure to install the motherboard into the chassis before you install

the CPU heatsink.

If you receive a motherboard without a processor preinstalled, make sure

that the plastic CPU socket cap is in place and that none of the socket

pins are bent; otherwise, contact your retailer immediately.

Refer to the Supermicro website for updates on CPU support.

Installing the LGA2011 Processor

1. There are two load levers on the LGA2011 socket. To open the socket cover,

rst press and release the load lever labeled "Open 1st."

Note: All graphics, drawings, and pictures shown in this manual are for

illustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

Press down on

load lever labeled

"Open 1st"

1 2

OPEN 1st

OPEN 1st

2-8

X10DRH-C/CT/i/iT Motherboard User’s Manual

OPEN 1st

Gently push
down to pop the
load plate open

2. Press the second load lever labeled "Close 1st" to release the load plate that

covers the CPU socket from its locking position.

3. With the lever labeled "Close 1st" fully retracted, gently push down on the

lever labeled "Open 1st" to open the load plate. Lift the load plate to open it

completely.

1

2

Press down on

load

lever "Close 1st"

Pull lever away from
socket

2

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

OPEN 1st

OPEN 1st

1

Chapter 2: Installation

2-9

4. Use your thumb and index nger to loosen the lever and open the load plate.

5. Using your thumb and index nger, hold the CPU by its edges. Align the CPU

keys, which are semicircle notches, against the socket keys.

6. Once they are aligned, carefully lower the CPU straight down into the socket.

Do not drop the CPU on the socket or move the CPU horizontally or vertically.

Do not rub the CPU against the surface or against any of the socket pins to

avoid damaging the CPU or the socket.

Socket Keys

CPU Keys

Warning: You can only install the CPU

inside the socket in one direction. Make

sure that it is properly inserted into the

CPU socket before closing the load

plate. If it doesn't close properly, do not

force it as this may damage your CPU.

Instead, open the load plate again to

make sure that the CPU is aligned

properly.

2-10

X10DRH-C/CT/i/iT Motherboard User’s Manual

OPEN 1st

7. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

Lever Lock

Lever Lock

Push down and

lock the lever

labeled "Open

1st"

Push down and lock the
lever labeled "Close 1st"

Gently close

the load plate

1 2

3

4

OPEN 1st

OPEN 1st

8. Close the load plate with the CPU inside the socket. Lock the lever labeled

"Close 1st" rst, then lock the lever labeled "Open 1st" second. Using your

thumb, gently push the load levers down to the lever locks.

Chapter 2: Installation

2-11

Note: For optimal airow, please follow your chassis airow direction

to correctly install the CPU heatsink. Graphic drawings included in this

manual are for reference only. They might look different from the compo-

nents installed in your system.

OPEN 1st

Screw#1

Screw#2

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the motherboard and the heatsink bracket underneath.

3. Screw in two diagonal screws (e.g., the #1 and the #2 screws) until just snug.

Do not over-tighten the screws to avoid damaging the CPU and the mother-

board.

4. Finish the installation by fully tightening all four screws.

Mounting Holes

Direction of the

airow

2-12

X10DRH-C/CT/i/iT Motherboard User’s Manual

Removing the CPU and the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the CPU or the heatsink, please follow the instructions below

to uninstall the heatsink to avoid damaging the CPU or the motherboard.

1. Unscrew the heatsink screws from the motherboard in the sequence as

shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. Do not use excessive

force when loosening the heatsink!

3. Once the heatsink is loosened from the socket, remove the heatsink from the

CPU socket. Once the heatsink is removed, remove the CPU from the socket

as needed.

4. Remove the used thermal grease and clean the surface of the CPU and the

heatsink. Reapply the proper amount of thermal grease on the surface before

reinstalling the CPU and the heatsink as needed.

Loosen screws
in the sequence
as shown

Screw#2

Motherboard

Screw#1

Screw#3

Screw#4

Notes: 1.) For optimized airow, please follow your chassis airow direc-

tion to properly install the heatsink. 2.) Graphics shown in this manual are

for reference only. They may or may not look the same as the components

installed in your system.

Direction of the

airow

Chapter 2: Installation

2-13

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRH-C/i(T)

Rev. 1.00

Release Tabs

Notches

2-5 Installing and Removing the Memory Modules

Note: Check Supermicro's website for a list of recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM modules

to avoid damaging the DIMM modules or the motherboard.

Installing & Removing DIMMs

1. Insert the desired number of DIMMs into the memory slots, starting with P1-

DIMMA1. For best performance, please use DIMM modules of the same type

and speed in the same bank.

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

Removing Memory Modules

Press both release tabs on the ends of the DIMM to unlock it. Once the DIMM is

loosened, remove it from the memory slot.

3. Align the key of the DIMM module with the receptive point on the memory

slot.

4. Align the notches on both ends of the module against the receptive points at

each side of the slot.

5. With your thumbs, press the notches on both ends of the module straight

down into the slot until the module snaps into place.

6. Press the release tabs to their locking positions to secure the DIMM into the

slot.

Press both notches straight

down into the memory slot at

the same time.

2-14

X10DRH-C/CT/i/iT Motherboard User’s Manual

Memory Support for the X10DRH-C/CT/i/iT Motherboard

The X10DRH-C/CT/i/iT motherboard supports up to 1024 GB of Load Reduced

(LRDIMM) or 512 GB of Registered (RDIMM) DDR4 (288-pin) ECC 2133/1866 MHz

modules in 16 slots. Memory speed support depends on the CPUs installed in the

motherboard. For the latest memory updates, please refer to our website at http://

www.supermicro.com/products/motherboard.

Processor & Memory Module Population Conguration

For the memory to work properly, follow the tables below for memory installation.

Processors and their Corresponding Memory Modules

CPU# Corresponding DIMM Modules

CPU 1 P1-

DIMMA1

P1­DIMMB1

P1­DIMMC1

P1­DIMMD1

P1­DIMMA2

P1­DIMMB2

P1­DIMMC2

P1­DIMMD2

CPU2 P2-

DIMME1

P2­DIMMF1

P2­DIMMG1

P2­DIMMH1

P2­DIMME2

P2­DIMM F2

P2­DIMMG2

P2­DIMMH2

Processor and Memory Module Population for Optimal Performance

Number of

CPUs+DIMMs

CPU and Memory Population Conguration Table

(For memory to work properly, please follow this table.)

1 CPU &
2 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1

1 CPU &
4 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1, P1-DIMMC1/P1-DIMMD1

1 CPU &

6~8 DIMMs

CPU1
P1-DIMMA1/P1-DIMMB1, P1-DIMMC1/P1-DIMMD1 + any pair of P1-DIMMA2/P1­DIMMB2/P1-DIMMC2/P1-DIMMD2 slots

2 CPUs &

4 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1, P2-DIMME1/P2-DIMMF1

2 CPUs &

6 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1

2 CPUs &

8 DIMMs

CPU1 + CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2­DIMMG1/P2-DIMMH1

2 CPUs &

10~16 DIMMs

CPU1/CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2­DIMMG1/P2-DIMMH1 + any pair of P1, P2 DIMM slots

2 CPUs &

16 DIMMs

CPU1/CPU2
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1, P2-DIMME1/P2-DIMMF1/P2-DIM­MG1/P2-DIMMH1,P1-DIMMA2/P1-DIMMB2/P1-DIMMC2/P1-DIMMD2, P2-DIMME2/
P2-DIMMF2/P2-DIMMG2/P2-DIMMH2

Chapter 2: Installation

2-15

Type

Ranks Per
DIMM

and

Data

Width

DIMM

Capacity (GB)

Speed (MT/s); Voltage (V);

Slot Per Channel (SPC) and DIMM Per Channel (DPC)

1 Slot Per

Channel

2 Slots Per Channel

3 Slots Per Channel

1DPC 1DPC 2DPC

1DPC

2DPC

3DPC

4Gb

8Gb

1.2V 1.2V 1.2V

1.2V 1.2V 1.2V

RDIMM SRx4 8GB 16GB

2133 2133 1866

2133 1866 1600

RDIMM SRx8 4GB 8GB

2133 2133 1866

2133 1866 1600

RDIMM DRx8 8GB 16GB

2133 2133 1866

2133 1866 1600

RDIMM DRx4 16GB 32GB

2133 2133 1866

2133

1866 1600

LRDIMM QRx4 32GB 64GB

2133 2133 2133

2133 2133 1600

DDR4 Memory POR for Haswell-EP

Speed (MT/s)
Voltage (V)

Populating RDIMM/LRDIMM ECC Memory Modules

2-16

X10DRH-C/CT/i/iT Motherboard User’s Manual

2-6 Onboard 3108 SAS Controller with Optional
CacheVault Support (Optional for X10DRH-C/CT)

A CacheVault header, marked as 'TFM' on the X10DRH-C/CT motherboard layout,

supports the Supermicro 3108 CacheVault kit. Please purchase an optional 3108

CacheVault kit from Supermicro and connect it to the onboard CacheVault (TFM)

header (as shown in the layout below) to help enhance system performance and

data protection during a power outage.

#3: L3-000099-00 Cable
(23" Cable Extender)

CacheVault Connector
(-wide projectile)

The 3108 CacheVault Kit (Optional)

The 3108 CacheVault kit contains the following:

1. One (1) CVFM04 (8GB CacheVault Flash Module)

2. One (1) CVPM02 (CacheVault Power Module)

3. One (1) L3-000099-00 (23" Cable Extender)

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

CacheVault

Connector

#2: CVPM02 (CacheVault
Power Module)

#1: CVFM04 (CacheVault
Flash Module)

#1: CVFM04 (CacheVault Flash
Module)-Reverse Side (to
attach to the CacheValut/TFM
header on the motherboard)

#1: CVFM04 (CacheVault
Flash Module)-Front Side
(to attach to the narrow
end of the L3-000099 Cable
Expender)

#2: CVPM02 (CacheVault
Power Module)

The 3108 CacheVault Kit

Chapter 2: Installation

2-17

Installing the 3108 CacheVault Kit

1. Connect the narrow connector (#1) on one end of the L3-000099-00 Cable

Expender to the CacheVault/TFM connector (#2) on the front side of the

CacheVault Flash Module as shown on the rst two pictures below.

2. Connect the wide CacheVault/TFM connector (#3) on the L3-00099-00 Cable

Expender to the CacheVault connector (#4) on the end of the cable attached

to the Power Module as shown on the third picture above.

3. Connect the CacheVault/TFM connector located on the reverse side of the

Flash Module to the CacheVault/TFM header on the motherboard as shown

below.

#1 Narrow Connector

(on the Cable Expender)

#3. CacheValut

Connector (Wide) on
the Cable Expender (to
connector to the cable

of the PWR Module)

#4. CacheVault Connector

L3-000099-00 Cable

CacheVault/TFM Connector (on the
front side of the Flash Module)

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

CacheVault
(TFM) Header on
the motherboard

The Reverse Side

CacheVault Connector (on the
reverse side of the Flash Module)

CacheVault Flash Module

X10DRH-C(T) Motherboard

2-18

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

2-7 Control Panel Connectors and I/O Ports

The I/O ports are color-coded in conformance with the industry standards. See

the picture below for the colors and locations of the various I/O ports.

Back Panel Connectors and I/O Ports

Back Panel I/O Port Locations and Denitions

1. COM Port 1

2. Back Panel USB 2.0 Port 0

3. Back Panel USB 2.0 Port 1

4. IPMI-Dedicated LAN

5. Back Panel USB 3.0 Port 4

6. Back Panel USB 3.0 Port 5

7. Gigabit LAN 1 (X10DRH-C/i),

(10G) TLAN 1 (X10DRH-CT/iT)

8. Gigabit LAN 2 (X10DRH-C/i),
(10G) TLAN 2 (X10DRH-CT/iT)

9. Back Panel VGA (Blue)

10. UID Button/UID LED (LE1)

123

4

5

6

7

8

9

10

10

Chapter 2: Installation

2-19

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRH-C/i(T)

Rev. 1.00

Video Connection

A Video (VGA) port is located next to LAN2 on the I/O back panel. Refer to the

board layout below for its location.

1. COM1

2. COM2

3. VGA

Serial Ports

Two COM connections (COM1 and COM2) are located on the motherboard. COM1

is located on the I/O back panel. COM2, located next to CPU1 PCI-E Slot1, provides

front access support. Refer to the board layout below for its location.

COM1

COM2

COM1

COM2

2

1

2

1

3

2-20

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

1. Back Panel USB0 (USB2.0)

2. Back Panel USB1 (USB2.0)

3. Back Panel USB4 (USB3.0)

4. Back Panel USB5 (USB3.0)

5. Front Panel USB 2/3 (USB2.0)

6. Front Panel USB 7/8 (USB3.0)

7. Type-A USB 6 (USB3.0)

Universal Serial Bus (USB)

Two USB 2.0 ports (USB 0/1) and two

USB 3.0 ports (USB 4/5) are located

on the I/O back panel. In addition, an

internal USB 2.0 header and a USB

3.0 header provide support for two

USB 2.0 ports (USB 2/3) and two

USB 3.0 ports (USB 7/8) in the front.

A Type-A connector is also located on

the motherboard to provide front-pan-

el USB 3.0 support (USB 6). (Cables

are not included.) See the tables on

the right and below for pin denitions.

1

2

3

4

5

6

7

Back Panel USB 0/1 (2.0)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 5 +5V

2 USB_PN1 6 USB_PN0

3 USB_PP1 7 USB_PP0

4 Ground 8 Ground

Front Panel USB 2/3 (2.0)

Pin Denitions

Pin # Denition Pin # Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 Ground

Back Panel USB 4/5 (3.0), Front Panel

USB 7/8 (3.0), Type A USB 6 (3.0)

Pin Denitions

P i n # Description

1 VBUS

2 SSRX-

3 SSRX+

4 Ground

5 SSTX-

6 SSTX+

7 GND_DRAIN

8 D-

9 D+

Chapter 2: Installation

2-21

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRH-C/i(T)

Rev. 1.00

1. GLAN1 (X10DRH-C/i)

10GLAN1 (X10DRH-CT/iT)

2. GLAN2 (X10DRH-C/i)

10GLAN2 (X10DRH-CT/iT)

3. IPMI LAN

Ethernet Ports

Two Gigabit Ethernet ports (LAN1 and LAN2) are located on the I/O back panel on

the motherboard. These Ethernet ports support 1GbE LANs on the X10DRH-C/i

and 10GbE LANs on the X10DRH-CT/iT. In addition, an IPMI-dedicated LAN is

located above USB 0/1 ports on the back panel. All of these ports accept RJ45

cables. Please refer to the LED Indicator section for LAN LED information.

1

2

3

2-22

X10DRH-C/CT/i/iT Motherboard User’s Manual

BIOS
LICENSE

MAC CODE

BAR CODE

X10DRH-C/i(T)

Rev. 1.00

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

1. UID Switch

2. Rear UID LED

3. Front UID LED (on pin 7 of JF1)

4. Front UID Switch (on pin 13 of JF1)

3

1

2

Unit Identier Switches/UID LED

Indicators

A rear Unit Identier (UID) switch and a

rear UID LED (LE1) are located next to the

VGA port on the motherboard. The front UID

switch and the UID LED are both located on

the front panel control (JF1), with the front

UID switch on pin 13 of JF1 and the front

LED on pin 7. When you press either the

front or rear UID switch, both front and rear

UID LEDs will be turned on. Press the UID

switch again to turn off the LED indicators.

The UID indicators provide easy identica-

tion of a system unit that may be in need

of service.

Note: UID can also be triggered via

IPMI on the motherboard. For more

information on IPMI, please refer

to the IPMI user's guide posted on

our website @ http://www.super-

micro.com.

UID Switch

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Ground

UID LED

Status

Color/State Status

Blue: On Unit Identied

4

1

Chapter 2: Installation

2-23

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo-

cated on a control panel at the front of the chassis. These connectors are designed

specically for use with Supermicro's server chassis. See the gure below for the

descriptions of the various control panel buttons and LED indicators. Refer to the

following section for descriptions and pin denitions.

JF1 Header Pins

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

2-24

X10DRH-C/CT/i/iT Motherboard User’s Manual

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

Front Control Panel Pin Denitions

A. NMI

B. PWR LED

A

B

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Chapter 2: Installation

2-25

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

B

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control-

ler) LED connection for LAN port 1 is

located on pins 11 and 12 of JF1, and

the LED connection for LAN port 2 is

on pins 9 and 10. Attach the NIC LED

cables here to display network activity.

Refer to the table on the right for pin

denitions.

HDD/UID LED

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach a

cable to pin 14 to show the HDD activ-

ity status. Attach a cable to pin 13 to

use the UID switch. See the table on

the right for pin denitions.

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 UID Switch

14 HD Active

C

A. HDD/UUID Switch

B. NIC1 LED

C. NIC2 LED

A

GLAN1/2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

10 NIC 2 Link LED

11 NIC 1 Activity LED

12 NIC 1 Link LED

2-26

X10DRH-C/CT/i/iT Motherboard User’s Manual

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

denitions.

A. OH/Fail/PWR Fail LED

B. PWR Supply Fail

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

B

A

Overheat (OH)/Fan Fail/PWR Fail/
UID LED

Connect an LED cable to pins 7 and

8 of the front control panel to use the

Overheat/Fan Fail/Power Fail and

UID LED connections. The red LED

on pin 8 provides warnings of over-

heat, fan failure, or power failure. The

blue LED on pin 7 works as the front-

panel UID LED indicator. Refer to the

table on the right for pin denitions.

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Denitions (JF1)

Pin# Denition

7 Blue UID LED

8 OH/Fan Fail/Power Fail

OH/Fan Fail/PWR Fail

LED Status (Red LED)

State Denition

Off Normal

On Overheat

Flashing Fan Fail

Chapter 2: Installation

2-27

1

2

Ground

19

20

NMI

X

X

FP PWRLED

3.3 V

HDD LED

UID Switch

NIC1 Link LED

NIC1 Activity LED

NIC2 Link LED

NIC2 Activity LED

UID LED

OH/Fan Fail/
PWR Fail LED)

Power Fail LED

3.3V

Reset Button

Power Button

Ground

Ground

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Power Button

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. To turn on or off the system

power, press the button for 4 seconds or

longer. Refer to the table on the right for

pin denitions.

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case to support system reset. Refer to

the table on the right for pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

A. Reset Button

B. PWR Button

A

B

2-28

X10DRH-C/CT/i/iT Motherboard User’s Manual

Warning: To provide adequate power supply

to the motherboard, be sure to connect the

24-pin ATX PWR (J24) and the two 8-pin

PWR connectors (JPWR1, JPWR2) to the

power supply. Failure to do so may void the

manufacturer warranty on your power supply

and motherboard.

2-8 Connecting Cables

Power Connectors

A 24-pin main power supply connector

(J24) and two 8-pin CPU power connec-

tors (JPWR1/ JPWR2) are located on the

motherboard. These power connectors

meet the SSI EPS 12V specication and

must be connected to your power supply

to provide adequate power to the system.

See the tables on the right for pin deni-

tions.

A. J24: 24-Pin ATX PWR

(required)

B. JPWR1: 8-Pin Proces-

sor PWR (required)

C. JPWR2: 8-Pin Proces-

sor PWR (required)

A

B

C

ATX Power 24-pin Connector

Pin Denitions (JPW1)

Pin# Denition Pin # Denition

13 +3.3V 1 +3.3V

14 -12V (NC) 2 +3.3V

15 COM 3 COM

16 PS_ON 4 +5V

17 COM 5 COM

18 COM 6 +5V

19 COM 7 COM

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 COM 12 +3.3V

(Required)

12V 8-pin Power Connec-

tor Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Chapter 2: Installation

2-29

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Chassis Intrusion

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach an

appropriate cable from the chassis to

inform you of a chassis intrusion when

the chassis is opened.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

C

A. Fan 1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. Fan A

H. Fan B

I. Chassis Intrusion

D

E

F

Fan Headers

This motherboard has eight system/CPU

fan headers (Fans 1-6, Fan A, and Fan

B) on the motherboard. All these 4-pin

fans headers are backward-compatible

with the traditional 3-pin fans. However,

fan speed control is available for 4-pin

fans only by Thermal Management via

the IPMI 2.0 interface. See the table on

the right for pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground

2 +12V

3 Tachometer

4 PWR Modulation

A

B

H

G

I

2-30

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

B

A

A. Internal Speaker

(Buzzer)

B. Power LED

Internal Speaker

The Internal Speaker (SP1) can be used to

provide audible notications using various

beep codes. See the table on the right for pin

denitions. Refer to the layout below for the

location of the internal buzzer.

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm

Speaker

Power LED/Speaker

Pins 1-3 of JD1 are used for power LED

indication, and pins 4-7 are for the speaker.

Please note that the speaker connector pins

(4-7) are used with an external speaker. If you

wish to use the onboard speaker, you should

close pins 6-7 with a cap. See the tables on

the right for pin denitions.

Speaker Connector

Pin Settings

Pin Setting Denition

Pin 4 P5V

Pin 5 Key

Pin 6 R_SPKPIN_N

Pin 7 R_SPKPIN

PWR LED Connector

Pin Denitions

Pin Setting Denition

Pin 1 JD1_PIN1

Pin 2 FP_PWR_LED

Pin 3 FP_PWR_LED

Chapter 2: Installation

2-31

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A

A. TPM/Port 80 Header

TPM/Port 80 Header

A Trusted Platform Module (TPM)/

Port 80 header is located at JTPM1

to provide TPM support and a Port

80 connection. Use this header to en-

hance system performance and data

security. See the table on the right for

pin denitions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 No Connection

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

11 LAD0 12 GND

13 No Connection 14 No Connection

15 +3V STBY 16 SERIRQ

17 GND 18 CLKRUN#

19 LPCPD# 20 No Connection

2-32

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A

A. JPI2C1

B. JIPMB1

Power SMB (I2C) Connector

The Power System Management Bus

(I2C) connector (JPI2C1) monitors

power supply, fan, and system tem-

peratures. See the table on the right

for pin denitions.

PWR SMB

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

IPMB

A System Management Bus header

for IPMI 2.0 is located at JIPMB1.

Connect the appropriate cable here

to use the IPMB I2C connection on

your system.

IPMB Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

B

Chapter 2: Installation

2-33

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

B

A. I-SGPIO1

B. I-SGPIO2

C. Standby PWR

I-SGPIO 1/2 Headers

Two SGPIO (Serial Link General

Purpose Input/Output) headers are lo-

cated on the motherboard. I-SGPIO1

supports onboard I-SATA 3.0 ports,

while I-SGPIO2 supports S-SATA con-

nections. See the table on the right for

pin denitions.

Note: NC= No Connection

I-SGPIO Headers

Pin Denitions

Pin# Denition Pin Denition

2 NC 1 NC

4 Ground 3 Data

6 Load 5 Ground

8 Clock 7 NC

C

Standby Power Header

The +5V Standby Power header is

located at JSTBY1 on the mother-

board. See the table on the right for

pin denitions. (You must also have a

card with a Standby Power connector

and a cable to use this feature.)

Standby PWR

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

I-SGPIO 0/1

I-SGPIO1 I-SATA 3.0 Ports 0-5 Supported

I-SGPIO2 S-SATA 3.0 Connections Supported

A

2-34

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

2-9 Jumper Settings

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers create

shorts between two pins to change the

function of the connector. Pin 1 is identied

with a square solder pad on the printed

circuit board. See the motherboard layout

pages for jumper locations.

Note: On two-pin jumpers,

"closed" means the jumper is on

the pins, and "open" means the

jumper is off them.

Connector

Pins

Jumper

Cap

Setting

Pin 1-2 short

3 2 1

3 2 1

LAN Enable/Disable

JPL1 enables or disables Gigabit LAN

ports 1/2 on the X10DRH-C/i and 10G-

LAN (TLAN) ports 1/2 on the X10DRH-

CT/iT. See the table on the right for jumper

settings. The default setting is Enabled.

LAN Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (default)

2-3 Disabled

A

A. GLAN1/2 Enable (X10DRH-

C/i)

A. 10G_LAN (TLAN) 1/2 En-

able (X10DRH-CT/iT)

Chapter 2: Installation

2-35

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

CMOS Clear

JBT1 is used to clear the CMOS. Instead of pins, this "jumper" consists of contact

pads to prevent accidental clearing of the CMOS. To clear the CMOS, use a metal

object such as a small screwdriver to touch both pads at the same time to short

the connection.

Note: Be sure to completely shut down the system, and then short JBT1

to clear the CMOS.

A

B

A. Clear CMOS

B. Watch Dog Enable

Watch Dog Enable/Disable

The Watch Dog (JWD1) is a system monitor

that will reboot the system when a software

application hangs. Close pins 1-2 to reset

the system if an application hangs. Close

pins 2-3 to generate a non-maskable inter-

rupt signal for the application that hangs.

See the table on the right for jumper set-

tings. The Watch Dog must also be enabled

in the BIOS.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset (default)

Pins 2-3 NMI

Open Disabled

2-36

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A. VGA Enabled

B. BMC Enabled

A

B

VGA Enable

Jumper JPG1 allows the user to enable

the onboard VGA connector. The default

setting is 1-2 to enable the connection.

See the table on the right for jumper

settings.

VGA Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

BMC Enable

Jumper JPB1 allows you to enable the

embedded ASpeed AST2400 Base-

board Management Controller (BMC)

to provide IPMI 2.0/KVM support on the

motherboard. See the table on the right

for jumper settings.

BMC Enable

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC Enable (Default)

Pins 2-3 Disabled

Chapter 2: Installation

2-37

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Manufacturer Mode Select

Close pin 2 and pin 3 of Jumper JPME2

to bypass SPI ash security and force the

system to operate in the manufacturer

mode, which will allow the user to ash

the system rmware from a host server

for system setting modications. See the

table on the right for jumper settings.

ME Mode Select

Jumper Settings

Jumper Setting Denition

1-2 Normal (Default)

2-3 Manufacture Mode

I2C Bus to PCI-Express Slots

Use Jumpers JI2C1 and JI2C2 to connect

the System Management Bus (I2C) to

PCI-Express slots to improve PCI per-

formance. These two jumpers should be

set at the same time. See the table on

the right for jumper settings.

I2C for PCI-E slots

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled (Default)

A

A. JI

2

C1

B. JI

2

C2

C. ME Select

B

C

2-38

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A. SAS Enabled

A

SAS Enable (X10DRH-C/CT only)

Jumper JPS1 allows the user to enable

the onboard SAS connections. The

default setting is 1-2 (enabled). See the

table on the right for jumper settings.

SAS Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

Chapter 2: Installation

2-39

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Link LED

2-10 Onboard LED Indicators

Activity LED

A. LAN1/2 LEDs

B. IPMI LAN LEDs

IPMI-Dedicated LAN LEDs

In addition to LAN 1 and LAN 2, an IPMI LAN

is also located on the I/O back panel. The

amber LED on the right indicates activity,

while the green LED on the left indicates

the speed of the connection. See the table

at right for more information.

Link LED

IPMI LAN

A

B

GLAN LEDs

Two LAN ports (LAN 1 and LAN 2) are locat-

ed on the IO back panel of the motherboard.

Each Ethernet LAN port has two LEDs. The

gre en LED indic ates ac tivity, while the other

Link LED may be green, amber, or off to

indicate the speed of the connection. See

the tables at right for more information.

LAN 1/LAN 2 Link LED (Left)

LED State

LED Color Denition

Off 10 Mbps, 100 Mbps, or No

Connection

Green 10 Gbps (X10DRH-CT/iT only)

Amber 1 Gbps

LAN 1/LAN 2 Activity LED (Right)

LED State

Color Status Denition

Green Flashing Active

Rear View (when facing the
rear side of the chassis)

A

B

Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color/State Denition

Link (Left) Green: Solid

Amber: Solid

100 Mbps
1 Gbps

Activity (Right) Amber: Blinking Active

2-40

X10DRH-C/CT/i/iT Motherboard User’s Manual

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

Note: Refer to Page 2-20 for information on the rear UID LED (LE1).

B

Onboard Power LED

The Onboard Power LED is located at

LE2 on the motherboard. When this LED

is on, the system is on. Be sure to turn

off the system and unplug the power

cord before removing or installing com-

ponents. See the tables at right for more

information.

Onboard PWR LED Indicator

LED States

LED Color Denition

Off System Off (PWR cable

not connected)

Green System On

A

A. PWR LED

B. BMC LED

BMC Heartbeat LED

A BMC Heartbeat LED is located at

LEDM1 on the motherboard. When

LEDM1 is blinking, the BMC is function-

ing normally. See the table at right for

more information.

BMC Heartbeat LED

States

Color/State Denition

Green:

Blinking

BMC: Normal

Chapter 2: Installation

2-41

SAS Activity LED

Status

Color/State Denition

Green:

Blinking

SAS: Active

SAS Activity LED (For X10DRH-C/CT)

The SAS Activity LED is located at

LEDS5 on the motherboard. When

LEDS5 is blinking, the SAS drive sup-

ported by the LSI 3108 controller is ac-

tive. See the table on the right for more

information.

SATA Fault LED

Status

Color/State Denition

Red: On SAS error(s)

detected

SAS Fault LED (For X10DRH-C/CT)

The SAS Fault LED is located at LEDS6

on the motherboard. When LEDS6 is

on, an error has occurred to the SAS

drive supported by the LSI 3108 control-

ler. See the table on the right for more

information.

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

B

A. SAS Activity

LED

B. SAS Fault

LED

A

2-42

X10DRH-C/CT/i/iT Motherboard User’s Manual

SAS Heartbeat LED

Status

Color/State Denition

Green:

Blinking

SAS: Normal

SAS Heartbeat LED (For X10DRH-C/

CT)

A SAS Heartbeat LED is located at DS13

on the motherboard. When DS13 is blink-

ing, the SAS is functioning normally. See

the table at right for more information.

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108
SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A. SAS Heart-

beat LED

A

Chapter 2: Installation

2-43

Note 2: For more information on the SATA HostRAID conguration, please

refer to the Intel SATA HostRAID user's guide posted on our website @

http://www.supermicro.com..

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A. I-SATA0

B. I-SATA1

C. I-SATA2

D. I-SATA3

E. I-SATA4

F. I-SATA5

G. S-SATA[0:3]

SATA 3.0 and S-SATA 3.0 Connections

Ten SATA 3.0 connections are located on the motherboard. Six SATA 3.0 ports

(I-SATA 0-5) are supported by the Intel PCH C612. A vertical S-SATA connector,

supported by the Intel SCU chip, offers four S-SATA 3.0 connections. These SATA

ports provide serial-link signal connections, which are faster than the connections

of Parallel ATA. See the table on the right for pin denitions.

Note 1: Supermicro SuperDOMs are yellow SATADOM connectors with

power pins built in and do not require separate external power cables.

These connectors are backward-compatible with non-Supermicro SATA-

DOMs that require an external power supply.

C

E

2-11 SATA/SAS Connections

F

A

G

B

D

2-44

X10DRH-C/CT/i/iT Motherboard User’s Manual

SAS Ports (X10DRH-C/CT Only)

Eight SAS ports, supported by the LSI 3108 SAS controller, are located at JS39

on the motherboard. SAS 0-3 and SAS 4-7 support RAID 0, 1, 5, 6, 10, 50, 60

(Hardware RAID + 2GB cache) from the LSI 3108 with optional CacheVault available

for system data protection. (Note below). See the layout below for the locations

of SAS connectors.

Note: Optional CacheVault can be purchased at Supermicro. Please visit

our website at www.supermicro.com for more information.

I-SATA5

I-SATA4

I-SATA0

I-SATA1

I-SATA2

I-SATA3

I-SGPIO1

I-SGPIO2

S-SATA

JS39

USB0/1

FAN6

FAN5

FANB

FANA

FAN3

FAN2

FAN1

JBT1

LEDM1

LE1

LEDS5

LEDS6

DS13

JIPMB1

SP1

J23

JPS7

JPG1

JBR1

JI2C2

JI2C1

JPME2

JPS1

JWD1

JTPM1

USB2/3

BIOS

BT1

JSTBY1

JL1

JOH1

JD1

JS1

JF1

JPWR2

JPWR1

JPI2C1

USB4/5

USB6

USB7/8

BIOS
LICENSE

MAC CODE

BAR CODE

(3.0)

(3.0)

(2.0)

TPM/PORT80

CPU1 SLOT1 PCI-E 3.0 X8

SAS4-7

COM2

CPU1 SLOT2 PCI-E 3.0 X8

CPU1 SLOT3 PCI-E 3.0 X8

CPU2 SLOT4 PCI-E 3.0 X16

CPU2 SLOT5 PCI-E 3.0 X8

CPU2 SLOT6 PCI-E 3.0 X8

UID

P1 DIMMC1

P1 DIMMC2

P2 DIMME1

P1 DIMMD1

P2 DIMME2

P1 DIMMD2

P2 DIMMF2

P2 DIMMF1

CPU1

P1 DIMMB2

P2 DIMMH2

P1 DIMMA2

P1 DIMMB1

P2 DIMMH1

P1 DIMMA1

P2 DIMMG2

VGA

P2 DIMMG1

LAN2

LAN1

(3.0)

IPMI_LAN

COM1

PWR I2C

CPU2 SLOT7 PCI-E 3.0 X8

FAN4

J24

X10DRH-C/i(T)

Rev. 1.00

JPB1JPL1

TFM

LE2

CPU2

SAS0-3

LSI 3108

SAS CTRL

PCH

BMC

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

Battery

LAN CTRL

A. SAS0-3

B. SAS4-7

A

B

3-1

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the "Technical Support

Procedures" and/or "Returning Merchandise for Service" section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing, or installing any

hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse.

3. Remove all add-on cards.

4. Install CPU 1 rst (making sure it is fully seated) and connect the front panel

connectors to the motherboard.

No Power

1. Make sure that ther are no short circuits between the motherboard and the

chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch, if available, on the power supply is properly

set.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3-2

X10DRH-C/CT/i/iT Motherboard User’s Manual

No Video

1. If the power is on but you have no video, remove all add-on cards and

cables.

2. Use the speaker to determine if any beep codes are present. Refer to Ap-

pendix A for details on beep codes.

System Boot Failure

If the system does not display POST or does not respond after the power is turned

on, check the following:

1. Check for any error beep from the motherboard speaker.

•If there is no error beep, try to turn on the system without DIMM modules in-

stalled. If there is still no error beep, try to turn on the system again with only

one processor installed in CPU Socket 1. If there is still no error beep, replace

the motherboard.

•If there are error beeps, clear the CMOS settings by unplugging the power cord

and contacting both pads on the CMOS Clear Jumper (JBT1). (Refer to the

Jumper section in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM mod-

ules. Make sure that system power is on and that memory error beeps are

activated.

3. Turn on the system with only one DIMM module installed. If the system

boots, check for bad DIMM modules or slots by following the Memory Errors

Troubleshooting procedure in this Chapter.

Losing the System’s Setup Conguration

1. Make sure that you are using a high-quality power supply. A poor-quality pow-

er supply may cause the system to lose the CMOS setup information. Refer

to the Connecting Cables section for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your

vendor for repairs.

3-3

Chapter 3: Troubleshooting

Memory Errors

When a no-memory beep code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that

the DIMMs are properly and fully installed. (For memory compatibility, refer to

the memory compatibility chart posted on our website @ http://www.supermi-

cro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recom-

mended that you use the same RAM type and speed for all DIMMs in the

system.

3. Make sure that you are using the correct type of Load Reduction (LRDIMM)/

Registered (RDIMM) ECC DDR4 DIMM modules recommended by the manu-

facturer.

4. Check for bad DIMM modules or slots by swapping a single module among

all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the

instructions given in Section 2-5 in Chapter 2.

6. Please follow the instructions given in the DIMM population tables listed in

Section 2-5 to install your memory modules.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the

following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have

the latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by test-

ing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website @ http:\\www.supermicro.

com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-

place the bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans

and CPU/system fans, etc., work properly. Check the hardware monitoring

3-4

X10DRH-C/CT/i/iT Motherboard User’s Manual

settings in the IPMI to make sure that the CPU and system temperatures are

within the normal range. Also check the front panel Overheat LED and make

sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate

power to the system. Make sure that all power connectors are connected.

Please refer to our website for more information on the minimum power

requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check

the following:

1. Source of installation: Make sure that the devices used for installation are

working properly, including boot devices such as CD/DVD and CD/DVD-ROM.

2. Cable connection: Check to make sure that all cables are connected and

working properly.

3. Using the minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use the minimum congura-

tion (but with a CPU and a memory module installed) to identify the trouble

areas. Refer to the steps listed in Section A above for proper troubleshooting

procedures.

4. Identifying bad components by isolating them: If necessary, remove a compo-

nent in question from the chassis, and test it in isolation to make sure that it

works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several

items at the same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to

see if the system will work properly. If so, then the old component is bad.

You can also install the component in question in another system. If the new

system works, the component is good and the old system has problems.

3-5

Chapter 3: Troubleshooting

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please

note that as a motherboard manufacturer, Supermicro also sells motherboards

through its channels, so it is best to rst check with your distributor or reseller for

troubleshooting services. They should know of any possible problems with the

specic system conguration that was sold to you.

1. Please go through the Troubleshooting Procedures and Frequently Asked

Questions (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.

com).

3. If you still cannot resolve the problem, include the following information when

contacting Supermicro for technical support:

•Motherboard model and PCB revision number

•BIOS release date/version (This can be seen on the initial display when your

system rst boots up.)

•System conguration

4. An example of a Technical Support form is on our website at http://www.

supermicro.com/RmaForm/.

•Distributors: For immediate assistance, please have your account number ready

when placing a call to our Technical Support department. We can be reached

by email at [e-mail].

3-6

X10DRH-C/CT/i/iT Motherboard User’s Manual

Proper Battery Disposal

Warning! Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

3-3 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

OR

3-7

Chapter 3: Troubleshooting

3-4 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The motherboard supports Load Reduction (LRDIMM)/Registered

(RDIMM) ECC DDR4 DIMM modules. To enhance memory performance, do not mix

memory modules of different speeds and sizes. Please follow all memory installation

instructions given on Section 2-5 in Chapter 2.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website

at http://www.supermicro.com. Please check our BIOS warning message and the

information on how to update your BIOS on our website. Select your motherboard

model and download the BIOS le to your computer. Also, check the current BIOS

revision to make sure that it is newer than your BIOS before downloading. You can

choose from the zip le and the .exe le. If you choose the zip BIOS le, please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format

FLASH.BAT lename.rom from your bootable USB device to ash the BIOS. Then,

your system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed.

Send your motherboard back to our RMA Department at Supermicro for

repair. For BIOS Recovery instructions, please refer to the AMI BIOS

Recovery Instructions posted at http://www.supermicro.com.

Question: How do I handle the used battery?

Answer: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment.

Do not discard a used battery in the garbage or a public landll. Please comply

with the regulations set up by your local hazardous waste management agency to

dispose of your used battery properly.

3-8

X10DRH-C/CT/i/iT Motherboard User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before

any warranty service will be rendered. You can obtain service by calling your ven-

dor for a Returned Merchandise Authorization (RMA) number. When returning the

motherboard to the manufacturer, the RMA number should be prominently displayed

on the outside of the shipping carton, and the shipping package is mailed prepaid

or hand-carried. Shipping and handling charges will be applied for all orders that

must be mailed when service is complete. For faster service, You can also request

a RMA authorization online (http://www.supermicro.com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages in-

curred in shipping or from failure due to the alternation, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product problems.

Chapter 4: AMI BIOS

4-1

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10DRH-C/CT/i/iT. The

ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter

describes the basic navigation of the AMI BIOS setup utility screens.

Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery

Instructions in Appendix C.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Delete> key while the

system is booting up.

Note: In most cases, the <Delete> key is used to invoke the AMI BIOS

setup screen.

Each main BIOS menu option is described in this manual. The AMI BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for a text message. When an option is selected in the

left frame, it is highlighted in white. Often a text message will accompany it.

Note: the AMI BIOS has default text messages built in. Supermicro retains

the option to include, omit, or change any of these text messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during the

setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow

keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Del> at the appropriate time during system boot.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

How to Start the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen, below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall

Supermicro be liable for direct, indirect, special, incidental, or consequential damages

arising from a BIOS update. If you have to update the BIOS, do not shut down or reset

the system while the BIOS is updating to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS setup screen is shown below.

Chapter 4: AMI BIOS

4-3

The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or

System Time using the arrow keys. Enter new values using the keyboard. Press the

<Tab> key or the arrow keys to move between elds. The date must be entered in

Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears

as 17:30:00.

Supermicro X10DRH-C/i

Version: This item displays the version of the BIOS ROM used in the system.

Build Date: This item displays the date when the version of the BIOS ROM used

in the system was built.

Memory Information

Total Memory: This item displays the total size of memory available in the system.

Memory Speed: This item displays the default speed of the memory modules

installed in the system.

4-4

X10DRH-C/CT/i/iT Motherboard User’s Manual

4-3 Advanced Setup Congurations

Use the arrow keys to select Advanced setup and press <Enter> to access the

submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, a

very high DRAM frequency or an incorrect BIOS timing setting may cause the system

to malfunction. When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen display between POST messages or the OEM

logo at bootup. Select Disabled to display the POST messages. Select Enabled

to display the OEM logo instead of the normal POST messages. The options are

Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to

use the current AddOn ROM display setting. Select Force BIOS to use the Option

ROM display mode set by the system BIOS. The options are Force BIOS and

Keep Current.

Bootup Num-Lock State

Use this item to set the Power-on state for the Numlock key. The options are Off

and On.

Chapter 4: AMI BIOS

4-5

Wait For 'F1' If Error

Select Enabled to force the system to wait until the <F1> key is pressed if an error

occurs. The options are Disabled and Enabled.

Interrupt 19 Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt

19 at bootup immediately and allow the drives that are attached to the host adap-

tors to function as bootable disks. If this item is set to Postponed, the ROM BIOS

of the host adaptors will not capture Interrupt 19 immediately to allow the drives

attached to the adaptors to function as bootable devices at bootup. The options

are Immediate and Postponed.

Re-try Boot

Select EFI Boot to allow the BIOS to automatically reboot the system from an EFI

boot device after its initial boot failure. Select Legacy Boot to allow the BIOS to

automatically reboot the system from a Legacy boot device after its initial boot

failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inac-

tive for more than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed.

Select 4 Seconds Override for the user to power off the system after pressing and

holding the power button for 4 seconds or longer. Select Instant Off to instantly

power off the system as soon as the user presses the power button. The options

are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power Off for

the system power to remain off after a power loss. Select Power On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power On,

Stay Off, and Last State.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

CPU Conguration

This submenu displays the following CPU information as detected by the BIOS. It

also allows the user to congure CPU settings.

•Processor Socket

•Processor ID

•Processor Frequency

•Processor Max Ratio

•Processor Min Ratio

•Microcode Revision

•L1 Cache RAM

•L2 Cache RAM

•L3 Cache RAM

•CPU 1 Version

•CPU 2 Version

Clock Spread Spectrum

Select Enabled to allow the BIOS to monitor and attempt to reduce the level of

Electromagnetic Interference caused by the components whenever needed. The

options are Disabled and Enabled.

Hyper-Threading (All)

Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-

formance. The options are Enable and Disable.

Cores Enabled

This feature allows the user to determine the number of CPU cores to enable.

Enter "0" to enable all cores. The default setting is 0, which enables all CPU cores

in the system.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit Technology support, which will allow the

processor to designate areas in the system memory where an application code

can execute and where it cannot, thus preventing a worm or a virus from ooding

Chapter 4: AMI BIOS

4-7

illegal codes to overwhelm the processor to damage the system during an attack.

The options are Enable and Disable. (Refer to Intel's and Microsoft's websites for

more information.)

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN)

control in the system. The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-

tions from the main memory to the L2 cache to improve CPU performance. The

options are Disable and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

Note: Please reboot the system for changes on this setting to take effect.

Please refer to Intel’s website for detailed information.

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by

the CPU)

If set to Enable, the DCU Streamer prefetcher will prefetch data streams from the

cache memory to the DCU (Data Cache Unit) to speed up data accessing and

processing to enhance CPU performance. The options are Disable and Enable.

DCU IP Prefetcher

If set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP

addresses to improve network connectivity and system performance. The options

are Enable and Disable.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to improve the

efciency of data transferring and accessing. The options are Auto, Enable, and

Disable.

X2 APIC (Advanced Programmable Interrupt Controller)

Based on Intel's Hyper-Threading architecture, each logical processor (thread) is

assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to En-

able, the APIC ID will expand(X2) from 8 bits to 16 bits to provide 512 APIDs to each

thread for CPU performance enhancement. The options are Disable and Enable.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d sup­port by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and availability

in networking and data-sharing. The options are Enable and Disable.

 Advanced Power Management Conguration

Advanced Power Management Conguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to custom-

ize system power settings. Select Disabled to disable power-saving settings. The

options are Disable, Energy Efcient, and Custom.

 CPU P State Control (Available when Power Technology
is set to Custom)

EIST (P-States)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically

adjust the processor voltage and core frequency to reduce power consumption

and heat dissipation. The options are Disable and Enable.

Turbo Mode

Select Enabled to use the Turbo Mode to boost system performance. The options

are Enable and Disable.

P-State Coordination

This feature is used to change the P-state (Power-Performance State) coordi-

nation type. P-state is also known as "SpeedStep" for Intel processors. Select

HW_ALL to change the P-state coordination type for hardware components only.

Select SW_ALL to change the P-state coordination type for all software installed

in the system. Select SW_ANY to change the P-state coordination type for a soft-

ware program in the system. The options are HW_All, SW_ALL, and SW_ANY.

Chapter 4: AMI BIOS

4-9

 CPU C State Control (Available when Power Technology
is set to Custom)

Package C State limit

Use this item to set the limit on the C-State package register. The options are

C0/1 state, C2 state, C6 (non-Retention) state, C6 (Retention) state, and No

Limit.

CPU C3 Report

Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the

operating system. During the CPU C6 state, power to all cache is turned off.

The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly

reduce CPU power consumption by reducing CPU clock cycles and voltages

during a Halt-state. The options are Disable and Enable.

 CPU T State Control (Available when Power Technology
is set to Custom)

ACPI (Advanced Conguration Power Interface) T-States

Select Enable to support CPU throttling by the operating system to reduce power

consumption. The options are Enable and Disable.

 Socket RAPL (Running Average Power Limit) Cong.

(Conguration)

FAST_RAPL_NSTRIKE_PL2_DUTY_CYCLE

This feature displays the value of the item above within the range between 25

(10%) and 64 (25%). The default setting is 64.

Turbo Power Limit Lock

Select Enable to set the power use limit for the machine when it is running in

the turbo mode. The options are Enable and Disable.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

Long Pwr (Power) Limit Ovrd (Override)

Select Enable to support long-term power limit override. If this feature is disabled,

BIOS will set the default value. The options are Enable and Disable.

Long Dur (Duration) Power Limit

This item displays the power limit set by the user during which long duration

power is maintained. The default setting is 0.

Long Dur (Duration) Time Window

Use this item to set the time window value (in seconds) over which the TDP

(Thermal Design Point) should be maintained. The default setting is 1, which will

allow the value to be automatically programed by the system.

Pkg (Package) Clmp (Clamping) Limit1

Use this item to set the limit on power performance states for the runtime proces-

sor, with P0 being the state with the highest frequency (clock speed) and power

(consumption), and P1, a step lower in performance than P0, with its frequency

and voltage scaled back a notch. The options are Between P1/P0 and Below P1.

Short Dur (Duration) Pwr (Power) Limit En (Enable)

Select Enable to support Short Duration Power Limit (Power Limit 2). The options

are Enable and Disable.

Short Dur (Duration) Pwr (Power) Limit

This item displays the time period during which short duration power is main-

tained. The default setting is 0.

Pkg (Package) Clmp (Clamping) Lim2

Use this item to set the limit on power performance states for the processor

operating in turbo mode, with P0 being the state with the highest frequency

(clock speed) and power (consumption), and P1, a step lower in performance

than P0, with its frequency and voltage scaled back a notch. The options are

Between P1/P0 and Below P1.

DRAM RAPL (Running Average Power Limit) Conguration

DRAM RAPL (Running Average Power Limit) Baseline

Use this item to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Chapter 4: AMI BIOS

4-11

Override BW_LIMIT_TF (BW_limit_tf )

This feature allows the user to turn off the "Override BW_Limit_TF (Time Frame)"

setting when the item--the "Running Average Power Limit for DRAM modules"

(DRAM RAPL) is set to Enabled so that the DRAM RAPL setting can work

properly. The default setting is 1.

DRAM RAPL (Running Average Power Limit) Extended Range

Select Enable to extend the RAPL range for the DRAM modules. The options

are Disable and Enable.

Chipset Conguration

Warning! Please set the correct settings for the items below. A wrong conguration

setting may cause the system to become malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

IIO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a

processor will always remain clear during electric tuning. The options are Dis-

able and Enable.

IIO0 Conguration

IOU2 (II0 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, x8, and Auto.

IOU0 (II0 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II01 PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto..

4-12

X10DRH-C/CT/i/iT Motherboard User’s Manual

No PCIe Port Active ECO (Engineer Change Order)

This feature provides a work-around solution when there is no active PCI device

detected by the BIOS. The options are PCU Squelch Exit Ignore Option and

Reset the SQ FLOP by CSR Option.

Socket 0 PCIeD00F0 - Port 0/DMI

Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),

and Auto.

PCI-E Port DeEmphasis

This item congures the De-Emphasis Control (LANKCON2 [6]) setting for this

computer. The options are -6.0 dB and -3.5 dB.

The following items will be display:

•PCI-E Port Link Status

•PCI-E Port Link Max

•PCI-E Port Link Speed

PCI-E Port L0s Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L0s to L0. The default setting is 4uS - 8uS.

PCI-E Port L1 Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L1 to L0. The default setting is <1uS, 1uS - 2uS,

2uS - 4uS, 4uS - 8uS, 8uS - 16uS, 16uS - 32uS, 32uS - 64uS, and >64uS.

Fatal Err (Error) Over

Select Enable to force fatal error prorogation to the IIO core error logic for the

port specied by the user. The options are Disable and Enable.

Non-Fatal Err (Error) Over

Select Enable to force non-fatal error prorogation to the IIO core error logic for

the port specied by the user. The options are Disable and Enable.

Corr Err (Correctable Error) Over

Select Enable to force correctable error prorogation to the IIIO core error logic

for the port specied by the user. The options are Disable and Enable.

Chapter 4: AMI BIOS

4-13

L0s Support

When this item is set to Disable, IIO will not put its transmitter in the L0s state.

The default setting is Disable.

Socket 0 PCIeD01F0 - Port 1A/Socket 0 PCIeD02F0

- Port 2A/Socket 0 PCIeD20F2 - Port 2C/Socket 0
PCIeD03F0 - Port 3A/Socket 0 PCIeD03F2 - Port 3C

PCI-E Port

Select Enable to enable the PCI-E port specied by the user. The options are

Auto, Enable, and Disable.

Hot Plug Capable

Select Enable to enable hot-plugging support for the PCI-E port specied by the

user to allow the user to replace the device installed on the port without shutting

down the system. The options are Disable and Enable.

PCI-E Port Link

Select Disable to disable the link that is not involved in training activities, but its

CFG is still active. The options are Enable and Disable.

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user.

The options are GEN1 (2.5 GT/s), GEN2 (5 GT/s), GEN3 (8 GT/s), and Auto.

PCI-E Port DeEmphasis

Use this item to select the De-Emphasis control setting for a PCI-E port specied

by the user. The options are -6.0 dB and -3.5 dB.

The following items will be display:

•PCI-E Port Link Status

•PCI-E Port Link Max

•PCI-E Port Link Speed

PCI-E Port L0s Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L0s to L0. The default setting is 4uS - 8uS.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

PCI-E Port L1 Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L1 to L0. The default setting is <1uS, 1uS - 2uS,

2uS - 4uS, 4uS - 8uS, 8uS - 16uS, 16uS - 32uS, 32uS - 64uS, and >64uS.

Fatal Err (Error) Over

Select Enable to force fatal error prorogation to the IIO core error logic for the

port specied by the user. The options are Disable and Enable.

Non-Fatal Err (Error) Over

Select Enable to force non-fatal error prorogation to the IIO core error logic for

the port specied by the user. The options are Disable and Enable.

Corr Err (Correctable Error) Over

Select Enable to force correctable error prorogation to the IIIO core error logic

for the port specied by the user. The options are Disable and Enable.

L0s Support

When this item is set to Disable, IIO will not put its transmitter in the L0s state.

The default setting is Disable.

PM ACPI Support

Select Enable to generate an _HPGPE message on a PM ACPI event. Select

Disable to generate an MSI message. The options are Disable and Enable.

Gen3 (Generation 3) Eq (Equalization) Mode

Use this item to set the "Adaptive Equalization" mode for PCI-E Generation 3

devices. The options are Auto, Enable Phase 0, 1, 2, 3; Disable Phase 0, 1,

2, 3; Enable Phase 1 Only, Enable Phase 0, 1 Only, Enable MMM Offset West,

and Advanced.

Gen3 (Generation 3) Spec (Specics) Mode

Use this item to set the Specics mode for PCI-E Generation 3 devices. The

options are Auto, 0.70 July, 0.70 Sept and 071 Sept.

Gen3 (Generation 3) Phase2 Mode

Use this item to set the PCI-E Generation 3 Phase 2 mode. The options are

Hardware Adaptive and Manual.

Gen3 (Generation 3) DN TX Preset

Use this item to set the Preset mode for PCI-E Gen3 downstream transmit-

ting (TX) from the master device to a slave device. The options are Auto, P0

(-6.0/0.0 dB), P1 (-3.5/0.0 dB), P2 (-4.5/0.0 dB), P3 (-2.5/0.0 dB), P4 (0.0/0.0

Chapter 4: AMI BIOS

4-15

dB), P5 (0.0/2.0 dB), P6 (0.0/2.5 dB), P7 (-6.0 /3.5 dB), P8 (-3.5/3.5 dB), and

P9 (0.0/3.5 dB).

Gen3 (Generation 3) DN RX Preset Hint

Use this item to set the Preset Hint mode for PCI-E Gen3 downstream receiving

(RX) from the master device to a slave device. The options are Auto, P0 (-6.0

dB), P1 (-7.0 dB), P2 (-8.0 dB), P3 (-9.0 dB), P4 (-10.0 dB) P5 (-11.0 dB), and

P6 (-12.0 dB).

Gen3 (Generation 3) Up TX Preset

Use this item to set the Preset mode for PCI-E Gen3 upstream transmitting (TX)

from a slave device to the master device.The options are Auto, P0 (-6.0/0.0 dB),

P1 (-3.5/0.0 dB), P2 (-4.5/0.0 dB), P3 (-2.5/0.0 dB), P4 (0.0/0.0 dB), P5 (0.0/2.0

dB), P6 (0.0/2.5 dB), P7 (-6.0/3.5 dB), P8 (-3.5/3.5 dB), and P9 (0.0/3.5 dB).

Non-Transparent Bridge PCIe Port Denition (Available on the Socket 0
PCIeD03F0 - Port 3A only)

Select Transparent Bridge to enable Transparent Bridge support for the PCI-E

port specied by the user. Please do not select NTB-RP for a legacy IIO device.

The options are Transparent Bridge, NTB to NTB, and NTB to RP.

Hide Port?

Select Yes to hide the PCI-E port specied from the OS. The options are No

and Yes.

This feature allows the user to congure the settings for the Intel North Bridge.

IIO1 Conguration

IOU2 (II0 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, x8, and Auto.

IOU0 (II0 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II01 PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto..

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X10DRH-C/CT/i/iT Motherboard User’s Manual

No PCIe Port Active ECO (Engineer Change Order)

This feature provides a work-around solution when there is no active PCI device

detected by the BIOS. The options are PCU Squelch Exit Ignore Option and

Reset the SQ FLOP by CSR Option..

Socket 1 PCIeD00F0 - Port 0/DMI/Socket 1 PCIeD01F0

- Port 1A/Socket 1 PCIeD02F0 - Port 2A/Socket 1
PCIeD20F2 - Port 2C/Socket 1 PCIeD03F0 - Port 3A

PCI-E Port

Select Enable to enable the PCI-E port specied by the user. The options are

Auto, Enable, and Disable.

Hot Plug Capable

Select Enable to enable hot-plugging support for the PCI-E port specied by the

user to allow the user to replace the device installed on the port without shutting

down the system. The options are Disable and Enable.

PCI-E Port Link

Select Disable to disable the link that is not involved in training activities, but its

CFG is still active. The options are Enable and Disable.

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user.

The options are GEN1 (2.5 GT/s), GEN2 (5 GT/s), GEN3 (8 GT/s), and Auto.

PCI-E Port DeEmphasis

Use this item to select the De-Emphasis control setting for a PCI-E port specied

by the user. The options are -6.0 dB and -3.5 dB.

The following items will be display:

•PCI-E Port Link Status

•PCI-E Port Link Max

•PCI-E Port Link Speed

PCI-E Port L0s Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L0s to L0. The default setting is 4uS - 8uS.

Chapter 4: AMI BIOS

4-17

PCI-E Port L1 Exit Latency

Use this item to set the length of time required for the port specied by the user

to complete the transition from L1 to L0. The default setting is <1uS, 1uS - 2uS,

2uS - 4uS, 4uS - 8uS, 8uS - 16uS, 16uS - 32uS, 32uS - 64uS, and >64uS.

Fatal Err (Error) Over

Select Enable to force fatal error prorogation to the IIO core error logic for the

port specied by the user. The options are Disable and Enable.

Non-Fatal Err (Error) Over

Select Enable to force non-fatal error prorogation to the IIO core error logic for

the port specied by the user. The options are Disable and Enable.

Corr Err (Correctable Error) Over

Select Enable to force correctable error prorogation to the IIIO core error logic

for the port specied by the user. The options are Disable and Enable.

L0s Support

When this item is set to Disable, IIO will not put its transmitter in the L0s state.

The default setting is Disable.

PM ACPI Support

Select Enable to generate an _HPGPE message on a PM ACPI event. Select

Disable to generate an MSI message. The options are Disable and Enable.

Gen3 (Generation 3) Eq (Equalization) Mode

Use this item to set the "Adaptive Equalization" mode for PCI-E Generation 3

devices. The options are Auto, Enable Phase 0, 1, 2, 3; Disable Phase 0, 1,

2, 3; Enable Phase 1 Only, Enable Phase 0, 1 Only, Enable MMM Offset West,

and Advanced.

Gen3 (Generation 3) Spec (Specics) Mode

Use this item to set the Specics mode for PCI-E Generation 3 devices. The

options are Auto, 0.70 July, 0.70 Sept and 071 Sept.

Gen3 (Generation 3) Phase2 Mode

Use this item to set the PCI-E Generation 3 Phase 2 mode. The options are

Hardware Adaptive and Manual.

Gen3 (Generation 3) DN TX Preset

Use this item to set the Preset mode for PCI-E Gen3 downstream transmit-

ting (TX) from the master device to a slave device. The options are Auto, P0

(-6.0/0.0 dB), P1 (-3.5/0.0 dB), P2 (-4.5/0.0 dB), P3 (-2.5/0.0 dB), P4 (0.0/0.0

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X10DRH-C/CT/i/iT Motherboard User’s Manual

dB), P5 (0.0/2.0 dB), P6 (0.0/2.5 dB), P7 (-6.0 /3.5 dB), P8 (-3.5/3.5 dB), and

P9 (0.0/3.5 dB).

Gen3 (Generation 3) DN RX Preset Hint

Use this item to set the Preset Hint mode for PCI-E Gen3 downstream receiving

(RX) from the master device to a slave device. The options are Auto, P0 (-6.0

dB), P1 (-7.0 dB), P2 (-8.0 dB), P3 (-9.0 dB), P4 (-10.0 dB) P5 (-11.0 dB), and

P6 (-12.0 dB).

Gen3 (Generation 3) Up TX Preset

Use this item to set the Preset mode for PCI-E Gen3 upstream transmitting (TX)

from a slave device to the master device.The options are Auto, P0 (-6.0/0.0 dB),

P1 (-3.5/0.0 dB), P2 (-4.5/0.0 dB), P3 (-2.5/0.0 dB), P4 (0.0/0.0 dB), P5 (0.0/2.0

dB), P6 (0.0/2.5 dB), P7 (-6.0/3.5 dB), P8 (-3.5/3.5 dB), and P9 (0.0/3.5 dB).

Non-Transparent Bridge PCIe Port Denition (Available on the Socket 1
PCIeD03F0 - Port 3A only)

Select Transparent Bridge to enable Transparent Bridge support for the PCI-E

port specied by the user. Please do not select NTB-RP for a legacy IIO device.

The options are Transparent Bridge, NTB to NTB, and NTB to RP.

Hide Port?

Select Yes to hide the PCI-E port specied from the OS. The options are No

and Yes.

IOAT (Intel® IO Acceleration) Conguration

Enable IOAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support, which

signicantly reduces CPU overhead by leveraging CPU architectural improve-

ments and freeing the system resource for other tasks. The options are Enable

and Disable.

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain

transactions to violate the strict-ordering rules of PCI bus for a transaction to

be completed prior to other transactions that have already been enqueued. The

options are Disable and Enable.

Chapter 4: AMI BIOS

4-19

 Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support

by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and avail-

ability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance.

The options are Enable and Disable.

QPI (Quick Path Interconnect) Conguration

QPI General Conguration

QPI Status

The following information will display:

•Number of CPU

•Number of II0

•Current QPI Link Speed

•Current QPI Link Frequency

•QPI Global MMIO Low Base/Limit

•QPI Global MMIO High Base/Limit

•QPI PCIe Conguration Base/Size

Link Frequency Select

Use this item to select the desired frequency for QPI Link connections. The op-

tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited.

Link L0p Enable

Select Enable for Link L0p support to reduce power consumption. The options

are Enable and Disable.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

Link L1 Enable

Select Enable for Link L1 support to reduce power consumption. The options

are Enable and Disable.

COD Enable (Available when the OS and the CPU support this feature)

Select Enable for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Enable and Disable.

Early Snoop (Available when the OS and the CPU support this feature)

Select Enable for Early Snoop support to enhance system performance. The

options are Enable, Disable, and Auto.

Isoc Mode

Select Enable for Isochronous support to meet QoS (Quality of Service) require-

ments. This feature is especially important for Intel Virtualization Technology. The

options are Enable and Disable.

Memory Conguration

This submenu allows the user to congure Integrated Memory Controller (IMC)

settings.

Enforce POR

Select Enabled to enforce POR restrictions on DDR4 frequency and voltage

programming. The options are Enabled and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory

modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,

2200, 2400, 2600, 2667, 2800, 2993, 3000, 3200, and Reserved (Do not select

Reserved).

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Auto, Disabled and Enabled.

DRAM RAPL (Running Average Power Limit) Baseline

Use this feature to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Chapter 4: AMI BIOS

4-21

Set Throttling Mode

Throttling improves CPU reliability and reduces power consumption via automat-

ic-voltage control during CPU idle states. The options are Disabled and CLTT

(Closed Loop Thermal Throttling).

Socket Interleave Below 4GB

Select Enable for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

A7 Mode

Select Enable to support the A7 (Addressing) mode to improve memory perfor-

mance. The options are Enable and Disable.

DIMM Information

This item displays the status of a DIMM module as detected by the AMI
BIOS.

•P1 DIMMA1

•P2 DIMME1

Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

RAS Mode

When Disable is selected, RAS is not supported. When Mirror is selected, the

motherboard maintains two identical copies of all data in memory for data backup.

When Lockstep is selected, the motherboard uses two areas of memory to run

the same set of operations in parallel to boost performance. The options are

Disable, Mirror, and Lockstep Mode.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve

memory performance. The options are Disabled and Enabled.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected on a memory module and send the correction to the requestor

(the original source). When this item is set to Enable, the IO hub will read and

write back one cache line every 16K cycles, if there is no delay caused by internal

processing. By using this method, roughly 64 GB of memory behind the IO hub

will be scrubbed every day. The options are Enable and Disable.

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X10DRH-C/CT/i/iT Motherboard User’s Manual

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before

the next complete patrol scrub is performed. Use the keyboard to enter a value

from 0-24. The Default setting is 24.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable

memory errors found on a memory module. When the CPU or I/O issues a

demand-read command, and the read data from memory turns out to be a

correctable error, the error is corrected and sent to the requestor (the original

source). Memory is updated as well. Select Enable to use Demand Scrubbing

for ECC memory correction. The options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable and Enable.



South Bridge Conguration

The following South Bridge information will display:



USB Conguration

•USB Module Version

•USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable

legacy support if there are no legacy USB devices present. Select Disabled to

have all USB devices available for EFI applications only. The options are Enabled,

Disabled and Auto.

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Ex-

tensible Host Controller Interface) hand-off. The XHCI ownership change should be

claimed by the XHCI driver. The settings are Enabled and Disabled.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

Chapter 4: AMI BIOS

4-23

Port 60/64 Emulation

Select Enabled to support I/O port 60h/64h emulation, which will provide complete

legacy USB keyboard support for the operating systems that do not support legacy

USB devices. The options are Disabled and Enabled.

USB 3.0 Support

Select Enabled for USB 3.0 support. The options are Smart Auto, Auto, Enabled,

and Disabled.

EHCI1

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #1 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

EHCI2

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #2 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

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X10DRH-C/CT/i/iT Motherboard User’s Manual



SATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the Intel PCH chip and displays the fol-

lowing items:

SATA Controller

Select Enabled to enable the onboard SATA controller supported by the Intel PCH

chip. The options are Enabled and Disabled.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

*If the item above "Congure SATA as" is set to AHCI, the following items will display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA Port 0~ Port 5

This item displays the information of a SATA device installed on the SATA port

specied by the user.

•Model number of drive and capacity

•Software Preserve

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are Dis-

abled and Enabled.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the

device. The options are Enabled and Disabled.

SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

Chapter 4: AMI BIOS

4-25

*If the item above "Congure SATA as" is set to IDE, the following items will
display:

SATA Port 0~ Port 5

This item displays the information of a SATA device installed on the SATA port

specied by the user.

•Software Preserve

SATA Device Type (Available when a SATA port is detected)

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to RAID, the following items will
display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

OPROM for system boot. The options are Disabled, EFI, and Legacy.

SATA/sSATA RAID Boot Select

Select SATA Controller to boot the system from a SATA RAID device. Select sSATA

Controller to boot the system from a sSATA RAID device. Select Both to boot the

system either from a SATA RAID device or from an sSATA RAID device. Please

note that the option-Both is not supported by the Windows Server 2012/R2 OS. The

options are None, Both, SATA Controller, and sSATA Controller.

Serial ATA Port 0~ Port 5

This item displays the information of a SATA device installed on the SATA port

specied by the user.

•Model number of drive and capacity

•Software Preserve

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X10DRH-C/CT/i/iT Motherboard User’s Manual

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.



sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the PCH-sSATA controller and displays

the following items:

sSATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH-sSATA controller. The options are Enabled and Disabled.

Congure sSATA as

Select IDE to congure an sSATA drive specied by the user as an IDE drive. Select

AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select

RAID to congure an sSATA drive specied by the user as a RAID drive. The op-

tions are IDE, AHCI, and RAID.

*If the item above "Congure sSATA as" is set to AHCI, the following items will

display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

sSATA Port 0~ Port 3

This item displays the information detected on the installed on the sSATA port.

specied by the user.

•Model number of drive and capacity