The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates.
Please Note: For the most up-to-date version of this manual, please see our web
site at www.supermicro.com.
SUPERMICRO COMPUTER reserves the right to make changes to the product described in this
manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any
medium or machine without prior written consent.
IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
• All images and layouts shown in this manual were based upon the latest PCB
Revision available at the time of publishing of this manual. The motherboard
you've received may or may not look exactly the same as the graphics shown
in this manual.
1-3
X6DHR-C8 User's Manual
Figure 1-2. X6DHR-C8 Motherboard Layout
(not drawn to scale)
KB/
Mouse
USB
0/1
COM1
VGA
JLAN1
JLAN2
JLAN3
JLAN4
COM2
JLAN5
JLAN6
JLAN7
JLAN8
Fan5
82546GB
PCI1
DA14
Fan6
UPER X6DHR-C8
S
Super
IO
PL1
J
AGE-
R
XL
JPG1
DA12
DA10
JWOL1
DA8
24-Pin
JPW2
4-Pin
PWR
DIMM
1A
(Bank 1)
DIMM 1B (Ban
DIMM 2A (Bank 2)
DIMM 2B (Bank 2)
DIMM 3
A
(Bank 3)
DIMM 3B (Bank 3)
DIMM 4A (Bank 4)
DIMM 4B (Bank 4)
PCI-X #1 100 MHz
82546GB
JPL2
82546GB
A
®
P
J
TX PWR
k
1)
E7520
indenhurst
L
North
(
Bridge)
Cavium
230 SL
1
82546GB
L3
PL4
J
J18
JPW1
SMBUS
J24
JUSB2
USB2/3
PCI-E x8
PXH
PC1
J
PXH
SATA0
J51
JPA1
SATA1
J52
CPU 1
CPU 2
IPMI
ICH5R
(South
Bridge)
7902
SCSI
CTRL
D
A2
JWOR1
Fan7
Fan8
DA1
JA2
J24
27
J
JIDE1
Clear
CMOS
BIOS
Batt
2
PA
J
JPA3
SCSI CH B
JP12
JL1
Fan3
ery
8-Pin
PWR
L
JPW3
Fan1
JF1
FP Ctrl
D1
J
JP15
E1
Fan2
JOH1
3
1
JP14
JP
Buzzer
Compact
Flash Card
Type 1
SCSI CH A
Fan4
Important Notes to the User
• All images and graphics shown in this manual were based upon the latest
PCB Revision available at the time of publishing of this manual. The motherboard you've received may or may not look exactly the same as the graphics
shown in this manual.
• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front
panel connections.
• " " indicates the location of "Pin 1".
• When the LE1 LED is on, the 5V Standby PWR is on. Maker sure to turn off
the power before installing or removing components.
• Refer to Page 2-7 for the Logical Port# of each onboard LAN.
1-4
Chapter 1: Introduction
Quick Reference ( X6DHR-C8)
(*Please refer to Chapter 2 for pin defi nitions and detailed
information.)
Jumper Description Default Setting
J18 Watch Dog Enable Pins 1-2 (Reset)
JP12 Power Fault (See Chapter 2)
JP13 3rd PWR Supply PWR Fault Detect On (Enabled)
JP14 Alarm Reset Enable Off (Disabled)
JP15 Reboot Option Off (Disabled)
JPA1 SCSI Channel A/B Enable On (Enabled)
JPA2/JPA3 SCSI Channels A/B Termination Off (Enabled)
with memory modules of the same size and of the same type will result in dual
channel, two-way interleaved memory which is faster than the single channel,
non-interleaved memory.
To Install:
Insert module
vertically and
press down
until it snaps
into place.
Pay attention
to the alignment notch at
the bottom.
Figure 2-2. Installing and Removing DIMMs
Notch
Release
Tab
Note: Notch
should align
receptive point
DDRII
with the
on the slot
II
Notch
Release
Tab
To Remove:
Use your thumbs to gently push near the edge of both ends of the
module. This should release it from the slot.
2-5
X6DHR-C8 User's Manual
2-4 A. I/O Ports and Front Panel Control Connectors
The I/O ports are color coded in conformance with the PC 99 specifi cation. See
Figure 2-3 below for the colors and locations of the various I/O ports.
Figure 2-3. I/O Port Locations and Defi nitions
(Green)
Mouse
JLAN6JLAN8
KB
(Purple)
USB 0/1
COM1
(Turquoise)
VGA
JLAN1
JLAN2JLAN3 JLAN4 JLAN5
JLAN7
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located
on a control panel at the front of the chassis. These connectors are designed specifi -
cally for use with Supermicro server chassis. See Figure 2-4 for the descriptions of
the various control panel buttons and LED indicators. Refer to the following section
for descriptions and pin defi nitions.
Figure 2-4. JF1 Header Pins
1920
Ground
X
Power LED
NMI
X
Vcc
OH/Fan Fail LED
Power Fail LED
HDD LED
NIC1 LED
NIC2 LED
Ground
Ground
2
2-6
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Pwr
1
Reset Button
Power Button
Chapter 2: Installation
JLAN1
®
S
UPER X6DHR-C8
JLAN
2
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 3B (B
ank 3)
DIMM 3A (B
ank 3)
DIMM 4B
(B
ank 4)
DIMM 4A (Bank 4)
DIMM 1A
(Bank 1
)
DIMM 1B (Bank 1
)
Fan1
JF1
FP Ctrl
J
D1
JP15
Fan2
J
OH
1
Fan3
JL1
IPMI
JIDE1
BIOS
J18
J
PA1
SCSI CH
A
SCSI CH B
Fan4
7902
CTRL
SATA0
SATA1
USB2/3
SMBUS
Buzzer
JWOR1
Battery
JP
L1
R
AGE-
XL
PCI-X #1
1
00 MHz
Super
IO
(North
Bridge)
JPG1
COM1
USB
0/1
KB/
Mouse
Fan5
Fan6
ATX PW
R
4-Pin
PWR
24-Pin
Fan7
J24
JP12
Fan8
SCSI
CPU 1
PXH
PCI-E x8
COM2
JPA2
JPA3
DA1
DA2
ICH5R
PXH
Lindenhurst
Clear
CMOS
(South
Bridge)
E7520
JLAN3
JLAN4
JLAN5
Cavium
1230 SL
JPL3
JPL4
J
PL
2
JA2
J27
JPW3
J
PW1
J
PW2
JPC1
DA10
DA12
JWOL1
DA8
DA14
CPU 2
VG
A
8-Pin
PWR
JP14
JP13
LE
1
JUSB2
J51
J52
J24
PCI1
82546GB
82546GB
82546GB
82546GB
JLAN6
JLAN7
JLAN8
Compact
Flash Card
Type 1
2-4 B. Logical Port Numbers for the Onboard LANs
Sequence of Hardware/BIOS Scan of the Onboard LANs
Phyical
JLAN1JLAN2JLAN3JLAN4JLAN5JLAN6JLAN7JLAN8
Port#
Logical
eth6eth7eth4eth5eth3eth2eth1eth0
Port#
(*Note: The Logical Port Numbers for the Onboard LAN ports vary depending
on the version of the OS installed in the system. The Logical Port Numbers
shown above are based upon Redhat Kernel 2.6.9 and Kernel 2.4.21.)
Physical JLAN Ports #1-#8
2-7
X6DHR-C8 User's Manual
2-5 Connecting Cables
ATX Power Connector
The main power supply connector on
the X6DHR-C8 meets the SSI (Su-
perset ATX) 24-pin specifi cation. You
must also connect the 4-pin (JPW2)
power connector to your power supply
to provide adequate power supply for
system power consumption. See the
table on the right for pin defi nitions.
Processor Power Connector
In addition to the Primary ATX and the
Auxiliary power connectors (above),
the 12V 8-pin Processor connector
at JPW3 must also be connected to
your power supply for CPU power
consumption.
ATX Power 24-pin Connector
Pin Defi nitions (JPW1)
Pin# Defi nition Pin # Defi nition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
4-Pin 12V Connector
Pin Defi nitions (JPW2)
Pins Defi nition
1 & 2Ground
3 & 4+12V
8-Pin 12V Connector
Pin Defi nitions (JPW3)
Pins Defi nition
1 through 4Ground
5 through 8+12V
(*Required)
(*Required)
KB/
Mouse
USB
0/1
VG
JLAN1
JLAN2
JLAN3
COM1
A
JLAN4
JLAN5
JLAN6
JLAN7
JLAN8
COM2
Fan5
82546GB
PCI1
DA14
JWOL1
DA8
4-pin PWR
Fan6
JPW2
4-Pin
PWR
UPER X6DHR-C8
S
Super
IO
JPL1
RAGEXL
PG1
J
DA12
DA10
ATX 24-pin PWR
A
24-Pin
DIMM 1A (B
DIMM 1B (Bank
DIMM 2
DIMM 2B (Bank 2)
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM 4
DIMM 4B (Bank 4)
A (Bank 2)
A (Bank 4)
PCI-X #
82546GB
JPL2
82546GB
ank 1)
®
1 100 MHz
PL
J
TX PWR
E7520
inden
L
(North
Bridge)
1230 SL
82546GB
3
J
J18
JPW1
1)
hurst
Cavium
PL4
SMBUS
24
J
JUSB2
USB2/3
PCI-E x8
JPC1
PXH
PXH
SATA0
51
J
JPA1
SATA1
52
J
CPU 1
CPU 2
IPMI
ICH5R
(South
Bridge)
7902
SCSI
CTR
DA2
JWOR1
Fan7
Fan8
L
DA1
JA2
8-pin PWR
8-Pin
PWR
P12
J24
J
LE1
JL1
Fan3
27
J
JIDE1
Clear
CMOS
BIOS
ery
Batt
2
JPA
A3
P
J
SCSI CH B
JPW3
Fan1
JF1
FP Ctrl
5
JD1
JP1
Fan2
JOH1
13
P
JP14
J
Buzzer
Compact
Flash Card
Type 1
SCSI CH A
Fan4
2-8
Chapter 2: Installation
n
n
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19Control
20Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15Vcc
16Control
KB/
Mouse
USB
0/1
VG
COM1
JLAN1
JLAN2
JLAN3
JLAN4
COM2
A
JLAN5
JLAN6
JLAN7
JLAN8
Fan5
Fan6
UPER X6DHR-C8
S
82546GB
Super
IO
JPL1
PCI1
DA14
AGE-
R
XL
PG
J
DA12
DA10
WOL1
J
DA8
JPW2
4-Pin
PWR
DIMM
DIMM
DIMM 2A (B
DIMM 2B (Bank 2)
DIMM 3
DIMM 3B (Bank 3)
DIMM 4A (B
DIMM 4B (Bank 4)
1
R
ATX PW
24-Pin
1A (B
ank
1
)
1
B (Bank
1
)
ank 2)
A (B
ank 3)
ank 4)
®
E7520
Linden
orth
N
(
Bridge)
PCI-X #1 100 MHz
Cavium
82546GB
JPL2
1230 SL
82546GB
82546GB
3
JPL
JPL
J1
8
JPW1
hurst
4
SMBUS
J24
PCI-E x8
1
PC
J
USB2
J
USB2/3
PXH
PXH
SATA0
J51
JP
A1
SATA1
J52
CPU 1
CPU 2
ICH5R
(South
Bridge)
7902
SCSI
CTRL
D
A
2
PWR LED
2
8-Pin
Fan7
PWR
P1
IPMI
JWOR1
JA2
DA1
Fan8
J24
Clear
CMOS
A
JP
JP
SCSI CH B
JPW3
J
Fan1
JF1
FP Ctrl
5
JD1
JP1
1
LE
Fan2
JOH1
4
3
JP1
JP1
JL1
Fan3
J27
Buzzer
JIDE1
Compact
Flash Card
Type 1
BIOS
A
Battery
SCSI CH
2
3
A
Fan4
2-9
Ground
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
Power Fail LED
X
Ground
Ground
NMI
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Butto
Power Butto
Pwr
1
2
X6DHR-C8 User's Manual
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach the
hard drive LED cable here to display
disk activity (for any hard drives on
the system, including SCSI, Serial ATA
and IDE). See the table on the right
for pin defi nitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connections for the GLAN
Port1 is located on pins 11 and 12
of JF1, and for the GLAN Port2 is
located on pins 9 and 10 of JF1. At-
tach the NIC LED cables to display
network activity. Refer to the tables
on the right for pin defi nitions.
HDD LED
Pin Defi nitions (JF1)
Pin# Defi nition
13Vcc
14HD Active
NIC1 LED
Pin Defi nitions (JF1)
Pin# Defi nition
11Vcc
12Ground
NIC2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9Vcc
10Ground
KB/
Mouse
USB
0/1
VGA
JLAN1
JLAN2
COM1
JLAN3
JLAN4
JLAN5
JLAN6
JLAN7
JLAN8
COM2
Fan5
Fan6
UPER X6DHR-C8
S
82546GB
Super
IO
JPL1
PCI1
DA14
AGE-
R
XL
PG
J
DA12
DA10
L1
WO
J
DA8
24-Pin
JPW2
4-Pin
PWR
DIMM 1A
(B
DIMM 1B (Bank
DIMM 2A (B
DIMM 2B (Bank 2)
DIMM 3
A (B
DIMM 3B (Bank 3)
DIMM 4A (B
DIMM 4B (Bank 4)
®
PCI-X #1 100 MHz
82546GB
JPL2
1
82546GB
JPL
ATX PWR
ank
ank 2)
ank 3)
ank 4)
E7520
Linden
3
J1
JPW1
1
)
1
)
orth
N
(
Bridge)
Cavium
1230 SL
82546GB
4
JPL
8
hurst
SMBUS
J24
J
USB2/3
PCI-E x8
1
PC
J
USB2
PXH
PXH
SATA0
J51
JP
SATA1
J52
CPU 1
CPU 2
A1
D
A
IPMI
ICH5R
(South
Bridge)
7902
SCSI
CTRL
2
JWOR1
JA2
DA1
Fan7
Fan8
J24
Clear
CMOS
BIOS
Battery
2
A
JP
3
A
JP
SCSI CH B
2
P1
J
JL1
Fan3
J27
JIDE1
2-10
8-Pin
PWR
5
JP1
1
LE
Compact
JPW3
Fan1
JF1
FP Ctrl
D1
J
Fan2
JOH1
4
3
JP1
JP1
Buzzer
Flash Card
Type 1
A
SCSI CH
Fan4
HDDNIC1/NIC2 LED
1920
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
Power Fail LED
Ground
Ground
1
2
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Pwr
Reset Button
Power Button
Overheat/FanFail LED
Connect an LED to the OH/Fan Fail
connection on pins 7 and 8 of JF1 to
provide advanced warning of chas-
sis overheating or sytem fan failure.
Refer to the table on the right for pin
defi nitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
defi nitions.
OH/Fan Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7Vcc
8HD Active
PWR Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
5PWR Fail LED-
6PWR Fail LED+
PWR Fail Indicator Status
State Defi nition
GreenPWR On, System
AmberRedundant PWR
Chapter 2: Installation
OH/Fan Fail Indicator
Status
State Defi nition
OffNormal
OnOverheat
FlashingFan Fail
Normal
Failure
KB/
Mouse
USB
0/1
VGA
JLAN1
JLAN2
COM1
JLAN3
JLAN4
JLAN5
JLAN6
JLAN7
JLAN8
COM2
Fan5
82546GB
DA14
PCI1
J
WO
DA8
Fan6
JPL1
DA12
DA10
S
AGE-
R
XL
PG
J
L1
ATX PWR
24-Pin
(B
A (B
82546GB
82546GB
JPW1
ank
1
)
1
)
ank 2)
ank 3)
ank 4)
®
E7520
hurst
Linden
orth
N
(
Bridge)
Cavium
1230 SL
82546GB
3
JPL
4
JPL
J1
8
JPW2
4-Pin
PWR
DIMM 1A
DIMM 1B (Bank
DIMM 2A (B
DIMM 2B (Bank 2)
DIMM 3
DIMM 3B (Bank 3)
DIMM 4A (B
DIMM 4B (Bank 4)
UPER X6DHR-C8
Super
IO
PCI-X #1 100 MHz
JPL2
1
SMBUS
J24
PCI-E x8
1
PC
J
USB2
J
USB2/3
PXH
PXH
SATA0
J51
JP
SATA1
J52
CPU 2
A1
D
CPU 1
IPMI
ICH5R
(South
Bridge)
7902
SCSI
CTRL
A
2
JWOR1
DA1
JA2
Fan7
Fan8
J24
J27
Clear
CMOS
BIOS
Battery
2
A
JP
3
A
JP
SCSI CH B
2
8-Pin
PW
P1
J
LE
JL1
Fan3
JIDE1
Compact
2-11
R
JPW3
Fan1
JF1
FP Ctrl
5
D1
J
JP1
1
Fan2
JOH1
4
3
JP1
JP1
Buzzer
Flash Card
Type 1
A
SCSI CH
Fan4
OH/Fan Fail LED
PWR Fail LED
1920
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
Power Fail LED
Ground
Ground
1
2
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Pwr
Reset Button
Power Button
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