SUMMIT SMS2902P, SMS2902P2.7, SMS2902PA, SMS2902PB, SMS2902S Datasheet

SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131 • Campbell, CA 95008 • Telephone [phone] • Fax [phone] • www.summitmicro.com

1

© SUMMIT MICROELECTRONICS, Inc. 2000
2028 5.0 4/18/00

Characteristics subject to change without notice

SUMMIT

MICROELECTRONICS, Inc.

FEATURES

• Precision Voltage Monitor
–V

CC

Supply Monitor

- Complementary reset outputs for complex
microcontroller systems

- Integrated memory write lockout function

- No external components required

•Watchdog Timer
– 1600 ms, internal

• Two Wire Serial Interface (I

2

C™)

• Extended Programmable Functions
available on SMS24

• High Reliability
– Endurance: 100,000 erase/write cycles

– Data retention: 100 years

• 8-Pin PDIP or SOIC Packages

Voltage Supervisory Circuit With Watchdog Timer

SMS2902/SMS2904/SMS2916

OVERVIEW

The SMS29xx is a power supervisory circuit that monitors
VCC and will generate complementary reset outputs. The
reset pins also act as I/Os and may be used for signal
conditioning. The SMS29xx also has an on-board watch­dog timer.

The SMS29xx integrates a nonvolatile serial memory. It
features the industry standard I2C serial
interface allowing quick implementation in an end-users’
system.

BLOCK DIAGRAM

+

–

GND

V

CC

8

4

RESET#

2

V

TRIP

RESET

CONTROL

RESET

7

1.26V

SCL

6

SDA

5

WATCHDOG

TIMER

WDI#

1

2028 T BD 2.0

WRITE

CONTROL

NONVOLATILE

MEMORY

ARRAY

PROGRAMMABLE

RESET PULSE

GENERATOR

2

SMS2902/SMS2904/SMS2916

2028 5.0 4/18/00

PIN CONFIGURATIONS

PIN NAMES

Symbol Pin Description

WDI# 1 Watchdog Input /a high to

low transition will clear the
watchdog timer

RESET# 2 Active Low RESET Input/Output

NC 3 No Connect, tie to ground

or leave open

GND 4 Analog and Digital Ground

SDA 5 Serial Memory Input/

Output data line

SCL 6 Serial Memory clock input

RESET 7 Active High RESET Input/

Output

V

CC

8 Supply Voltage

2028 PGM T1.1

FIGURE 1. SERIAL BUS TIMING DIAGRAM

CAPACITANCE

TA = 25°C, f = 100KHz

Symbol Parameter Max Units

C

IN

Input Capacitance 5 pF

L

OUT

Output Capacitance 8 pF

2028 PGM T2..0

SCL

SDA In

SDA Out

t

AA

t

R

t

H IGHtLOW

t

SU:STO

t

BUF

t

SU:DAT

t

HD:DAT

t

HD:SDA

t

SU:SDA

t

DH

2028 ILL5.0

t

F

WDI#

RESET#

NC

GND

V

CC

RESET
SCL
SDA

1
2
3
4

8
7
6
5

8-Pin PDIP

or 8-Pin SOIC

2028 T PCon 2.0

SMS2902/SMS2904/SMS2916

3

2028 5.0 4/18/00

ABSOLUTE MAXIMUM RATINGS

Temperature Under Bias ............................................................................................................................... -40°C to +85°C

Storage Temperature ..................................................................................................................................... -65°C to +125°C

Soldering Temperature (less than 10 seconds) ...................................................................................................................300°C

Supply Voltage ............................................................................................................................................................. 0 to 6.5V

Voltage on Any Pin ....................................................................................................................................... -0.3V to V

CC

+0.3V

ESD Voltage (JEDEC method) .......................................................................................................................................... 2,000V

NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses
beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability.

2.7V to 4.5V 4.5V to 5.5V

Symbol Parameter Conditions Min Max Min Max Units

fSCL SCL Clock Frequency 0 100 400 KHz
tLOW Clock Low Period 4.7 1.3 µs
tHIGH Clock High Period 4.0 0.6 µs
tBUF Bus Free Time Before New Transmission 4.7 1.3 µs
tSU:STA Start Condition Setup Time 4.7 0.6 µs
tHD:STA Start Condition Hold Time 4.0 0.6 µs
tSU:STO Stop Condition Setup Time 4.7 0.6 µs
tAA Clock to Output SCL Low to SDA Data Out Valid 0.3 3.5 0.2 0.9 µs
tDH Data Out Hold Time SCL Low to SDA Data Out Change 0.3 0.2 µs
tR SCL and SDA Rise Time 1000 300 ns
tF SCL and SDA Fall Time 300 300 ns
tSU:DAT Data In Setup Time 250 100 ns
tHD:DAT Data In Hold Time 0 0 ns

TI Noise Spike Width Noise Suppression Time Constant 100 100 ns

@ SCL, SDA Inputs

tWR Write Cycle Time 10 10 ms

AC ELECTRICAL CHARACTERISTICS
(over recommended operating conditions unless otherwise specified)

2028 PGM T5.0

2028 PGM T4.0

DC ELECTRICAL CHARACTERISTICS (over recommended operating conditions unless otherwise specified)

Symbol Parameter Conditions Min Max Units

SCL = CMOS Levels @ 100KHz V

CC

=5.5V 3 mA

I

CC

Supply Current (CMOS) SDA = Open

All other inputs = GND or V

CC

V

CC

=3.3V 2 mA

I

SB

Standby Current (CMOS) SCL = SDA = V

CC

V

CC

=5.5V 50 µA

All other inputs = GND

I

LI

Input Leakage VIN = 0 To V

CC

10 µA

I

LO

Output Leakage V

OUT

= 0 To V

CC

10 µA

V

IL

Input Low Voltage S0, S1, S2, SCL, SDA, RESET# 0.3xV

CC

V

V

IH

Input High Voltage S0, S1, S2, SCL, SDA, RESET 0.7xV

CC

V

V

OL

Output Low Voltage IOL = 3mA SDA 0.4 V

V

CC

=3.3V 25 µA

Temperature Min Max

Commercial 0°C +70°C

Industrial -40°C +85°C

RECOMMENDED OPERATING CONDITIONS

2028 PGM T3.0

4

SMS2902/SMS2904/SMS2916

2028 5.0 4/18/00

FIGURE 2. RESET OUTPUT TIMING

RESET CIRCUIT AC and DC ELECTRICAL CHARACTERISTICS
TA=-40°C to +85°C

Symbol Parameter Part no. Min. Typ. Max. Unit

Suffix

V

TRIP

Reset Trip Point A (or) Blank 4.250 4.375 4.5 V

B 4.50 4.625 4.75 V

2.7 2.55 2.65 2.75 V

t

PURST

Reset Timeout 200 ms

t

RPD

V

TRIP

to RESET Output Delay 5 µs

V

RVALID

RESET Output Valid to VCC min. Guarantee 1 V

t

GLITCH

Glitch Reject Pulse Width note 1 30 ns

V

OLRS

RESET Output Low Voltage IOL = 1mA 0.4 V

V

OHRS

RESET High Voltage Output IOH = 800µA VCC-.75 V

V

ULH

V

SENSE

Under-voltage threshold low to high 1.20 1.25 1.30 V

V

UHL

V

SENSE

Under-voltage threshold high to low 1.20 1.25 1.30 V

V

OLH

V

SENSE

Over-voltage threshold low to high 1.20 1.25 1.30 V

V

OHL

V

SENSE

Over-voltage threshold high to low 1.20 1.25 1.30 V

t

VD1

Delay to V

LOW

Active 5 µs

t

VD2

Delay to V

LOW

Released 5 µs

t

WDTO

Watchdog timeout Period 1600 ms

V

CC

V

RVALID

V

TRIP

t

PURST

RESET#

RESET

2028 T fig02 2.0

t

GLITCH

t

RPD

t

PURST

t

RPD

SMS2902/SMS2904/SMS2916

5

2028 5.0 4/18/00

FIGURE 3. WATCHDOG TIMER TIMING DIAGRAM

FIGURE 4.

RESETRESET

RESETRESET

RESET AS AN INPUT FUNCTION

t

PURST

t

PURST

RESET (out)

2028 T fig04 2.0

RESET# (in)

RESET# (out)

t

WDTO

t

PURST

t

WDTO

t

PURST

t

PURST

t

WDTO

< t

WDTO

2028 T fig03 2.0

RESET#

RESET#

WDI#

WDI#