The SMH4812 is designed to control hot swapping of plugin cards operating from a single supply, which can have an
output range from 20V to 500V. The SMH4812 hot-swap
controller provides under-voltage and over-voltage monitoring of the host power supply, it drives an external power
MOSFET switch that connects the supply to the load, and
it protects against over-current conditions that might disrupt the host supply. When the input and output voltages
to the SMH4812 controller are within specification it pro-
FUNCTIONAL BLOCK DIAGRAM
VDD
DRAIN
SENSE
16
1
50kΩ
12VREF
+
–
vides a Power Good logic output that may be used to
enable a DC-DC converter. Additional features of the
device include: temperature sense or master enable
input, 2.5V and 5V reference outputs for expanding monitor functions, two Pin-Detect enable inputs for fault protection, and duty-cycle or latched over-current protection
modes. All of these features can be programmed by the
factory according to the user's requirements.
ENPG
14
PROGRAMM-
ABLE
SHUTDOWN
TIMER
13
12
11
FS#
2.5VREF
5.0VREF
EN/TS
PD1#
PD2#
VSS
CBSENSE
2
UV
OV
50kΩ
50kΩ
3
4
5
9
10
12V
5V
8
PROGRAMM-
7
Programmable
Quick Response
2.5V
ABLE
DELAY
50mV
Ref. Voltage
+
–
+
–
+
–
+
–
+
–
FILTER
DUTY
CYCLE
TIMER
2055 4.0 12/22/00
50kΩ
PROGRAMM-
ABLE
DELAY
15
PG#
VGATE
SENSE
2
VGATE
6
FAULT#
2055 BD 3.0
SUMMIT MICROELECTRONICS, Inc.
PIN CONFIGURATION
SMH4812
Preliminary
SS
1
2
3
4
5
6
7
8
DRAIN SENSE
VGATE
EN/TS
PD1#
PD2#
FAULT#
CBSENSE
V
PIN DESCRIPTIONS
DRAIN SENSE (1)
The DRAIN SENSE input monitors the voltage at the drain
of the external power MOSFET switch with respect to VSS.
An internal 10µA source pulls the DRAIN SENSE signal
towards the 5V reference level. DRAIN SENSE must be
held below 2.5V to enable the PG outputs.
EN/TS (3)
The Enable/Temperature Sense input is the master enable input. If EN/TS is less than 2.5V, VGATE will be
disabled. This pin has an internal 200kW pull-up to 5V.
V
16
15
14
13
12
11
10
PG#
ENPG
FS#
2.5V
5V
OV
UV
9
2055 PCon 2.0
DD
REF
REF
OV (10)
The OV pin is used as an over-voltage supply monitor,
typically in conjunction with an external resistor ladder.
VGATE will be disabled if OV is greater than 2.5V. A filter
delay is available on the OV input.
VGATE (2)
The VGATE output activates an external power MOSFET
switch. This signal supplies a constant current output
(100µA typical), which allows easy adjustment of the
MOSFET turn on slew rate.
PD1#, PD2# (4, 5)
These are logic level active low inputs that can optionally
be employed to enable VGATE and the PG outputs when
they are at VSS. These pins each have an internal 50kW
pull-up to 5V.
CBSENSE (7)
The circuit breaker sense input is used to detect overcurrent conditions across an external, low value sense
resistor (RS) tied in series with the Power MOSFET. A
voltage drop of greater than 50mV across the resistor for
longer than t
will trip the circuit breaker. A program-
CBD
mable Quick-Trip sense point is also available.
UV (9)
The UV pin is used as an under-voltage supply monitor,
typically in conjunction with an external resistor ladder.
VGATE will be disabled if UV is less than 2.5V. Programmable internal hysteresis is available on the UV input,
adjustable in increments of 62.5mV. Also available is a
filter delay on the UV input.
FAULT# (6)
FAULT# is an open-drain, active-low output that indicates
the fault status of the device.
5VREF (11)
This is a precision 5V output reference voltage that may be
used to expand the logic input functions on the SMH4812.
The reference output is with respect to VSS.
2.5VREF (12)
This is a precision 2.5V output reference voltage that may
be used to expand the logic input functions on the
SMH4812. The reference output is with respect to VSS.
FS# (13)
The Forced Shutdown (FS#) pin is an active low input that
causes VGATE and PG outputs to be shut down at any
time after an internal hold-off timer has expired. The holdoff timer allows supervisory circuits on the secondary side
(which are not powered up initially) to control shut down of
the SMH4812 via an opto-isolator. This input has no pullup resistor.
SUMMIT MICROELECTRONICS, Inc.
2055 4.0 12/22/00
3
SMH4812
Preliminary
ENPG (14)
The ENPG input controls the PG# output. When ENPG is
pulled low the PG# output is immediately placed in a high
impedance state. If ENPG is driven high then the PG#
output will immediately be driven low.
PG# (15)
PG# is an open-drain, active-low output with no internal
pull-up resistor. It can be used to switch a load or enable
a DC/DC converter. PG# is enabled immediately after
VGATE reaches V
– VGT and the DRAIN SENSE
DD
voltage is less than 2.5V. Voltage on these pins cannot
exceed 12V, as referenced to V
SS.
VDD (16)
VDD is the positive supply connection. An internal shunt
regulator connected between VDD and VSS develops approximately 12V that supplies the SMH4812. A resistor
must be placed in series with the VDD pin to limit the
regulator current (RD in the application illustrations).
V
(8)
SS
VSS is connected to the negative side of the supply.
4
2055 4.0 12/22/00
SUMMIT MICROELECTRONICS, Inc.
ABSOLUTE MAXIMUM RATINGS*
SMH4812
Preliminary
Temperature Under Bias ...................... –55°C to 125°C
Storage Temperature ........................... –65°C to 150°C
Lead Solder Temperature (10 secs) ................... 300 °C
Terminal Voltage with Respect to VSS:
V
................................. –0.5V to V
DD
DD
OV, UV, DRAIN SENSE,
FS#, CBSENSE .....–0.5V to VDD+0.5V
PD1#, PD2#, ENPG, EN/TS ......... 10V
FAULT#, PG# ........–0.5V to VDD+0.5V
VGATE ................................ VDD+0.5V
AC OPERATING CHARACTERISTICS
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t
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*COMMENT
Stresses listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions
outside those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended
periods may affect device performance and reliability.
5sµ
05
yaledrekaerBtiucriCVm05elbammargorP
*
051sµ
004sµ
05sµ
052sµ
005sµ
0051sµ
*
5
02sm
08sm
061sm
ffo002sn
FFO
*
—
5sm
08sm
061sm
5.0sm
5sm
*
08
061sm
2055 Prog Table
sµ
sm
sm
* = Default value
SUMMIT MICROELECTRONICS, Inc.
2055 4.0 12/22/00
5
DC OPERATING CHARACTERISTICS
(Over Recommended Operating Conditions; Voltages are relative to VSS, except VGT)
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V
TSYHVU
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VO
V
TSYHVO
V
ETAG
I
ETAG
V
ESNES
I
ESNES
V
BC
V
BCQ
V
STNE
V
V
V
V
I
V
(1) TA = 25ºC.
TSYHSTNE
HI
LI
LO
LI
TG
V
ETAG
V
ETAG
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SMH4812
Preliminary
DD
FER
V
V
2055 Elect Table
RECOMMENDED OPERATING CONDITIONS
Temperature–40°C to 85°C.
6
2055 4.0 12/22/00
SUMMIT MICROELECTRONICS, Inc.
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