Strand MX MX Circuit Information

CIRCUIT INFORMATION

lJ

"

l

J

l

Document No.: 1 X33213

(A79-1)

Issue: 6

J

Strand Lighting

Date : Dec 1990

Strand Lighting Ltd.,
Grant Way,
(off Syon Lane),

fi

lsleworth,
Middlesex.
TW75QD

UK

Tel.

Fax. [phone]

Strand Lighting Offices Overseas

Note: Telephone numbers exclude international and national dialling codes

Asia:
Australia: 264-270 Normanby Road, South Melbourne, Victoria 3205, Australia

081 560 3171

802 Houston Centre, 63 Mody Road, Tsimshatsui East, Kowloon, Hong Kong

Tel: [phone]
Tel: [phone] Fax: [phone]

Fax: [phone]

iii

ii

&!

i!j

'

i!

~

Canada: 2430 Lucknow Drive, Unit 15, Missisauga, Ontario L5S 1V3 Canada
France: 26 Villa Des Fleurs, 92400 Courbevoie, France
Germany: PO Box 4449, 3300 Braunschweig, Germany
Italy: Via delle Gardenie 33 (Pontia Vecchia Km 33,400), 00040 Pomezia-Roma, Italy Tel: [phone] Fax: [phone]
USA: PO Box 9004, 18111 South Santa Fe Avenue, Rancho Dominguez, CA 90221 USA Tel: [phone] Fax: [phone]

Whilst every effort has been made to ensure the completeness and accuracy of the information in this
handbook, no liability can be accepted for any errors or omissions.

Tel: [phone] Fax: [phone]
Tel: [phone] Fax: [phone]
Tel: [phone] Fax: [phone]

Strand Lighting Ltd. reserves the right to amend the specifications of the product at any time.
This document is issued on condition that the information contained herein is not copied, reprinted, or

otherwise duplicated by a third party wholly or in part without the consent in writing of Strand Lighting
Limited. Certain features of the equipment described in this document may form the subject of patents or
patent applications.

© Strand Lighting Limited 1990

Contents

Section

A

B

C

D

E

F

I.

:J

G

Introduction
Functional Block Description
Signal Descriptions
Memory Map
Test Specification
Appendices

Drawings

Issue 6

-i-

Introduction

1 PURPOSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A1

2 SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A1

3 OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A 1

4 REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A 1

CONTENTS

I

Issue 6 -i-

Introduction

1

2

l

I

3

PURPOSE

The purpose of this document is to describe the hardware of the MX console
range in detail.

SCOPE

This document, together with the associated circuit diagrams, should impart
enough information about the hardware for service and test. A part of this
document is the test specification for the

The reader is assumed to be familiar with lighting concepts and the terms such as
DMX512 etc. Information may be found in the references.

MX range of products.

OVERVIEW

In order to make the circuit design manageable, the hard~are can be split down
into functional blocks.

~

9

'3

-~

-~

;3

~

~

·~

-~

4

Section B describes these functional blocks and describes how these blocks are
related. The inputs and outputs of each block are described, with references to
related documents for further detail. Any relevant assumptions and calculations
are contained here.

Section C describes the signals that pass between the various functional blocks
and what controls each, its reset [power-up] state and any special information
relating to the signal. This is primarily for software reference.

Section D details the memory map.

Section E is the test specification for the MX product range. This covers what is
required of the in-circuit tests and functional tests which are strongly related to
the Built-In-Self-Test

- BIST - functions of the software.

REFERENCES

[1]
[2]

MX - Design Specification 2.0, Doc. 1X33154

- System Architecture 2.0, Doc. 1X33180

MX

~

~

Issue 6

-A1-

11i

INTRODUCTION 1X33213

[3] D54 - Document 3X31110, Issue 2
[4] AMX192 ­[5] DMX-512 -

[6] SMX

USITI [revised version - Feb 87]

USITI [Aug 86], revised April 1990

- Document 3X32478, Issue 2.04

[7] EIA standard - RS-232-C, August 1969, June 1981
[8] EIA standard- EIA-232-D, January 1987
[9] MIDI standard specification 1.0, Version 4.1, January 1989

[10] IEC 65 - General Construction
[11] IEC 335 - Household and similar appliances
[12] BS 800 - RF characteristics
[13] 80C196KC user manual - Intel 270704-001 May 1989
[14] 80C196KC data sheet - Intel 270741-002 January 1990
[15] 8279 data sheet - Intel 290123-002 September 1987
[16] Toshiba8-bitMicroprocessorDataBook, September 1988-TMP82C79P-2
[17] Mullard technical handbook, Book 4, Part 9a - SCN 2692, 18 August 1986.
[18] Philips Components - AN174, Book ICU, December 1988
[19] Philips Components - ANl 76, Book ICl 1, December 1988
[20] Philips Components - NE570/571 Product Specification,

Book ICll 14-11-88

[21] Mitsubishi MDS-MEMCARD-07-9-88-250

[22] Circuit diagram 6B 40045
[23] Circuit diagram 6B 40046

[24] Logic source files 7X 33390

Control PCB
Fader PCB

Control PCB: IC's 28, 31

-A2-

Issue 6

Functional Block Description

CONTENTS

1

2

2.1

2.1.1

2.1.2

2.1.3

2.1.3.1

2.1.3.2

2.1.4

2.1.5

2.2

2.2.1

2.2.1.1

2.2.1.2

2.2.2

2.2.3

GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

PROCESSOR PCB................................. 81

Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B 1

General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

1/0 Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Memory.......................................... 82

General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Memory Map Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Memory Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

PSU............................................. 84

5V Switching Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Power Fail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

+9 I -9V Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Battery Back-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

83

2.2.3.1

2.2.3.2

2.2.4

2.2.5

2.3

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.6

Issue 6

Back-Up Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Back-Up Circuit . . . . . . . . . . • . . . . . . . . . . . . . . . . . . • . . . . . . . . 85

Memory Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Test Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Corn ms.......................................... 87

DU ART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Reset............................................ 87

D/A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Analogue Synchronisation Signals . . . . . . . . . . . . . . . . . . . . .

Analogue Drive ......... : . . . . . . . . . . . . . . . . . . . . . . . . . . 81 0

RS

485 (DMX/SMX) ....................... . ........ 810

-i-

88

FUNCTIONAL BLOCK DESCRIPTION

2.3.7 RS 232/RS 485 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 811

2.3.8 MIDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 811

2.3.9 Test Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 812

1X33213

2.3.9.1

2.3.9.2

2.3.9.3

2.3.9.4

2.3.9.5

2.4

2.4.1

2.4.2

2.4.3

2.4.4

2.4.5

2.5

2.5.1

2.5.2

3

3.1

DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 812

DIA, Analogue Drive and Synch. Signals . . . . . . . . . . . . . . . . . . . . . . 812

RS 485 (DMX/SMX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813

RS 232/RS 485 . . . . . . • . . . . . . . . . . • . . . • . . . . . . . . . . . . . . . . 813

MIDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813

Audio ........................................... 813

Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813

Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 814

ALC Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 814

Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 815

Test Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 815

LED Drive/Keyboard Control . . . . . . . . . . . . . . . . . . . . . . . . 815

LEDS ............................................ 816

Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 816

FADER PCB ...................................... 816

Address Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817

3.2

3.3

3.4

3.5

Analogue Multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817

Flash Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817

LED Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817

Test Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B 18

Figure 1 D54 / AMX Timing Signals

- II-

Issue 6

Functional Block Description

1

2

2.1

I

2.1.1

GENERAL

The general design principles are discussed in the System Architecture document
(ref. [2]). This description splits the circuitry up into the processor PCB which
contains all of the processing electronics, power supply, interfaces and
connectors, and the fader PCB, of which there may be up to 4 in a system.

PROCESSOR PCB

The processor PCB is split into functional blocks according to the schematic
drawings. These are each given individual sections, and at the end of each section
and there is a description of the (BIST) test facilities offered by each functional
block.

Processor

General

I

I

2.1.2

The processor is an 80C196KC. This is the latest version of the 80C196, an
upgrade from the 80C196KB. The processor runs with a 16MHz maximum
crystal and a very fast external bus. This leads to the requirement for use of AC
series high speed CMOS in most areas of the processor logic (refs. [13], [14] &
[15]).

The processor includes all the MCS-96 I/O, but with the extra features of 2 extra
PWM outputs and the Peripheral Transaction
response. The two extra PWM outputs are used to drive the LCD contrast and
backlight intensity.

Seiver which allows faster interrupt

1/0 Facilities

In order to reduce costs, all on-chip I/O facilities are used in this implementation.
The input and output ports are used to control specific I/O devices . The HSO is
used to generate timing synchronisation signals for the dimmer analogue
multiplex signals and a test signal for the audio processing circuit. The HSI is
used for time-stamped inputs and other interrupts. The
reading the fader values and for testing parts of the circuit

ND converter is used for

Issue 6

-81 -

FUNCTIONAL BLOCK DESCRIPTION

1X33213

2.1.3

2.1.3.1

Memory

General

The 80C 196KC bus is extremely fast, therefore in order to run without wait states,
the memory has to have a very fast access time. The INST pin is used to expand
the total address space available to the application code. Two 64K x 8 EPROMS
(27C512) are used and these are configured to be word wide to get the best
performance from the processor. Timings are dependent on the memory decode
delays, and these are set by the decode devices (see below) . To run without wait
states, the EPROMS need to have lOOns max. access.

For the 12/24 way versions, 1 wait state is inserted, as these cannot stand the cost
penalty of lOOns devices. In order to meet the timing requirements with lO0ns
parts, a pair of tri-state buffers, IC's 30 & 33, were added to reduce the output
enable delay

The analysis provided in the System Architecture Document (Ref. [2]) shows that
32k x 8 SRAM is required as a minimum. The design allows for a pair of these
devices to be used so that expansion is possible without laying a new PCB.
Because of the high speed bus, it was not possible to economically design 0 wait
state RAM into the system. Therefore 16 bit RAM with 1 wait state was
implemented, with 2 devices fitted from the outset. Critical elements of the code
use internal registers to speed operation . When the protected RAM area
( controlled by the GAL programming) is write-protected,
states.

time.

it is READ with 0 wait

2.1.3.2

1/0, including the memory card, is run in 8 bit mode. The processor's

All
buswidth is dynamically changed by the memory decode GAL's using the
buswidth pin.

Memory Map Decoding

In order to provide maximum flexibility and cost effectiveness, a pair of
GAL20V8-15 devices (IC28, 31) are used to decode the memory map.

The devices generate the necessary wait states for the READY pin. See the
section on memory map for exact memory mapping. The processor provides two
output port pins to allow
of wait states. On the 48 way version lOOns ROM's are fitted and the processor
switches these into 0 wait state by setting the ROM WAIT pin low. It defaults to
high - 1 wait state - at power up.

An extra 3 to 8 line decoder, IC 32, is used to generate the peripheral enables to a
high resolution so as not to waste address space. All peripherals run with 3 wait
states. 1 wait state adds 1 CLKOUT cycle to a given memory access.

it to page the code part of ROM, and control the number

-82- Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

2.1.4

I

Memory Card Interface

The memory card interlace is derived from a Mitsubishi application note
MDS-MEMCARD4l7-9-88-250 . The circuit allows the card to be inserted
while the system is powered up, and also allows the power to be switched on and
off while the card is inserted. All lines to the card are buffered by tri-state devices,
these being controlled by the card detection signal (/CD) and /RESET gated
together. This ensures that:

a)

b)

The /CD signal is schmitt triggered with an RC input network to ensure reliable
control.

The power to the card is also controlled by a transistor VT 13, enabled by the

above signal.

The signals are not enabled until the card is in place (because of the /CD
contact and switch-on delay).

During

MX power up/down sequences the lines are tri-state .

Data is controlled by a bidirectional tri-state buffer, IC38, a 74HC245. Its
direction is controlled by the

gated with a decoded /CE_CARD signal.

I

The full address range of the card is catered for by a page register IC41, a
74AC573 latch. This has a tri-state output controlled in the same way as the
above data and address buffers. Before reading or writing to the card, this page
register is loaded with a high order 8 bit address by a uniquely decoded memory
address. This solution provides 255 2kbyte windows onto the card giving a

0.5Mbyte possible max. addressing range allowing the use of larger cards in the
future.

The status signals from the card are all fed to the DUART's input port for reading
by the processor. Mitsubishi cards give 2 pieces of information that other cards do
not generally give. These are:

The WP output. This tells the system, when high, that the card's write-protect
switch is on and the card cannot be written to. The card protects itself, even if
writes are attempted.

MX uses 64Kbyte cards initially.

/RD signal and it is enabled by the above signal

Issue 6

The BO, B 1, B2 outputs. These tell the system what type of card is connected. The
codes are as follows:

-83-

FUNCTIONAL BLOCK DESCRIPTION

1X33213

BO

RAM 0
OTP ROM 0
Mask ROM 1

In the MX system, these are connected to IP4, IP5, IP6 respectively.

2.1.5

Test Facilities

The memory card interface incorporates the facility to allow the card battery
voltage to be read. The processor reads this via a multiplexer that is powered from
V _RAM (See 2.2.5). The card voltage should be read in the A/D's 10 bit mode
and is O.K. if above 2.60V. (Mitsubishi figure).

2.2 PSU

2.2.1 5V Switching Circuit

B1

0

1

0

B2

0
0
0

The heart of the power supply is the switching regulator, the STM L4963 (IClO).
This chip fully implements a buck converter and includes all the necessary power
handling circuits. It is ideal for MX because it incorporates power fail and reset
circuitry also, with a minimum of components.

2.2.1.1 Input

The circuit runs off a 15V nominal supply, this may be 23Voffload and its worst
case load must be>= 15V. The input is filtered with a 2200µF cap. and contains a

1.35A polyswitch and l.5kW/5W transzorb with a maximum clamping voltage
of approx 43V. This provides over/reverse voltage protection. The polyswitch
will hold LOA continuously at max. operating temperature (35°C)
temperature rise of 15C. A twin hole bead, Ll6, is wound with two windings in
phase opposition to attenuate mains-borne asymmetric RFI.

2.2.1.2

Power Fail

The power fail element of the L4963 (pin 7) has a threshold of 3.6V falling and

4.4 V
to raise the thresholds to 1 OV and 12- l 2.5V respectively. This is a low impedance
divider to swamp the internal divider to reduce tolerance errors. The low going
threshold is set to allow 1 V before the L4963 falls out of regulation. In practice

+ internal

rising~ A precision external voltage divider is placed around pin 7 of the chip

-84-

Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

this was measured as 8V, but the spec. gives a worst case 9V. This 1 V fall requires

a 2000µF capacitor minimum to provide the System Architecture's requirement
of a 2ms warning period, assuming a constant current load. The 2200µF capacitor
provides enough reserve. The lOV level provides for an allowable supply droop
of approx. 30%, more than is required by the design spec. because it was thought

at design review that the board should work with a 240V transformer on a 220V

I

supply and should therefore work to 198V.
Power fail is also connected to the enable of the decoder driving the source

transistors for the LED's. This disables the LED's at the instant of power fail and
therefore extends the available warning period to approx. 4ms.

2.2.2

1

+9 I -9V Regulator

MX requires both positive and negative rails for D54, RS232 and analogue signal
buffers. The ideal voltage is around 8.5V to give RS232 signals of sufficient

I

amplitude, without making the D54 driver dissipate too much power. At least

8.5V is needed on the positive rail to allow for voltage drops in the D54 driver
which must be able to output 6V (nominal +20%).

The solution was to wind a pair of secondaries on the main inductor, creating a

I

pair of flyback converters to generate a nominal +/-14V. This is then regulated

down to + and -9V by a pair of 7809 regulators. The stacking configuration of

regulators is used as it was possible to provide a pair of isolated secondaries

without extra expense over a split secondary, and this lowers the component

count.

14V is required to maintain regulation with the worst case input of lOV and

lowest load current. The current needed is approx 40mA on the negative rail and
90mA on the positive rail (the asymmetry is caused by D54 signals). The devices
incorporate thermal shut-down protection and over current foldback protection.
78 series regulators are used as power dissipation could be a problem in the worst
case, particularly on the positive rail.

2.2.3

2.2.3.1

2.2.3.2

Issue 6

Battery Back-up

Back-Up Power Source

The CMOS RAM in MX is supported on a 3.6V Ni-Cad cell.

Back-Up Circuit

The back-up battery is switched into the
diode D18, dropping approx. 0.6V.

-85-

V _RAM supply by a simple silicon

V _RAM must be at least 3V so that the

I

FUNCTIONAL BLOCK DESCRIPTION

memory card, ifleft connected, is not discharged by the AID multiplexing circuit.
The battery is charged at a current of approx . 3mA. This current is above the
normal trickle charge as the operation of the product is somewhere between
standby and cycle. V _RAM is connected to the 5V rail by VTl , the circuit
ensuring that V _RAM is always at 5V during normal use, giving maximum noise
immunity.

A prototype PCB yielded a l.6µA back-up current at 25C.

2.2.4

Memory Protection

As part of the Architecture, MX incorporates comprehensive memory corruption
protection . The RAM chip select (active low) is driven from a 74HC00, IC21,
which is powered from
will operate down to 2V. /RESET is gated by the HCOO so as to guarantee that
upon reset the memory chip select becomes inactive high. The L4963 ensures that
RESET falls before the 5V rail goes out of tolerance.

V _RAM and only consumes approx. 1 µA on standby and

1X33213

I

I

I

I

I
I

I

]

I

~I

:-i

I

I

I

I

2.2.5

Test Facilities

MX is equipped with a test connector to allow voltage measurements to be taken

at one place. All power rails and internally generated references are available on
this connector, as are the two processor test inputs. The test inputs are deliberately
not buffered (or debounced) so as to retain the minimum amount of hardware
between the processor and outside world for the PCB functional tests. The power
supply may be turned on and off by use of the
turns off the L4963 and hence the other rails, allowing remote supply cycling and
making a memory retention test easier to perform.

The power supply circuit also permits the processor to sample the relevant signals
to perform its internal diagnostic tests. There is a particular problem with this
approach where the battery voltages have to

be powered from the V _RAM supply so that V _RAM does not attempt to power

the rest of the board via the multiplexer protection diodes. The worst case standby
current is 5µA for the 4051 and this is an acceptable drain . One gate of IC21 is
used to disable the multiplexer in reset.

Unfortunately, the processor
could result in a 0.3V ( 10%)
fed back to the multiplexer via 470R as well as a 100k resistor. This allows the
processor to check its input leakage current by comparing the two voltages. The
voltage read on CAL_ VOLTS can
leakage (within the power supply reference tolerance of +/-2% ). Having read the

AID has a worst case DC leakage of 3µA and this

drop at the AID. Hence the battery back-up voltage is

be assumed to be accurate regardless of

/INH signal. When held low, this

be sampled. The multiplexer has to

-86-

Issue 6

:r

1X33213

FUNCTIONAL BLOCK DESCRIPTION

value of BATI_ VOLTS and taken the difference, CARD_ VOLTS can be

. measured, and since the input resistors are equal in each case, the difference

directly added to arrive at the absolute card voltage.
This method saves a buffer IC and associated components, and since these

voltages are read infrequently, has no performance implication. Since the card
voltage and back-up voltage are of similar magnitude, the method is accurate.
The difference should be measured each time the card voltage is read, as
temperature fluctuations

will be significant as far as input leakage is concerned.

2.3

2.3.1

I

Comms

DUART

The Duart used in MX is the S CN2692. This is functionally similar to the familiar
2681 chip, but is fabricated in CMOS. It provides the majority of the I/O
associated with the various comms links, analogue and digital. The two
asynchronous link requirements are:

1 MIDI-full duplex, fixed baud rate: 31250, 1
2 RS232 -full duplex, variable baud rate up to 19200, 1
MIDI was allocated to channel A, RS232 to B. Unfortunately the two baud rate

range(s) are not achievable with one clock source because of incompatible

division factors. The solution is to supply 4MHz divided from the CLKOUT of
the processor (8MHz) to the internal timer/counter of the chip. The timer/counter

can be set to give exactly 31250 baud. The RS232 links are supplied by the
DUART's own crystal oscillator at the obscure frequency of 3.6864MHz. The
Duart provides its own fixed dividers from this frequency to generate all the
required standard baud rates accurately up to 38400 baud.

% tolerance

% tolerance

r

2.3.2

2.3.3

Issue 6

Reset

In common with the 8279, the 2692 requires a positive RESET signal. This could
have been derived from the /RESET signal, but the signal would be very short ( 16

state times

Therefore a processor port pin generates the signal PERIPHERAL_RESET. The
port pin automatically goes high on reset, software must pull it low to operate the
peripherals.

= 2µs) and the 8279 does not quote a minimum acceptable time.

D/A

The D54 and AMX92 dimmer drives require a D/A converter. The DAC08 was
chosen. It does not have a bus interface, so is connected to the 2692 output port.
The details of this connection are discussed in the section

-B7-

on pin allocations.

FUNCTIONAL BLOCK DESCRIPTION

1X33213

The DAC08 provides a Vlc pin to set the operating threshold of the logic inputs to
make them compatible with many different logic families. In this
implementation, the pin is used as an enable, /D _A_ENABLE. The device
guarantees that the logic threshold levels will be 1.4V typically and 1 V worst case
above Vic. Hence by connecting /D_A_ENABLE to HSO.O, the processor has
effective control of the D/ A, with /D _A_ENABLE high the D/ A output is forced
to 0.

The DAC08 is a current based converter and therefore requires a reference
current. In order to provide the user with the facility of being able to trim the
analogue output voltage from the LCD ( to compensate for line drops and dimmer
matching) and implementing the philosophy of removing
system, the reference current is processor derived. The Design Specification
requires a +/- 20% variation. This is achieved by integrating one of the three
pulse-width-modulation (PWM) outputs (PWM_O) over a sufficient time so as
to produce a DC voltage with less than 0.5 LSB ripple. The converter provides a
multiplying function between this reference and the digital input byte, therefore
controlling the effective maximum output current with the PWM value.

The PWM frequency is set to the highest possible with this aim in mind (31250Hz

@ 16MHz), and is integrated using a 3k3 resistor and lOµF cap. The time constant

of the reference network is therefore 17ms since the voltage is converted to
current by another 3k3 resistor (to keep analysis simple) and the DAC08
reference input is a virtual earth. Using the data sheet values for the Yoh of the
PWM output, it will provide approx. 4.8V at the reference current. In order to
provide the+ 20% headroom, the standard PWM output will be 200 decimal. This
is divided by two by the reference smoothing network to give 1.88V, giving a
standard reference current of 0.57mA, peak about 0. 73mA. The recommended
range is 0.2 to 2mA, and keeping on the lower edge keeps power supply current
low and reference smoothing capacitor small. The positive input of the reference
amplifier is connected to analogue OV; no resistor is used to compensate for the
worst case 3µA bias current, as this is only approx. 1 LSB.

all pre set pots. from the

:JI

I

]

Cl

]

~i

·-1

:JI

J

:J

I

:JI

I

:J

]

I

""]

I

:i

J

I

~I

~

I

J

I

I

!

~!

I

2.3.4

The output current is converted to output voltage by the output amplifier.

Analogue Synchronisation Signals

Different synchronisation pulses are needed to generate D54 and AMX192
dimmer control signals. The electrical requirements are different, but the timing
of the relevant control signals is very similar. Fig. 1 shows D54 and AMX sample
waveforms and the control lines that generate them. The HSO's were seen to be
particularly suited to generating these control signals as they must be precisely
timed pulses.

-88-

Issue 6

J

I

i

I

I

I

I

i

1X33213

FUNCTIONAL BLOCK DESCRIPTION

Dimmer 1

D54 signal end of frame

I

D54 sync. (HS0.1) I

45µs

I I I

I

UI _ I _I

Bµs

i i !

/ENABLE_D_A(HSO.O)!- ---u -1--

1

~

DIA loaded

Dimmer 1 Dimmer 2

AMX 192 signal

~

I

~

Dimmer2

~

... Dimmer384

... Dimmer192

! I

I

50µs

j end of frame j i '

(·l Bµs J I

~

7

I

°"" min. ,j

I

AMX sync. (HSO 2) I i

I I I.-----,

I I · ! I I i !----1

TX_RS4B5 i i ! I I I i i

--------~---------~----------~--1---~-----~--------~-----~----

'

'

AMX

AMX

CLOCK+
CLOCK-

I

I

I

'

I

I

I

I

I

'

I

I

'

I

'

'

I I

r-DIA loaded

Issue 6

Figure 1 - D54 I AMX Timing Signals

-89-

FUNCTIONAL BLOCK DESCRIPTION

HSO .0 and HSO .1 were chosen to drive ID _A_ENABLE and D54_SYNC
respectively, as they can be driven together in one HSO instruction. This allows
the processor to set up the DIA and generate the D54_SYNC at the same time,
without having to return to service the end of the sync. signal. It also gives a fast
transition between the sync. and the analogue level. The sync. is generated in
form of a current defined by Voh of the HSO output-0.6 (diode drop) and the
referenceresistor(s) . A pairof3k3 resistors were used, resulting (when the DIA is
disabled) in a output sync. pulse of approx. -5.5V, allowing plenty of headroom
for any D54 receiver. The arrangement algebraically adds the

(negative) and the reference current (positive) into a virtual earth- the hardware

does not have to combine sync. and D/ A output with analogue gates.
HSO.2 is used to generate AMX_SYNC and is gated with the TX output of the

processor. This signal drives the RS485 transceiver, IC8. The two signals are
NANDED, so to use TX, HSO.2 must be high, to use HSO.2, TX must be idle.

1X33213

the

DJ A output current

2.3.5

Analogue Drive

This section of the COMMS circuit consists of 1/4 of a TL084 op-amp coupled
with an LM6321 buffer amp. The TL084 provides an almost ideal op-amp for the
low current output of the DI A, and is arranged as a
converter . Enclosed in its feedback loop is the LM6321 buffer (IC7). This device
provides +/- 300mA drive and is stable into very heavy capacitive loads. It is
purpose designed for driving long lines. It incorporates current limiting and
thermal shut-down protection . Voltage protection is provided by a bidirectional

12V transzorb, D 17, with its capacitance providing half of the LC RFI rejection

network. The D54 output requires a source impedance of 4R 7, the AMX output,

lOOR. The same amplifier is used for both as the protocols are supported on a

mutually exclusive basis.
The standard output current has to be converted to +5V by the resistor in the

feedback loop of the amplifier, hence this resistor is:

5/.057

An intelligent feedback system is used to set the PWM value, and this
compensates for differences in processor Voh values and de-sensitises the
requirement for the accuracy of this resistor . Even so, 2% components are used in
the whole subsystem so as to limit the possible tolerance build up. An 8k2 resistor
is used.

= 8.77k

virtual earth current to voltage

2.3.6

RS 485 (DMX/SMX)

The RS485 output provides the several mutually exclusive functions on MX :

-B10-

Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

2.3.7

1.

2.

3.

The IC used is a standard 75176. The receive function is permanently enabled as
the receive section of the processor UART may be disabled internally. Protection
is provided against transients with transzorbs across the driven lines to ground.
These, together with inductors, provide RFI protection.

To drive the SMX protocol. This is achieved with the 80C196 UART.

To drive the DMX512 protocol. This is achieved with the 80C 196 UART.

To drive the AMXl 92 sync. pulses. The HSO.2 output of the processor is
used for this function. lOOR resistors are used in series with the outputs as
the AMX spec. requires.

RS 232/RS 485

The RS232 port is implemented with a 75155 single channel transceiver. This is
powered from the
This is sufficient to maintain the
specification . Protection against interference and voltage transients is again
provided by transzorbs and inductors.

+/- 9V rails which produces a signal range of approx. +/- 7V.

+/- 3V swings required by the RS232

2.3.8

It was decided (in the Design Specification) that modem control lines would not
be implemented, as this would only serve to complicate the software, increase the
cost of the hardware and give the user no real added benefit. However, as
as a DCE, the DCE's required output modem control lines (pins 5,6 and 8) are
pulled high (active). Sometimes receiving equipment locks out if these lines are
not valid, this prevents that situation occurring.

This port also has an RS 485 transceiver (7 517 6) to enable direct use of SMX. Its
transmit and receive functions are separately enabled by /ENABLE_RS485_TX
and/ENABLE_RS485_RX, allowing comprehensive loopback tests. The gating
arrangement around IC 35, 21, 23 toggles the RXDB line between the RS232
transceiver and RS485 transceiver. The application software can decide on the
receive source and can
transceiver and associated components are not fitted for

tum the line around during SMX comms. The RS485

/B (standard) build.

MX acts

MIDI

The MIDI interface is implemented using variants of the circuits detailed in the
MIDI specification. The optocoupler chosen is the GE Hl lLl, as it provides the
required sensitivity (l.6mA), is specified to work up to 1 Mbaud, and
incorporates a schmitt trigger output. Using this, rather than a darlington output
device, results in better rise/fall time control, and
factor that governs the durability of the interface because the signal becomes

tum on/off time ratio. It is this

Issue 6

-811-

/

FUNCTIONAL BLOCK DESCRIPTION

more asymmetric, the more MIDI devices it passes through . The absolute skew is
irrelevant, but the asymmetry is not. The HllLl specification states:

Ton

This would only result in 2% asymmetry.

The actual figures achieved depend on the matching of the drive current to the
LED. The input resistor has been increased above the MIDI spec. to 820R, to
reduce saturation, giving a good performance at 2.SmA. In the actual application
(SmA worst case), there is still approx. 100% overdrive, this being maintained to
allow for LED degradation over time and component tolerance. The figures
achieved were:

= 900ns, Toff = 2.Sµs, giving a 5% asymmetry

Ton

The through and output signals are driven by a 74AC14, IC3, capable of
supplying 24mA, and a lower level of voltage protection is supplied by BAS 16
clamp diodes. RFI protection is provided by the series inductors. The MIDI
interface was seen to pose less of an interference and transient hazard as it only
involves connection of short cables in temporary installations .

1X33213

= 0.65µs , Toff = l.2µs

2.3.9

2.3.9.1

2.3.9.2

Test Facilities

In common with the other elements of the circuit, the COMMS circuits
incorporate extensive test facilities.

DUART

The DU ART has the internal capability to allow most of its registers to be read
back by the processor. This should give adequate indication of DUART
operation .

DIA, Analogue Drive and Synch. Signals

There is no direct test on the
little difficult to test! The output of the analogue driver is fed back to an analogue
multiplexer for sampling by the processor

DI A and driver block as a single entity. The input is protected by a 4k7 resistor

the
and diode clamps. The 10 bit resolution of the
to be performed .

DI A converter itself, as being current based, it is a

A/D. This allows a functional test of

AID could allow monotonicity tests

The D54 synchronisation signals can be tested by splitting the control of the
HSO.0 and HSO.1 signals. By enabling the

-812-

DIA (/D_A_ENABLE = low) and

Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

setting the sync. signal (D54_SYNC) high, it is possibie to perform an additive
function between the D/ A and the sync. current,
check

The
this
and the

limited by the power supply reference tolerance of +/-2%.

t.lie result.

DI A reference signal, D _A_REF, is also·fcd back to a!! analogue multiplexer,

allows the processor to check that both the PWM and integrator are working,

absoiute value of the reference for setup purposes. The accuracy will be

usingJhe read-back AID input to

2.3.9.3

2.3.9.4

2.3.9.5

RS 485 (DMX/SMX)

As indicated in the RS485 section, both RX and TX are permanently enabled, this
allows the processor to read the actual RS485 data that
use of loopback connectors.

RS 232/RS 485

. The RS232 drivers require loop back connectors to be · used to check their

operation. The DUART has to
reception. This

/ENABLE_RS485::._TX and /ENABLE_RS485_RX. To perform a test on this

port, both the functions
receiver disables .the RS 232 receiver.
arranged so that the line is tri-state during

MIDI

The MIDI interface drivers are tested in the same way as the RS232 drivers.
loop backs being used so that the processor can transmit and receive its

port also has an RS485 transceiver and this has 2 control lines

need to .be enabled. The act of enabling the RS 485

transm.it data out of the B port and check it on

Th~ /ENABLE_RS485_TX 8ignal is

&11d after reset.

it i3 transmitting without

cwn data.

2.4

2.4.1

Issue 6

Audio

I

The Audio input to M:X provides comprehensive automatic level control to assist
the user. This
requirements for a 60dB dynamic range; this is achieved using a
compandor in ALC configuration .

~frcuit is arranged so_ that it meets the Design Specification's

ffillips NE571

·

Input

The front end of the circuit consists of a differential amplifier based ·on a 1L084
with a gain of approximately .0.5 and 6dB/octave roll-off above 20kHz. The input
is AC coupled in both signai and

ground lines and has RFI suppression using

-813-

FUNCTIONAL BLOCK DESCRIPTION

appropriate LC networks. This gives the input immunity to noise, DC and 50Hz
common-mode signals. The left and right channels are algebraically added in this
configuration.

The ALC circuit generates a standard Od.Bm signal (0.775 RMS) and the
minimum accepted signal is-43dB from this level ( 43dB is approx. the max. gain
available). This represents a signal of 5.5mV RMS. The maximum level seen by
the compandor will be approx. 11 V peak-peak (3.8V RMS), determined by the
limit of the TL084 output. The gain of the input circuit, has to be set so as to allow
approx. 1

The gain of the input circuit is set to 0.5 so that the compandor just about sees
sufficient level at 10m
possible level of+ 14dBm.

Orn V to 1 0V RMS to be accepted.

V RMS input and works linearly up to the maximum

1X33213

2.4.2

2.4.3

Filter

The filter circuit follows the input circuit and is placed before the ALC circuit so
that mid and high frequency signals do not affect the gain control. This is a simple,
unity gain, maximally flat, 12dB/octave low-pass filter, rolling off above 200Hz.

ALC Circuit

The ALC circuit is built around an NE571 compandor. The design is based on
application notes ANl 74 and ANl 76 for an ALC, with suitable adjustments. The
ALC is constructed around one half of the chip. The adjustments that were made
were:

1. Rdc set to 15k to set the output to +3.6V so that the DC operating level is

satisfactory for an 9V supply.

2. Crect set to l0µF to give a lOOms time constant. The attack time will be
faster than the decay time according to fig. 9 of ANl 7 4 (as required by the
Design Specification). With this configuration lOOms was found to
provide a good subjective response.

The other half of the chip provides an ideal output rectifier from the ALC, as the
precision rectifier element can be accessed independently of the other elements.
The signal is AC coupled into the rectifier, and in order to provide the Design
Specification's required response, a diode is included in the output. This subtracts
a fixed voltage from the (smoothing) capacitor signal, but since this signal is
approximately constant (ALC action), it can be compensated for with extra
output gain - this is not Hi- Fi! The diode does have the added advantage of
giving a small amount of noise immunity. The rise time of the signal on the lµF

-814-

Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

smoothing capacitor is lOmS, determined by the chip's output impedance, its fall

time is set to 50ms by a 47K resistor.

2.4.4

r

Output

The maximum output of the ALC circuit is in the region of (2V - 1 diode drop), ie
approx 1.5V. In order to provide a 5V signal for a schmitt trigger, the signal is
amplified with a gain of approx. 3.5 using 1/4 of the
onto the Audio/MIDI 10k pot.
configuration is used to:

1. Allow the use of only 1 type of pot in the whole product.

2.

3. Allow the processor to check the position of the pot during Audio Test

The configuration is arranged so that MIDI takes precedence. It was not thought
worthwhile providing simultaneous Audio and MIDI control.

A schmitt trigger is used to provide interrupt edges to the processor HSI.2 pin.
This allows software separation of audio level and effects stepping.

Allow MIDI timing signals to be controlled (in software).

procedures.

RV8, together with a MIDI_ENABLE signal. This

11..084. The signal is dioded

2.4.5

2.5

Test Facilities

One of the processor's HSO outputs is divided and AC coupled into the
non-inverting side of the differential amp input stage. This provides a test input to
the audio processing subsystem when the HSO generates suitable frequency
squarewaves. The frequencies are programmed to test the roll-off of the filter
circuit and check for adequate gain.

disconnected during this test.

amp. will behave as a unity gain buffer in this configuration. The resulting signal

will be approx 6m V RMS at the ALC (in the pass band of the filter).

The divide ratio is set to 400: 1 as the differential

Clearly any audio source must be

LED Drive/Keyboard Control

The keys and leds on the control PCB are controlled by an 82C79
keyboard/display driver IC20. This is a clocked synchronous logic block that
continuously scans the keyboard and refreshes the LEDS. It is used in default
display mode (16 character, 8 bit display) and in encoded mode, with the
keyboard in sensor mode.

Issue 6

-815-

FUNCTIONAL BLOCK DESCRIPTION

The clock rate is set to 80KHz by an internal software controlled prescaler, which
divides down the 2MHz basic clock provided by division of the processor
CLKOUT.

1X33213

2.5.1

2.5.2

LEDS

The 82C79 addresses a 16 x 8 array arranged as 16 sources decoded from four
scan lines, and eight sinks. In this implementation, the first 8 sources are actually
on the fader PCB 's, the last 8 are on the control PCB (VT2-9). All sinks are
provided by ICl 7. On the control PCB, IC14 decodes the last eight states of scan
lines SL0-3, IC13 decodes the first eight for the fader PCB 's. Inter-character
blanking is provided by the chip (/BD goes low), and this disables all drives
(IC13, 14), so removing the possibility of crosstalk between columns.

Because the multiplex drive is nominally 16:1, which is in reality approx. 20:1
when the inter-character blanking is taken into account, the LED's have to be
driven with a reasonably high current. This is set by the 4R7 resistors attached to
ICl 7, andICl 7's saturation voltage and the saturation voltage ofVT2-9 . Approx.

lO0mA was chosen giving an average of approx. 5mA. The LED's chosen are

moderately high efficiency and are intensity matched for the 3 colours.

Keyboard

3

The scan lines SL0-3 are also decoded by IC15 to provide the drives for the
keyboard array. Each row is selected individually as the scan counter increments,
and depending on the key pressed, a code is read into the sensor memory of the
chip. Diodes are provided on each switch to prevent interactions if multiple keys
are pressed. The scan process is continuous and results in eight bytes (of which
only 5 are used) in the 82C79 containing the image of the keys pressed. An active
key appears as a Obit. This method is chosen, as opposed to the de bounced FIFO
mode, so that the software can detect how long a key is held on, allowing
perform the auto-repeat functionality required in the spec. Software also
debounces the keys by reading the sensor image array at 5mS intervals.

it to

FADER PCB

The fader PCB is designed so that it can be used in any of the four required
positions in the system with just one switch change. It is also designed so that all
four PCB 's can be daisy-chained on a single piece of ribbon cable from the
processor PCB. This cable carries a six bit address allowing 24 faders and 12
switches to be addressed, the LED matrix signals, and power supplies. A separate
supply is provided for the LED matrix to reduce noise problems.

-B16-

Issue 6

1X33213

FUNCTIONAL BLOCK DESCRIPTION

The ANL_ GND connections are interleaved with the analogue lines out
(ANL_[0 :3]) to minimise cross-talk. The remaining signals are then graded in
order of least to most hostile away from the analogue lines in the ribbon cable.

]

J

[1

]

1

3.1

3.2

Address Decoding

The PCB address is set by the 2 pole/4 way switch. This switch uses 1 pole to
connect the relevant analogue multiplex signal to the analogue bus and generates
3 control bits with the other pole. This 3 bit address is fed into a pair of 4051 's used
as selectors to connect 2 of the 8 column drive signals CA_0 to CA_ 7 to the drive
transistors for the LED's.

There is no per-PCB addressing of the analogue sections of the fader PCB 's, as
there is a dedicated analogue line for each PCB.

Analogue Multiplexing

The analogue multiplexers are supplied with a parallel 6 bit address (via R7-12 to
protect against ESD damage) . The lower 3 bits of this address are supplied in
parallel to each of the 5 4051 analogue multiplexers. A further 4051 multiplexer
talces the 3 upper address bits and multiplexes the 5 multiplexed signals onto one
CM OS buffer, a CA5160. This is used because it can output 0V without a negative

supply and can output 5V on the +9V analogue supply. A buffer was necessary
because of the intrinsic high impedance of the signal, its increased impedance
having gone through 2 multiplexers and the inevitable noise down the ribbon
cable. N.B. The LED switching noise is not a problem because of the architectural
precautions

talcen (Ref. [2]).

ii

•

i

3.3

3.4

Issue 6

Flash Switches

The flash switches are multiplexed in the same way as the faders and are read as
faders. Because the 4 analogue lines are fed direct to the processor port 0, the

80Cl 96 can read the switches in a digital manner. This is convenient because the
4 switches from the 4 possible fader PCB 's are read simultaneously by reading
port 0. Debounce is done in software.

LED Drive

The addressing effectively selects 2 sequential columns of the 16 total addressed
by the 82C79 for each fader PCB using ICs 2,6. The source drivers are on this
PCB as it was easier to select the address than to select the high current drives. The
sink drivers are the ones on the control PCB. The LEDS are arranged in 2 rows of

6.

-817-

FUNCTIONAL BLOCK DESCRIPTION

The peak pulse current, being set by the row sink drives, is the same as that on the
control PCB. It is set at approx lOOmA, as the mark/space ratio will be approx
20:1 as generated by the 8279, giving an average of approx 5mA. The LED's
chosen are moderately high efficiency and are intensity matched for the 3 colours.

3.5 Test Facilities

There is no specific input on the processor to tell the software which model of
board

software will check the 3 test locations of each PCB at power-up. It should find a
sequence of 5V (-10% ), 2.5V ( +/-10%) and 0V ( + 10% ). The tolerances allow for

resistor tolerances and

a fader PCB

multiplexers.

it is controlling. This is done by the test facilities of the fader PCB. The

AID off sets. This unambiguously indicates the presence of

- hence product identity - and the operation of the addressing and

1X33213

:.1

•

I

--

-818- Issue 6

Signal Descriptions

CONTENTS

1

1.1

1.1.1

1.1.2

1.2

1.2.1

1 .2.2 Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C4

PROGRAMMABLE 1/0 PINS . . . . . . . . . . . . . . . . . . . . . . . . . C1

Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C1

1/0 Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C1

Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C1

DU ART....................... ......... .......... C4

1/0 Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C4

Issue 6

-i-

Signal Descriptions

1

1.1

1.1.1

PROGRAMMABLE 1/0 PINS

The Hardware Architecture of MX results in a large number of programmable I/O
pins, these being found on the 80C196 and the DU ART, the 2692. The philosophy
has been to use these wherever possible to eliminate
memory decoding. The sections below indicate the uses of these pins.

1/0 port chips and associated

Processor

1/0 Drive

The processor has a large number of 1/0 pins some of which are configurable to
perform special I/O functions, some of which are general purpose
which are solely inputs or solely outputs . The Intel manuals are do not group all
this information in one place so it is difficult to determine which pin to use in some
cases, especially as there are three variations of electrical properties :

Quasi-bidirectional - 1/0

will pull low to:

0.45V at 2.8mA

1.5Vat7mA

1/0, some of

1.1.2

will pull high to:

as inputs - leakage

Input only (port 0)

leakage = +/- 3µA

Output only

will pull low to: 0.45V at 2.8mA

will pull high to:

V cc-0. 7 at 30µA
Vcc-1.5 at 60µA

= +/- lOµA

l.5Vat 7mA

Vcc-0 .7 at 3.2mA
Vcc-1.5 at 7mA

Allocation

The choice of I/O pins was made by first defining the use of the special pins, using
them in the most effective way for

MX software and the processor's 1/0

Issue 6

-C1 -

SIGNAL DESCRIPTIONS

capabilities, then defining the input only and output only pins for uses that could
only ever require inputs or outputs, then defining the rest with general purpose 1/0
pins.

In MX all the 1/0 devices of the processor are used to their full extent thereby
realising the power of the architecture . This fixes the use of:

UART - RX, TX pins

HSO - 4 HSO pins

HSI - 4 HSI pins

AID - All of port 0

PWM - P2.5, 1.3, 1.4

NMI

EXTINT - P2.2

T2CAP-P2 .7

1X33213

=i

•

I

-

I

•

I

•

I

•

I

•

I

•

I

•

·I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

TEST INPUTS - 2 input only pins, must be direct to the processor

Two inputs can be either HSI and HSO pins. In this case 1 of each mode is

selected. HSI inputs are particularly useful because they allow a events to be time

stamped, so reducing interrupt latency problems .

HSO.0 and HSO .l were chosen for D54 sync. generation as they can be
programmed to act together for easy software drive under normal conditions, but
can be driven separately for test purposes. The section on COMMS details their
use.

The allocation is detailed below, with the reset state shown for each pin.
is driven by external hardware, the state is shown in brackets:

If the pin

E!

I

•

I

•

!

-C2-

Issue 6

1X33213 SIGNAL DESCRIPTIONS

r

T

PORT

PIN

P0.0
P0.1
P0.2 FADER_PCB_3
P0.3
P0.4 MPXR_SIGNAL
P0.5 Vcc/2
P0.6

P0.7

P1.0 /ENABLE_MIDI
P1 .1 /ENABLE_RS485_ TX 1
P1.2
P1.3 /LCD_CONT
P1.4 /LCD_LIGHT
P1.5
P1.6 PAGE SELECT 1 selects top 32K ROM code space
P1.7

FUNCTION RESET COMMENT

NAME STATE

FADER_PCB_1
FADER_PCB_2

X Multiplexed faders and buttons
X
X

FADER_PCB_ 4

X
X Other i/p's from processor PCB
X

AUDIO_LEVEL
GM

/ENABLE_RS485_RX 1 Low enables RS485 RX (disables RS 232)

PERIPHERAL_RESET 1 High to RESET 82C79, 2692

ROM_WAIT 1 high= give 1 wait state, low= 0 wait state

X Averaged audio signal
X Grand master level

1

1 PWM_1 - LCD contrast
1

Reference voltage tocheck AID

Low drives Audio/MIDI pot. to +5V
Low enables RS485 TX

PWM_2 - LCD backlight level

P2.0 TX_RS485 0
P2.1 RX_RS485
P2.2 2692_INT
P2.3
P2.4 M2
P2.5 D_A_SET
P2.6
P2.7

HSO.0
HSO.1 D54_SYNC
HSO.2
HSO.3 TEST_AUDIO
HSO.5 TEST_LED

HSI.0 LED_SYNC
HSl.1 8279_INT
HSl.2

M1 X(1) Test mode input 0

/ENABLE_RAM 1 Low enables RAM protected area

POWER_FAIL 1 T2CAP - processor has less than 2ms to live

/ENABLE_D_A

AMX_SYNC 0

/AUDIO_TRIG

X(O) RS485 receive
X(O) DUART int signal (+ve edge)

X(1) Test mode input 1

0

0

0

0
0

X(1)
X(O) + edge on 8279 key entry

X(1) - edge on music beat

RS485 transmit

PWM_O - D/A reference voltage

Low enables DIA converter
High adds -5V to
High drives RS485 true (provided TX=high)
Squarewave adds signal to audio input
High drives test LED on

/BO of 8279, low when blanking

DIA output

NMI MEM_CORRUPT

Issue 6

X(O) + edge = attempted illegal memory write

-C3-

SIGNAL DESCRIPTIONS

1.2 DUART

1.2.1 1/0 Drive

The 2692 Duart has 7 input only pins and 8 output only pins. The input pins are
CMOS gate equivalents, and IP0-3 have change of state detection capabilities.
The output pins are
control lines and in this mode are open-drain.

1X33213

CMOS gate equivalents also, but OP4-7 may act as modem

•

I

--

1.2.2

Allocation

It was decided that since this device was going to be used (System Architecture),
the output port was best employed to drive the D/ A converter. The output port
drives the D/A (DAC08) directly, although the actual outputs are complements of
the output register. Writing has to be performed in two steps, as there are two
locations - 1 for setting a bit, 1 for resetting it. Therefore the
ensure that this process is indivisible. This may be achieved by writing a word

to the register pair.

The input ports are used for the less important input functions as access to the

processor port pins is much better than to the DU ART pins ( this might require use

of the shared interrupt). One input, IP2, is used to get the clock signal into the
counter-timer for the MIDI channel. This provides with 4MHz derived from
division of the processor's 8MHz CLKOUT signal. The counter-timer must be
set to give the 3 l.25kbaud MIDI frequency.

Four of the input pins are used to detect the status of the memory card (See
Functional Description 2.1.4 ).

MX software must

PORT FUNCTION

PIN NAME STATE

IP0 CARD_DET
IP1 WP 1
IP2
IP3 /POWER_ON
IP4
IPS B1 1
IP6

CLK_BY_4

BO 1 Mem. card type bit 0

B2 1 Mem. card type bit 2

RESET

0 High = Mem Card present

X DUART clock for timer/counter (MIDI)

0 Low when power switch is on

-C4-

COMMENT

High= Card is write protected

Mem. card type bit 1

Issue 6

Memory Map

CONTENTS

1

2

3

GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D1

WAIT STATES AND BUSWIDTH . . . . . . . . . . . . . . . . . . . . . . D1

MEMORY PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . D1

Issue 6

-i-

Memory Map

1

2

GENERAL

The memory map is shown in Fig. 1. The map is divided into code and data spaces
with 64kbytes in each. The map has changed from the original specification (Ref.

[2]) to give more data space, by compressing the peripheral address space to
lkbyte and the card window to 2kbytes. The code space has been expanded with
the bottom 32 kbytes being fixed and the top being paged into 2 equal 32kbyte
blocks.

Memory decoding is achieved with 2 GAL20V8-15 devices and a 74AC138

(IC32). The precise details of the GAL encoding is held in the PLD design file
S4006001.sds (Ref. [24]).

WAIT STATES AND BUSWIDTH

Wait states are controlled with the READY pin. The peripherals and memory card

are run in 8 bit mode (BUSWIDTH

The ROM is run in 16 bit mode, wait states are controlled by the ROM_ WAIT pin.

If ROM_ WAIT is high, (default at power up) 1 wait state is inserted. If the unit is a

48 channel one, then the software switches
completed. ROM then runs with no wait states. This requires lOOnS or faster
parts. 0 wait states are not used on the 12/24 for cost reasons, however, fast

EPROMS will work with 12/24 channel systems.

= 0), with 3 wait states.

ROM_ WAIT to O after BIST has been

J

-_.

•

.,

3

Issue 6

RAM is generally run with 1 wait state. However, in the protected area (see
below), it may be read with

scene and FX information . Advantage is taken of the fact that RAM timings are

faster for reads than writes.

O waits. Protected RAM contains frequently accessed

MEMORY PROTECTION

MX incorporates extensive memory protection. Attempts to write to ROM cause

a non-maskable interrupt (via MEM_CORRUPT) as do attempts to write to the
protected area of RAM or the memory card without first asserting
/ENABLE_RAM. This means that in the unlikely event of a software upset, the

most likely result will be an NMI. The user sees this as a fatal error 1417 "Invalid

Interrupt".

-D1-

MEMORY MAP

1X33213

80C196 MAP

External
Memory

OR

I/O

Reserved

I""---------------

Upper 8 int. vectors

I""---------------

~- ROM ~ecuri~_!c~---

Reserved

,----------------

Interrupt vectors
Chip config. byte

Port 3 & 4 (unused)

External
Memory

OR

I/0

Expansion regs. (KC)
Internal data mem.

(Register file)

External prog. mem

SFRs

Program memory

FFFFH----

32Kpaged

ROM

code area

8000H

2080H
2040H

2030H
2020H

201AH

2000H

lFFEH

0200H
0100H

0020H

32K fixed

ROM

code area

Data memory

AOOOH

1800H

1400H

(INST

not asserted)

24K protected RAM

~------------

8K general RAM

-----------

configurable ROM/RAM
boundary - set to 8000H

20K ROM data area
(language strings etc.)

2K memory card
window

External memory
mapped peripherals

1600= LCD
15C0 = Fader page
1580 = Card page
1440= 82C79
1400=2692

4.5KRAM

-l

I

. i

i

I

I

I

1

I

!

l

_I

J

:a

I

1

1

I

I

...

I

I

I

Figure 1 - Memory Map

-D2-

Issue 6

~

Test Specification

CONTENTS

~

~

~

!

~

~

!

~

~

!

~

~

1 GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E1

1.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E1

2 OVERVIEW OF TEST FACILITIES . . . . . . . . . . . . . . . . . . . . E1

2.1 Test LED......................................... E1

2.2 Test Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E2

2.3 Test Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E4

2.3.1

2.3.1.1 Equipment Needed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E4

2.3.1.2 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E5

Control PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E4

2.3.2 Fader PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E7

2.3.2.1

2.3.2.2

Equipment Needed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E7

Procedure To Test 1-4 Panels Simultaneously . . . . . . . . . . . . . . . . . . E7

2.3.3 Finished Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E9

2.3.4 Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E9

~

~

•

!

J

I

I

1

-

!

J

Figure 1 Test Jig Arrangement

Issue 6 -i-

Test Specification

._j

=

1

GENERAL

The MX control PCB software incorporates extensive Built-In-Self Test (BIST)
functions and the general philosophy of these is outlined in the Design
Specification
These are resident in the standard product's software, which is the same across all
models.

It is required that the control PCB is given an in-circuit- test to detect obvious
manufacturing defects before attempting to run any of the BIST tests. It is
desirable for the fader PCB to be in-circuit-tested, but not essential.

Both the fader and control PCB 's are tested using the control PCB BIST software.

The resident tests may be run in a number of ways, depending on the required

procedure, each mode is optimised for that test procedure. The control PCB

incorporates 2 test inputs on the test connector (PL5)-these are called Ml and
M2. The four possible combinations of these pins give three test modes and the
normal user mode. These pins are connected directly to the processor, so require a
minimum of hardware to perform.

/RESET (available at the test connector) must be asserted briefly when

changing modes.

(IX 33154) and the System Architecture Document (lX 33180).

These pins are only sampled at RESET, so

!!I

~

!!

1.1

2

2.1

Additionally, the tests may be run from the menu system on the LCD, the modes

are split into SERVICE tests, which require the test jig to be attached, and USER
tests, which require no jig. The tests may be run cyclically, to help find spurious

failures, during soak test for example.

Definitions

DMM - Digital Multimeter.

OVERVIEW OF TEST FACILITIES

Test LED

The control PCB incorporates a test LED, which appears on the back panel of a
complete unit. The normal sequence of operation for this LED is:

Issue 6

-E1-

-1

I

TEST SPECIFICATION

1. A brief flash ON after RESET to indicate that the LED is operational.
Failure should be investigated immediately as it means that either the
processor is not running, or the LED itself is not working.

2.

3. A short period ON (approx. 1/2 - 1 sees.) while the LCD is tested.

Having completed the LCD test, the LCD will indicate all further test

information.

A short period
is non-destructively tested.
is faulty.

LED goes off during this period, the LCD is faulty. Having passed the
LCD test, the LED should then remain on as long as the unit is powered

and not RESET. The system automatically resets on finding RAM or LCD
(fatal) errors and therefore keeps re-trying the test sequences.

1X33213

OFF ( approx. 1/2 - 1 sees.) while a small part of the RAM

If the LED does not re-illuminate, the RAM

If the

E: '

l

I

t_ !

t ~

t

2.2 Test Modes

The two test connector pins Ml and M2 provide the following tests:

1. Ml=0, M2=0-Mode 0

Birth:

This is the functional test for the complete control PCB before assembly with the
control panel. This mode destructively initialises all the data areas in the RAM
and does all possible tests in sequence. It is required that all elements of this test
are passed before the control PCB is passed to be assembled mechanically with
the control panel.

The test jig must be connected to run this test sequence correctly. A part of this jig
is also a Gold Brick set of components-fourfader PCB 's must be connected and a
memory card inserted in the card socket. Fig. 1 illustrates the required test jig.

NOTE: The memory card will be formatted during the test procedure, - it
must contain no valuable data!

When the test sequence completes, the board goes into normal operating mode.

2. Ml=0, M2=1 - Mode 1

Cycle:

In this mode, all tests that require no operator input are run cyclically. The control

PCB must have been born and requires the same test jig as Birth above. This mode

-E2-

Issue 6

1X33213

TEST JIG

To Ref 1952 MIDI in
connector (SK2)

[

INTERCONNECTION DETAILS

DMM

Vol~0

+ -

TEST SPECIFICATION

RS 232 Loopback Connections

...----"2'"' To Ref 1952
.__ __ ___,. connector [SK3]

MIDI Loopback Connections

4 4

PL2

5 5 PL3

-------PLB connector [SK5)

PL~ 25 way '0'

:

3

:, To Ref 1952

J MIDI out

SW2
Mode Selection
Switch

Test Connector Details

1. ITEMS
SK1 - 14 way MOLEX socket [O.

Diodes are all type BAT 85
SW1 - 1 pole 6 way rotary switch
SW2 - 1 pole 4 way rotary switch
SW3 - SPST switch

ModeO

Mode 1

Mode2

o..-M2,de3

Closed = 'Reset'

Open = 'Run'

SW3

SPST

SW1 +9V

Voltage Selection J .----9"'-V'------"'--4

Switch

BAT85

BAT85
BAT85

BAT85

CONSTRUCTION DETAILS

Loopback Connector Details

1. PL 1 is 25 way '0' type connector [free)

11

2. PL2, 3 are 5 pin DIN connectors

l

~

+5V anal

/Reset

VRef

M1

M2

+15V

7

[free)

To Ref 1952
Test Connector

[PLS)

2. Mount all switches on suitable panel

3. Wire all components as per interconnection details

4. Check all connections with continuity tester

5. Label switches as shown

Figure 1 - Test Jig Arrangement

Issue 6

-E3-

TEST SPECIFICATION

is designed to allow extensive testing in environmental chambers and may also be
run while cycling the power to the unit to check for memory corruptions etc.

3. Ml=l, M2=0-Mode 2

Fader Test:

In this mode, the unit will only test one or more connected fader PCB's. This
requires considerable user input as all switches and faders have to be exercised to
pass the test. This mode is provided for use on a gold brick system when just
testing fader PCB 's.

4. Ml=l, M2=1-Mode 3

Normal:

1X33213

In this mode, the unit will perform a power-up self test sequence which will be a
subset of the BIST functions, but will be invisible to the user unless a fault is
found. The fault will then be reported as in the tests above. A single message will
normally be displayed telling the user that self tests are in progress. The total time
for these tests will depend on whether it is a cold or warm start.

A cold start is performed when the board was last powered down deliberately
using the on/off switch. A fairly extensive set of tests are performed and then the
board is used as normal.

A warm start is performed when the board was last powered down by a mains
failure. A short set of tests are performed to check the integrity of the Scene, FX,
Patch and Setup memory and then the board is used as normal. Any running
effects or fades continue from their position at power failure.

2.3 Test Procedures

These are split into the three: those for the control PCB, those for the fader PCB,
and those for the finished product.

2.3.1

2.3.1.1

Control PCB

Equipment Needed

1. 4 off tested captive fader PCB's (REF 1953) with inter- module ribbon

cable.

-E4-

Issue 6

1X33213

TEST SPECIFICATION

2.3.1.2

2.

3.

Procedure

1. After in-circuit-test which should detect opens/shorts, missing, wrong, or

If a 48 way system is used in NORMAL mode with slow EPROMs, the system

will crash after the
the EPROM wait states for a 48 way system at this point. A system crash may
corrupt the memory, so causing memory corruptions to be registered at the
next power up. A

Test jig (fig. 3):
DMM.

reversed components, the current version of MX EPROMS should
(low order) in socket for IC36, odd (high order) in IC39.

If it is known that the control PCB is to be part of a 48 way system, the

EPROM type should have lOOnS or less access time (part no 159/B435).

If the system is to be a 12 or 24 way, the EPROMs may have up to 200nS

access time (159/B412). Mark the PCB accordingly on the rear.

The software allows either type of EPROM set to be used for all
modes other than NORMAL.

CAUTION!

BIST sequence. This is because the software switches out

BIRTH sequence should be performed if this occurs

be installed, even

2. Install the battery link, LKl if not already installed.

3. Connect the test jig (Fig. 1) including transformer power supply.

4. Set the test mode to 0, set RESET to RESET.

5. Switch on the power using the PCB mounted switch.

6. Check the following voltages with respect to pin 14 of PL5:

Nominal value Min. Max.

+15V

+5.1V(nominal 5V} 4.95V 5.25V

+SV_ANL

+9V

-9V

VREF +5.1V

14V 24V

nominal 5V - 0.2 nominal5V

BV 10V

-10V

4.95V 5.25V

-av

'

I

Issue 6

-ES-

TEST SPECIFICATION

7. Switch RESET to RUN

8. The BIST will now start to run. Firstly the test LED should light in the
cycle described above, then, as the tests are performed, a banner will
appear in the LCD to indicate which test is under way.

RETRY, if the test does not pass, turn off the unit and find the fault.

Re-do the test procedure until all tests are passed.

NOTE:

a) Some tests are so fast that the banner will not necessarily be seen.

b) Appendix 1 describes each test. The possible errors produced are

1X33213

If a test fails, first

Faults will be presented (as an ERROR) with accompanying
diagnostic information .

listed by number.

c) Appendix 2 describes each error, its diagnostic information and

an indication as to the possible cause of the fault, and suggested
corrective action.

d) The test software is not capable of testing the LCD backlight.

the display does not light up when the RESET is switched to RUN,
this fault should be investigated before proceeding.

9.

10.

11. Switch the unit back on and check that it performs a cold start -ie the

12. Repeat above but this time pull the power plug out, leaving the unit

Switch off the unit using the ON/OFF switch and disconnect the two last
fader PCB's- so making the system a 24 way.

Set the test mode back to

banner appears with the words
display also shows
does a warm start, this is indicative of a fault in the power fail circuitry

(R51-53 or IClO or the pf signal itself).

switched on. Re-power the unit and check that a warm start is performed.

If a cold start is performed, the /POWER_ ON signal is suspect . Switch the

unit off using the ON/OFF switch.

NORMAL.

'Running self test ... '. Check that the

'MX 24 Version ... ' If this does not occur, ie the unit

If

•

I

•

I

•

I

•

I

•

I

•

I

13. When all tests have been completed, and passed, remove the test jig, fit
the test passed label

EPROMS are fitted,

panel.

2.3.3 below.

Note: EPROM change may be required for final product - see

and indicate on the label whether fast or slow

and pass the PCB on for assembly with the control

-E6- Issue 6

1X33213 TEST SPECIFICATION

14. There are no adjustments or other tests to perform.

2.3.2

2.3.2.1

2.3.2.2

Fader PCB

Equipment Needed

1. Captive MX control PCB (REF 1952) set to run fader test, Ml=l M2=0.

2. DMM.

Procedure To Test 1-4 Panels Simultaneously

This test procedure can be used for 1-4 fader panels. Panels not connected will

be included in the test cycles. Ideally four panels should be tested together, so

not
that all four positions for SWl 3 on all PCB 's can

1. Check boards for manufacturing defects.

2. Put all faders at zero, set SW13 on the test panels :

Panel one to position 1
Panel two to position 2

be tested.

i

I

Panel three to position 3
Panel four to position 4.

3. Connect fader panels to captive

4. Check the power rails with voltmeter w.r.t ANL_GND at PLl pin 33:

Nominal Value

+5V_ANL nominal 5V - 0.2

+9V

+5V_LAMPS

nominal 5V - 0.2 nominal 5V

min. max.

av 10V

5. Take control PCB out of reset. LEDs will now be in a short flash sequence:

1.

2.

All LEDs flash on - check for uniformity of brightness.

Single LED on, chasing from LEDl panel 1 to LED12 panel 4­check for no shorts

MX and power up in RESET.

nominal 5V

check at IC9 pin 16
check at IC1 pin 7
check at emitter of VT2

Check

!

I

I

Issue 6 -E7-

-1

I

TEST SPECIFICATION

6. LEDs will all go on for a short time, then off.
The LCD will now indicate the flash button to press, (from SWl panel 1 to

SW12 panel 4 ). On pressing each button, the respective channel LED will
indicate acceptance and the LCD will prompt for the next one. A stuck
key will be indicated by the respective LED being on and an error
message on the LCD. There is an opportunity to re-try the test at this
point.

After SW12 position 4 the next test will start.

7. Take each fader in turn (from VRl panel 1 to VR24panel 4) and set to full
and back to zero. The LEDs will light for any column with faders not at
zero. Check that each fader gives a smooth transition of percentage
values, with reaching 1 % or less at the bottom, 99% or greater at the top.

8. In order to check that the addressing works for on all PCB 's in all
positions, do the following three tests. Set SW13 on the test panels :

1X33213

I

I

I

I

I

I
I
I

:J

I

-i

Panel one to position 4
Panel two to position 1
Panel three to position 2
Panel four to position 3.

Set the board to RESET momentarily, and then to RUN.

Perform test 6 again.

9. Set SW13 on the test panels:
Panel one to position 3

Panel two to position 4
Panel three to position 1
Panel four to position 2.

Perform test 6 again.
Set the board to RESET momentarily, and then to RUN.

10. Set SW13 on the test panels:

Panel one to position 2
Panel two to position 3
Panel three to position 4
Panel four to position 1.

-ES-

Issue 6

i

j

i

1X33213

TEST SPECIFICATION

~

~

~

~

~

~

~

i

~

~

2.3.3

Set the board to RESET momentarily, and then to RUN.

Perform test 6 again.

11.

If passed test fit tested label to all PCB 's.

Finished Product

1. Check that EPROM set is of the correct type. Use 159/B412 type
EPROMS for 12/24 way systems, 159/B435 for 48 channel.

2. Connect the power supply and switch the unit on.

3.

4. Connect an EC90 dimmer (set for auto MUX protocol mode) to the D54,

Check that the unit performs a cold start. If not
again. Verify that no faults appear during power up tests. Verify that all
LEDs illuminate on

DMX and AMX outputs in turn. Using the menu selection SETUP->

-> DIMMER, verify that each output works satisfactorily. Note that

EC90 software versions prior to Al do not support SMX.

all fader panels.

turn the unit off and on

10

2.3.4

5.

6.

7.

Using the Menu system, access the ERROR LOG. Check that there are no
entries in the log, if there are, investigate the cause.

When power up tests pass, leaving no trace in the error

CLEAR menu, and choose the WHOLE SYSTEM option,
by YES. This step ensures that the system has default settings for the customer.

Verify that a memory card fits into the unit and reads / writes correctly.

log, access the SETUP

and press CLEAR, followed

Service

MX provides access to most of the tests via the menu system. The operator is
provided with both USER and SERVICE type tests. The distinguishing
charactaristic is the fact that the jig (fig. 3) has to be used to get error-free results
on a good system when executing service tests. All USER tests may be run
without the jig. The tests are detailed in Appendix 1.

Issue 6

-E9-

Appendices

1 APPENDIX 1 - MX SELF TESTS . . . . . . . . . . . . . . . . . . . . . F1

1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F1

1.2 Test Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F3

2 APPENDIX 2 - ERROR MESSAGES . . . . . . . . . . . . . . . . . . F7

2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7

2.2 Error Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F8

3 APPENDIX 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F20

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F20

CONTENTS

D

3.1.1

3.1.2

3.1.3

3.1.4 Removal of Integrated Circuits Using Heat Re-flow Station . . F21

3.1.5 Replacing Components Using Heat Re-flow Station . . . . . . . F22

3.1.6 Re-flow Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F22

3.1. 7 Component Replacement Using Soldering Iron . . . . . . . . . . . F23

Suitable Tools and Equipment . . . . . . . . . . . . . . . . . . . . . . . . F20

Removal of Small Surface Mount Components. . . . . . . . . . . . F20

Removal of Integrated Circuits Using Cutters . . . . . . . . . . . . . F21

Issue 6 -i-

Appendices

1

1.1

APPENDIX 1 - MX SELF TESTS

Introduction

All tests are performed on the premise that if successful, they will return control to
the user without any message. It is therefore assumed that if the given test does not

produce an ERROR it is successful. There is no positive indication of "PASS".

All test failures are indicated by an ERROR in the format described in this
appendix. This appendix lists the tests with the possible ERROR numbers that
may be generated.

The following tests are performed on BIRTH, in the order listed:

A TOD REF TEST
FADER CONNECTIONS TEST
RAM TEST
ROM TEST
NMITEST

CHECK DATA AREAS

A TOD REF TEST
LCD CONTRAST TEST
LCD TEST

D TO A REF TEST

BATTERY TEST

DTOA TEST

D54 SYNC. TEST

RS232TEST

MIDI TEST

DMX/SMX TEST

AUDIO INPUT TEST

MEMORY CARD TEST

FADER MODULE TEST

CONTROL MODULE TEST

Issue 6

-F1 -

APPENDICES

1X33213

The following tests are performed on COLD START, in the order listed:

A TOD REF TEST
FADER CONNECTIONS TEST
RAM TEST
ROM TEST
NMITEST
CHECK DATA AREAS
A TOD REF TEST
D TO A REF TEST
BATTERY TEST
DTOA TEST
D54 SYNC. TEST
RS232 TEST (internal only)
MIDI TEST (internal only)
DMX/SMX TEST

FADER MODULE TEST (LEDs and stuck keys only)

CONTROL MODULE TEST (LEDs and stuck keys only)

The following tests are performed on WARM START, in the order listed:

A TOD REF TEST
FADER CONNECTIONS TEST
CHECK DATA AREAS

The following tests are performed on FADER TEST, in the order listed:

A TOD REF TEST
FADER CONNECTIONS TEST
FADER MODULE TEST
<repeat>

The following tests are performed on CYCLE TEST, in the order listed:

FADER CONNECTIONS TEST
RAMTEST
ROM TEST
NMITEST
CHECK DATA AREAS
A TOD REF TEST
LCD CONTRAST TEST
LCD TEST
D TO A REF TEST
BATTERY TEST
DTOA TEST
D54 SYNC. TEST
RS232TEST
MIDI TEST
DMX/SMX TEST
AUDIO INPUT TEST

-F2-

Issue 6

1X33213

MEMORY CARD TEST
FADER MODULE TEST
CONTROL MODULE TEST
<repeat>

However no parts of the tests requiring user input (faders, keys etc) are executed.
Tests do not report errors on screen, these may

1.2 Test Descriptions

ROM TEST

This test checks the data part of the EPROM set. Due to the 80Cl 96 architecture,
it is not possible to check the code part of the ROM. However, any EPROM
problems will probably

be highlighted by this test.

APPENDICES

be viewed in the error log.

Possible errors: 1390

RAM TEST

This test non-destructively tests the RAM, ie writes patterns to the RAM, testing
each bit in

tum.

Possible errors: 1389

NMITEST

This test checks that a Non-Maskable interrupt is seen when an attempt is made to
write to an area of protected memory. There are 3 areas - the data areas, the
memory card and the EPROM.

Possible errors: 1391

CHECK DATA AREAS

This test checks the integrity of the protected data areas, by verifying their
checksums.

Issue 6

Possible errors: 1384, 1385, 1386, 1387

FADER CONNECTIONS TEST (at every power-up)

This test checks that a valid set offadermodules are connected to the control PCB.

Possible errors: 1388

-F3-

APPENDICES

1X33213

LCD TEST

This test invokes the LCD CONTRAST TEST. Having done this it puts all
segments of the LCD on for the user to check visually.

Possible errors: 1393

LCD CONTRAST TEST

This test checks that the LCD contrast can be controlled by the processor. It
changes the contrast between max. and min, checking the LCD reference voltage.

Possible errors: 1393

A TOD REF TEST (at every power up)

This test checks that the AID reference (set by two equal resistors R95, 96) is
reading 2.6V

AID (+I-10%).

Possible errors: 1392

BATTERY TEST

This test checks that the back-up battery is within tolerance. Also tests measuring
circuit, giving indication of possible

AID problems.

Possible errors: 1395, 1396

D TO A REF TEST

This test checks the DI A reference generator by setting it to a known value and
checking against the

AID.

Possible errors: 1394

DTOATEST

Having performed a test to ascertain full-scale on the D/ A, this test checks the

DIA by setting each bit in turn and checking it against the AID.

Possible errors: 1397

D54 SYNC. TEST

This test checks that the processor has full control of the DI A and associated
circuitry. It generates a voltage with the
can be correctly superimposed. It also checks that the

DIA and checks that the D54 sync. pulse

DI A can be enabled I

disabled.

Possible errors: 1398

-F4-

Issue 6

1X33213

APPENDICES

RS232 TEST(internal)

This test checks that RS232 part of the DU ART (IC25) is working correctly by

sending / receiving a stream of data internally.

Possible errors: 1399

RS232 TEST ( external)

This test checks that RS232 part of the DU ART (IC25) is working correctly by

sending/ receiving a stream of data external! y using the interface I Cs. It therefore

requires a physical loopback on the 25 pin D type between pins 2 & 3

Possible errors: 1400

MIDI TEST (internal)

This test checks that MIDI part of the DU ART (IC25) is working correctly by
sending / receiving a stream of data internally.

Possible errors: 1401

MIDI TEST ( external)

This test checks that MIDI part of the DU ART (IC25) is working correctly by
sending/ receiving a stream of data externally using the interface I Cs. It therefore
requires a physical loopback between the MIDI IN and MIDI OUT

Possible errors: 1402

DMX/SMX TEST

This test checks that RS 485 port is working correctly by sending / receiving a
stream of data externally using the interface I Cs. No loopback is required, but it is
necessary to ensure that there is no significant load on the port.

Possible errors: 1403

AUDIO INPUT TEST

This is a complex test. It requires the AUDIO/MIDI fader to be set to full to
operate successfully. This is tested before the actual audio input is tested.

An

incorrect setting will give error 404. A series of tone bursts, at increasing
frequency and low level, are then generated by the processor. These are fed into
the audio processor, which should generate appropriate interrupts.

Issue 6

Possible errors: 404, 1405

-F5-

APPENDICES 1X33213

MEMORY CA_RD TEST

BEWARE: This test requires a memory card and will FORMAT it, so

destroying any valuable data held.

This test does two things. First, it attempts to create a file on the card called

TEST.BIN (The card is MS-DOS formatted). Having created this file, it checks it

for integrity. In the second part of the test
pages of the card (64 kbyte) to check that the card page register is working

correctly.

Possible errors: 320,322,324,325,326,336,337,338, 1321, 1323, 1406, 1407

FADER MODULE TEST

This test has. a number of sub-tests. The first is a sequence through the flash
LEDs, followed by all on. Next, the LCD prompts the user to press each flash key
in

turn. The associated LED will light in each case. Finally, the LCD prompts the

user to cycle each fader in turn through its full travel. A full excursion is required
in each case. The percentage level is displayed on the LCD. The user should
check for acceptable performance. The faders must all be at
test

it writes a pattern of bytes into the 32

O before starting this

Possible errors: 1408, 1409

CONTROL MODULE TEST

This test has a number of sub-tests. The first is a 'build' through the control PCB
LEDs. Next, the LCD prompts the user to press each named key in
the LCD prompts the user to cycle each fader

in turn through its full travel. A full

turn. Finally,

excursion is required in each case. The percentage level is displayed on the LCD.
The user should check for acceptable performance. The faders must all be at their
0 positions before starting this test.

(Faders set away from front: TIME A, TIME B, B MASTER, D MASTER, FX
FADE TIME, FX STEP TIME. All others set nearest front)

Possible errors: 1410, 1411, 1412

-F6-

Issue 6

1X33213

APPENDICES

2

2.1

APPENDIX 2 - ERROR MESSAGES

This Appendix describes all possible errors that MX can generate .

lntrodu ctio n

All ERROR 's are reported in a uniform way using MX's central error handler and
the LCD display.

The format is always:

-ERROR####­Ident. string
Diagnostic info.

PROMPT

Each error is allocated a unique number and identification string as a brief
description. Depending on the type of error, some diagnostic information may be
presented . This varies in type depending on the error, and is described below.

The user is prompted with the soft key labels at the bottom of the screen, or if the
error is Fatal (ie the system cannot continue with such a serious fault), the user is
warned that the system is about to RESET itself with the string: "Resetting
system!"

(#### is the error number)

Error numbers appear in two types:

Those with numbers less than 1000 are generally of a less serious nature and are
not logged.

Errors with numbers greater than 1 OOO are regarded as serious and are logged in

the internal ERROR LOG. The log is for both user and service purposes, and
allows the last 100 errors to be viewed.

The errors are not consecutively numbered because each number comprises :

The software module where the error was generated.

The error number within that module.

Some errors, particularly those that are likely to be seen by the user (for example
when a memory card transfer is attempted with no card in place), are translated
into the 3 languages supported. Test and system type errors are only presented in
English.

There are 3 types of general diagnostic data:

Issue 6

-F7-

APPENDICES

1X33213

1) Voltages:

These are presented as a result of internal tests in the form:

X.XX Y. YY Z.ZZ, where X is the voltage read, Y is the highest voltage and Z is

the lowest voltage allowed.

2) Addresses/Data:

These are presented in the form

3) Fader levels:
These are presented as
the fader in question.

Other forms of data may be used - these are described in individual cases.

AAA, where A is the percentage of full travel as read from

IIlIHH, where H is a hexadecimal number.

-

.-I

-

I

-

I

•

I

•

I

•

I

•

I

•

-I

•

I

•

2.2

Error Descriptions

ERROR

Identification:
Diagnostic Information:
Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:

Diagnostic Information:
Type:

Description:
Probable cause:
Remedy:

12

"Record Inhibited!"
None

System/Warning

Record lock is activated, disallowing record/modify actions

Turn RECORD/LOCK

288

"MIDI framing error"

None
MIDI interface/Warning

A byte of MIDI
Faulty MIDI connections or MIDI cable
Find fault or shorten cable

to OFF

data was received with incorrect format

too long

ERROR

Identification:
Diagnostic Information:
Type:
Description:

Probable cause:

Remedy:

289

"MIDI RX overrun"
None
MIDI interface/Warning

A byte of MIDI
MIDI

data was transmitted to MX too fast. or MIDI data transmitted

to MX during test

Reduce amount of MIDI
device.

-FS- Issue 6

data was received before the last was processed

data transmitted to MX or disconnect MIDI

!

~

~

1X33213

APPENDICES

r

•

~

~

'

!

!

!

~

;

~

'

!

'

ERROR
Identification:
Diagnostic Information: File name accessed
Type:
Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information: Filename accessed
Type: Memory Card/Warning
Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information: Filename accessed

Type:

Description:
Probable cause:
Remedy:

ERROR 325
Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

320

"Card full"

Memory Card/Warning

The memory card is full.

There is insufficient room
Delete DOS files not used by MX, or FORMAT card.

322

"Card missing!"

The memory card is not inserted correctly

Insert card,

324

"Card write protected"

Memory Card/Warning
The card
The card write protection switch is set
Confirm that you wish to overwrite
protection to OFF and

"Invalid card format"
Filename accessed
Memory Card/Warning

The card is not MS-DOS formatted, so may not be used yet

The card
Use FORMAT to initialize the card

try again.

is write protected and may not have data saved on it

re-try

is new, or data has been lost due to battery failure

to save data to the memory card.

to ON

data, then change write

Issue 6

ERROR

Identification:
Diagnostic Information:
Type: Memory Card/Warning
Description:
Probable cause:
Remedy:

ERROR 336

Identification:
Diagnostic Information: Filename accessed
Type: Memory Card/Warning
Description:
Probable cause: The card
Remedy: QUIT

326

"Card directory full"
Filename accessed

The card directory has insufficient room for MX

The card may only contain 8 files, MX needs 4 spare entries

Delete DOS files not used by

"Card file error"

The software has detected a fault in the MX

data has been partially corrupted

card reading

-F9-

data files

MX, or FORMAT card

card file read

11i

APPENDICES

1X33213

ERROR
Identification:
Diagnostic lnfonnation:
Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

337
"Card file closed"
Filename accessed
Memory Card/Warning
The software has detected a fault in the MX card file read
The card file
QUIT

has been edited in some way

card reading

338
"Card file missing"
Filename accessed
Memory Card/Warning
The card file requested was not found on the card
The card does not contain the requested

data

QUIT card reading
339

"Partial Transfer"

Filename accessed
Memory Card/Warning
The card file requested was only partially saved or read
There was a fault in the

data, and the transfer was QUITIED

Try again, use CONTINUE to finish reading card data

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:

Probable cause:

Remedy:

352
"RS232 framing error"
None
RS232 interface/Warning
A byte of RS232
Fonnat of
Check fonnat of

data was received with incorrect fonnat

data transmitted to MX is different to SETUP RS232

data transmitted and change either MX or

remote device SETUP accordingly

353

"RS232 RX overrun"
None
RS232 interface/Warning
A byte of RS232
RS232

data was transmitted to MX too fast. or data transmitted to MX

data was received before the last was processed

during test
Reduce baud rate or disconnect RS232 device.

-F10-

Issue 6

~

I

1X33213

APPENDICES

]

1

J

•1

ERROR 354

Identification: "RS232 parity error"
Diagnostic Information: None
Type: RS232 interface/Warning
Description: A byte ofRS232
Probable cause: Remote devices' RS232

Remedy:

ERROR 404
Identification: "Audio fader too low"
Diagnostic Information: % level read, valid max / min % levels
Type:
Description: The audio fader is set too low for the audio input test
Probable cause: Fader set incorrectly

Remedy: Set audio fader to full (10)

ERROR
Identification: "No such handle!"
Diagnostic Information: None
Type:

! Description:

Probable cause: Program fault
Remedy:

data was received with incorrect parity

data SETUP was different to MX,

faulty connections present, or cable
Change EITHER MX OR remote device SETUP accordingly,
find bad connection or shorten cable

Test/Warning

1001

System/Fatal

The system has attempted

System reset

to access a non-existent "device".

too long

ERROR 1002

q

C

r Probable cause: Program fault

~

L

Identification: "No such read!"
Diagnostic Information:
Type:
Description: The system has attempted

Remedy:
ERROR 1003

Identification: "No such write!"
Diagnostic Information: None
Type:
Description:
Probable cause: Program fault
Remedy:

ERROR 1004
Identification: "Null
Diagnostic Information: None
Type:
Description:

Probable cause:
Remedy:

None

System/Fatal

System reset

System/Fatal

The system has attempted

System reset

Ptr used!"

System/Fatal
The system
or function.
Program fault
System reset

has attempted to access a non-existent string

to access a non-existent "device".

to access a non-existent "device".

Issue 6

·- F11 -

11X

APPENDICES

1X33213

r I

'I' '

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

1005

"Circ buff er full!"

None

System/Warning
The system

has run out of space in a data buffer

Too much data being transmitted to MX or 1/0 device fault
Reduce amount data being transmitted or investigate fault

1006

"Invalid parameter!"
None

System/Fatal
Invalid information was sent

Program fault

System reset

1007

"Watchdog timed out!"
Module number

System/Fatal
A watchdog timer has expired.
Program fault or system overloaded in some way
System reset

to a data buffer

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:

Remedy:

ERROR
Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Information:
Type:

Description:
Probable cause:
Remedy:

1008

"Bad interrupt!"
Interrupt number

(HEX)

System/Fatal

An unexpected/unused interrupt was received.

Program or processor fault, probably due

to noisy environment

System reset

1009
"Duplicate string!"
None
System/Fatal
A duplicate string was found whilst initializing the hash table
EPROMfault
Replace EPROM set

1010
"No such open!"
None
System/Fatal
The system has attempted

to access a non-existent "device"

Not used

-F12-

Issue 6

1X33213

APPENDICES

ERROR

Identification:
Diagnostic Information:

Type:

Description :

Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

1011
"Power fail stuck!"

None

System/Fatal
The power fail signal is stuck in its active state or power on signal
absent
Inter-PCB cable faulty, PSU chip failure or switch faulty.
Find and correct fault

1192
"LED ­None

System/Fatal
The LED controller
2MHz clock failure or failure of IC20
Check clock and IC20

1/0 fault"

is not responding to commands

1224

"LCD 1/0 fault"
None
System/Fatal
The LCD is not responding to commands.
LCD cable or LCD controller failure .
Find and correct fault

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Information:

Type:

Description:
Probable cause:
Remedy:

1225

"LCD - invalid ansi"
None
System/Fatal

An attempt was made to write a non-ansi symbol to the LCD

Program fault
System reset

1226

"LCD - invalid pos"
None
System/Fatal

An attempt was made to write to an invalid position on the LCD

Not used

1321

"Card R/W error"

File written

Memory
The data written to the card was not verified correctly

Faulty memory card or card interface circuitry
Try again,

Card/Warning

if error persists, replace card and/or service MX

Issue 6

-F13-

APPENDICES

1X33213

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:

Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:

Remedy:

1323
"Card battery low"
File name accessed
Memory Card/Warning
The card battery voltage is too low for reliable operation
The card battery has fallen below 2.6V and is exhausted
Replace Memory card battery - see repair handbook for details

1384

"Scene corrupt!"
Scene in fonnat Pg.Scene
Test/Warning
A scene checksum has failed
Internal battery discharged, or mem. card battery exhausted,
or power fail detection circuitry faulty
Press CONTINUE
transfer, press CONTINUE

to clear the scene, or, if perfonning memory card

to carry on after ignoring scene or QUIT

to end the transfer.

1385

"Effect corrupt!"
Effect in fonnat Pg.Effect
Test/Warning

An Effect checksum has failed

Internal battery discharged, or mem.

card battery exhausted

or power fail detection circuitry faulty
As error 1384

ERROR

Identification:
Diagnostic lnfonnation:

Type:

Description:
Probable cause:

Remedy:

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:

Probable cause:

Remedy:

1386

"Setup corrupt!"

None

Test/Warning
The setup checksum has failed
Internal battery discharged, or mem.
or power fail detection circuitry faulty
CONTINUE or

QUIT - cause setup to be reset to factory

defaults

1387
"Patch corrupt!"
Patch number {l or 2)
Test/Warning
A dimmer patch checksum has failed
Internal battery discharged, or mem.
or power fail detection circuitry faulty

As error 1384

card battery exhausted

card battery exhausted

-F14-

Issue 6

1X33213

APPENDICES

• ,I

•

r

I

--

ERROR

Identification:
Diagnostic lnfonnation:
Type:

Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Infonnation:

Type:

Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

1388

"Fader module fault"
Module code
Test/Fatal
A fault has been detected in the fader module connections
Fader module cable fault or invalid id switch combination
Find fault and check switch settings

1389
"RAM test failed"
Address, byte
Test/Fatal

A RAM test pattern has read back incorrectly

Backup battery low or RAM faulty
Find fault or allow battery to charge

1390
"ROM checksum failed"
Checksum read, correct checksum
Test/Fatal
The ROM checksum does not agree with the programmed value

EPROM faulty
Replace EPROM set

read, byte written

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:

Description:
Probable cause:
Remedy:

1391
"NMI fault"
Address of byte written to stimulate NMI
Test/Fatal

An NMI was not seen by the processor when stimulated

PLO device IC28 incorrectly programmed or faulty.
Find fault or replace IC28.

1392

"ND Reference fault"

Voltage read, max., min. valid voltages
Test/Warning
The

ND converter is out of spec.

R95/96 incorrect or IC26 faulty
Find fault or replace IC26.

1393
"LCD contrast fault"
Voltage
Test/Warning
The LCD contrast control not working correctly.
VTlO, R70, 73, 76, or C64 faulty
Find fault

read, max., min. valid voltages

Issue 6

-F15-

]

APPENDICES

ERROR
Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic Infonnation:

Type:
Description:
Probable cause:

Remedy:

1394

"DI A Reference fault"

Voltage read, max., min. valid voltages
Test/Warning
The D/A converter reference is out of spec.

Inter-PCB cable faulty or D_A_SET signal not present
Find fault

1395

"Battery volts fault"

Voltage read, max., min. valid voltages
Test/Warning
The battery voltage is out of spec.
Battery discharged or faulty, Inter-PCB cable faulty
Find fault, or charge battery for several hours,

if error persists replace battery.

1396

"Battery ref fault"

Voltage difference read, max., min. valid voltages
Test/Warning
The battery reference voltage is out of spec.
R60 faulty, IC18 faulty,
Find fault

1397

"D

to A fault"

EITHER:Voltage read, max., min. valid voltages
OR:PWM setting, valid max., min settings
Test/Warning

D/A converter is out of spec.

IC6, IC4, IC7 or associated components faulty,

Inter-PCB cable faulty, or IC25 faulty.
Find fault

A/D faulty (excessive leakage)

1X33213

-

I

-

I

-

I

-

I

-

I

-

I

-

I

•

-I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

ERROR
Identification:
Diagnostic lnfonnation:
Type:
Description:

Probable cause:
Remedy:

1398

"D54 sync. fault"

Voltage read, max., min. valid voltages
Test/Warning
EITHER:The D54 synchronisation pulse is not being generated.

OR: The D/A converter ENABLE control is not working.
R21, 22, D6, Inter-PCB cable faulty, IC6 or IC26 faulty.
Find fault

-F16-

Issue 6

1X33213

APPENDICES

~

~

~

~

f3

~

]

1

ERROR
Identification:
Diagnostic lnfonnation:
Type: Test/Warning
Description:
Probable cause:

Remedy:
ERROR

Identification:
Diagnostic Infonnation:
Type:
Description: The external loopback for the RS232 port
Probable cause:
Remedy:

ERROR
Identification:
Diagnostic lnfonnation:
Type: Test/Warning
Description: The internal loopback in IC25 for the MIDI port is faulty
Probable cause:

Remedy: Find fault or disconnect external MIDI device

1399

"RS232 int-loop fault"

read, byte written

Byte

The internal loopback in IC25 for the RS232 port
Memory decoding faulty (IC28, 32) or IC25 faulty, or data being
transmitted to MX during test
Find fault, or disconnect RS232 device

1400
"RS232 ext-loop fault"
Byte

read, byte written

Test/Warning

is faulty

No loop back connector installed?, ICS faulty
Fit loopback or find fault

1401
"MIDI int-loop fault"
Byte

read, byte written

4MHz clock failure, Memory decoding faulty (IC28, 32),
IC25 faulty or MIDI data being transmitted

is faulty

to MX during test

~

5

5

~

a

'

~

ERROR 1402
Identification: "MIDI ext-loop fault"
Diagnostic Infonnation: Byte
Type: Test/Warning
Description:
Probable cause: No loopback connector installed?, ICS faulty
Remedy: Fit loopback or find fault

ERROR 1403
Identification: "SMX/DMX port fault"
Diagnostic lnfonnation:
Type:
Description:
Probable cause: Short on RS485 lines, IC9, IC3 faulty
Remedy: Find fault

read, byte written

The external loopback for the MIDI port is faulty

Byte

read, byte written
Test/Warning
The DMX/SMX port loopback is not responding.

I

Issue 6

-F17-

11X

APPENDICES

1X33213

ERROR

Identification:
Diagnostic lnfonnation:
Type:
Description:

Probable cause:

Remedy:

ERROR

Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic lnfonnation:
Type:

Description:
Probable cause:
Remedy:

1405
"Audio test fault"
Frequency at which test failed
Test/Warning
The audio threshold detector has not seen signals at the
required test frequencies.
Wrong components around IC2, IC4, or audio source connected
during test
Re-try, find fault., or remove audio source

1406
"Memory
Byte read, byte written
Test/Warning
The memory card has not read back the test values written
Connector problem, card interface circuitry problem

Find fault, try another card

1407
"Mcard paging fault"

Page number accessed
Test/Warning
The memory card has not read back the test values written
Wrong size
Find fault, try another card

card error"

card used (64kbyte required) or IC41 faulty

ERROR

Identification:
Diagnostic lnfonnation:
Type:
Description:

Probable cause:

Remedy:

ERROR

Identification:

Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

1408
"Flash key stuck"
Corresponding channel number
Test/Warning
A flash key is stuck in the "on" state
Key damaged, corresponding pull-up resistor disconnected, or
something resting on key during power-up sequence
Find fault

1409
"Channel fader stuck"
Corresponding channel number
Test/Warning

An A or B preset fader is set at the wrong level

Faders not reset prior
Reset fader!

to fader test

-F18-

Issue 6

1X33213

APPENDICES

~

~

~

~

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:

Remedy:

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

1410

"Control key swck"
Key number
Test/Warning
A control module key is stuck in the "on" state
Key damaged, corresponding pull-up resistor disconnected, or
something resting on key during power-up sequence
Find fault

1411

"Control key bounced"
Key name
Test/Warning
A control module key has "bounced"
Key damaged
Find fault or replace key

1412

"Control fader stuck"
Fader number, fader expected,
Test/Warning
A control fader is set at the wrong level
Faders not reset prior to fader
Reset fader!

% level read

test

ERROR

Identification:
Diagnostic Infonnation:
Type:
Description:
Probable cause:
Remedy:

ERROR

Identification:
Diagnostic lnfonnation:
Type:
Description:
Probable cause:
Remedy:

1416

"Watchdog timed out!"
Module number
System/Fatal
A watchdog timer has expired.
Program fault or system overloaded in some way
System reset

1417

"Invalid interrupt!"
Interrupt number
System/Fatal

An unexpected interrupt was received.

Program fault, probably due
System reset

(HEX)

to noisy environment

Issue 6

-F19-

APPENDICES

3

3.1

3.1.1

1X33213

APPENDIX 3

This Appendix describes the procedure for changing surface mount components

Introduction

On MX, since the Control PCB REF 1952 is being in-circuit- tested, there should
be no need to re-work components. However, just in case ...

The removal and replacement of surface mount components is a specialist skill
which takes some practice to acquire.

The following gives an outline of the correct procedure, which should be
practiced on an old/unused PCB.

Suitable Tools and Equipment

Surface Mount Cutters kit STC Components Stock No. 031676R

or

Surface Mount heat re-flow station - Circuit Plating Ltd System 1000

Reflow Station.

-

I

-

I

-

I

•

I

•

I

•

I

•

I

•

-I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

•

I

3.1.2

Surface mount pick and place machine - Fritsch LM900.500

air jet

Hot

Tempilaq Temperature indicating fluid.

Removal of Small Surface Mount Components.

Apply heat to all contacts of the component using a Hot air jet. When solder is
molten remove component with tweezers.

Apply a small amount of Surface Mount Re-work flux and remove excess solder
with solder braid. Be careful not to apply too much heat or force so as to not lift or
damage any of the pads on the PCB.

Note: Most of the integrated circuits used on the card are sensitive to ESD

(Electrostatic discharge). ESD can permanently damage, or reduce the working
life of these components.

Therefore they should only be handled and fitted in an ESD controlled

environment. Earthed wrist straps, earthed soldering iron tips and storage of static

-F20-

Issue 6

1X33213

APPENDICES

sensitive devices in conductive sleeves provides the minimum ESD controlled
environment required.

3.1.3

3.1.4

Removal of Integrated Circuits Using Cutters

Probably the easiest way to remove faulty integrated circuits is to snip the legs of
the IC and then remove the legs left on the pcb with a small tipped soldering iron.

Select a pair of cutters from the kit with small cutting edges that will fit around the
top of the IC leg. Snip the legs near the top, to avoid risk of damaging the PCB
pads or tracks. When all legs have been cut then use a soldering iron to remove the
remaining legs. This is best done by gently wiping the soldering iron tip across the
remaining legs. These will then tend to collect on the tip where they can be
removed .

Apply a small amount of Surface Mount Re-work flux and remove excess solder
with solder braid. Be careful not to apply too much heat or force so as to lift or
damage any of the pads on the PCB.

Removal of Integrated Circuits Using Heat Re-flow Station

Switch on Heat reflow station. Fit a component mask to the both top and bottom
heat jets appropriate to the shape of the IC being removed . This ensures heat
applied is confined to this area.

!

Measure/ Adjust temperature of reflow station to above the melting point of the

solder paste (about 250 degrees C).

Apply Tempilaq Temperature Indicator fluid ( degrees C) or similar to each edge
of the chip, (remember to shake the bottle well!)

Place PCB into pcb guides (adjust if necessary) and centre on component to be
removed.

Move both top and bottom hot air flows into position. They should be
immediately above and below component to be removed.

When the temperature indicator fluid has changed colour, quickly move top and
bottom jets back into the rest position and remove component with a pair of
tweezers.

Parts of the reflow station and the PCB will be very hot - BE CAREFUL!
Apply a small amount of Surface Mount Re-work flux and remove excess solder

with solder braid. Be careful not to apply too much heat or force so as to lift or
damage any of the pads on the PCB.

Issue 6

-F21-

APPENDICES

1X33213

Replacement of Surface mount components.

Surface mount components may be replaced by using a reflow station or by using

a fine soldering iron and fine solder. Each method is described separately.

3.1.5

Replacing Components Using Heat Re-flow Station

Remove Solder paste from cold storage and store at room temperature for several
hours before work commences.

Set PICK and PLACE machine regulator pressure to about 35 PSI.
Adjust solder paste dispense time to approx 300ms (030 on the thumbwheel

switches).

Fit PCB into upper slots of the XY table, adjusting movable gate against PCB and

tighten the gate retaining screw.

Fit Solder paste onto XY head. Move solder dispenser into dispense position by
pressing black button on XY head.

Move the XY position control to centre the solder dispenser above component
pad. Gently pull down XY control until solder is automatically dispensed onto
component pad. Release XY control and move to next PAD, repeat until all

components pad have solder paste applied.

Note: Movement in either the X or Y direction can be locked by pressing either

the X or Y button to assist application of the paste.

3.1.6

Move XY control to position the vacuum pick-up nozzle above component to be
fitted. Gently pull down the XY control placing theXY nozzle on top of the centre
of the component. The machine will automatically use a vacuum to pick up the
component.

Note: It is a good idea at this stage to turn on the XY hold function. This will lock

movement of the component when it has been placed in position, to prevent the
operator dragging it through the solder paste when releasing the IC.

Move the component into position carefully lining up the component with the
PCB pads. Gently pull down on the XY control until the component is placed into
position. The machine will automatically release the vacuum.

Re-flow Soldering

Switch on Heat reflow station. Fit a component mask to the both top and bottom
heat jets appropriate to the shape of the IC being removed. This ensures heat
applied is confined to this area.

-F22-

Issue 6

~

[~

1X33213

APPENDICES

t~

[!!

[~

3.1.7

Measure/ Adjust temperature of reflow station to above the melting point of the

solder paste (about 250 degrees C).

Apply Tempilaq Temperature Indicator fluid ( degrees C) or similar to each edge
of the chip, (remember to shake the bottle well!)

Place PCB into pcb guides (adjust if necessary) and centre on component to be
removed.

Move both top and bottom hot air flows into position. They should be
immediately above and below component to be removed.

When the temperature indicator fluid has changed colour, check that the solder
has flowed well by inspecting the soldered pins/pads.
and bottom jets back into the rest position and remove the PCB .

Parts of the reflow station and the PCB will be

If all is well then move top

very hot - BE CAREFUL!

Component Replacement Using Soldering Iron

Surface mount components may be fitted to the PCB using a fine tipped soldering

iron and fine solder. The following items are suitable for this method;

Weller EC2002D soldering iron fitted with fine tip.

Farnell Stock No. EC2002D

26 SWG solder eg RS 561-101 or Farnell SMART26 solder.

Carefully apply soldering iron to heat both the PCB pad and the component leg.
Apply solder to soldering iron tip,
component leg and PCB pad. Inspect each solder joint paying particular attention
to

dry solder joints and fine solder bridges. Rework any joints as necessary.

allowing solder to flow onto both the

Issue 6

-F23-

Drawings

I

CONTENTS

6840045 sheets 1-8

6840046

MX Main Panel Card

MX Fader Wing

Issue 6

-i-

]

~

~

~

~ ,

~ ,

~

~

:! .

~

II

'

-

I

'

I

r

I

I

C

-

!

DIIG. No.

6B 40045

Ill . I

,~

Of'.

.2Y

.

t!!!'

+s~~

•~CD

!

I

l

•

31tDANGLE PROJECTION

P\.2

I

DO NOT SCALE

IF IN DOUBT-ASK

'

I

I

. I·! f1 f 't1"" " ...... ., : ·:-: ·:" ":" • .,~ ... ,, ,., .... ,,.. ]~·v ~:-

. m1;:1.,.,11,11i1 J

,. c: I • ·~>~C(I:

rn!IT"ll~a·~!

C!J ; 0 DU

. _,

z z

~~

B ..

f

f

C<t

r·

'

IC TABLE FOR REACT FSU SECTION.

ctM' . REF.

ICI
IC2
!Cl
IC•

'""

tee
tC7

!Cl. 9

!CIC
ICll 12

I Cl

I O. OluF

Hl'LI - -

NE5710 -

7.U.Ct-tSC

TLOl«:D
5117515!!0
OACOI-ED

LM632l~

SH75\7e80

L.4983

IOC7109CT

Im

10.luF

TYPE

T

Vee ONO

.. 7

-

-

-

-

•

-

-

.L39

TO . luf

-

-

•

-

-

•

I

I «:) ..................

-

-

I

n.0r,..,.....- ...... m,,1M

_,....,._...,"'.,.,_

::: ~.,:: ur-··111 •

II

I

C

,_

~

~

!-'

~

~

~ -

'

I

I

I

-

r

I

D

-

E

D l REF

'---

TEST LED

LCD CONT REF Ml

~

ll!lliEln'Ill:

1'!l1mnN

POWER SUPPLY

V l&TT

142

,___

·-

--

,--

ENAICE R548! Yi

~

05• SYNC

EN1.8LE RS.ul! RX

D A SET

0PO

OPI
OP2

OPJ
OP4

OP5

TEST &l.010

'---

Al.010 OUT

'---

ALOIO INPUT

OPfi

0P7

Tl()A

AXOA

TlOI

RXOtll

lilillTTI

OPO

OPI

OP2
OPJ

DP•

COMMUN I CA TI 0:15

OP5
OPfi

OP7

TXOA

AXOA

TXOI

AXDBI

RX082

RX RS4r.5

~

0 A REF

0 A OUT

I

>---

D

E

,_

F

t!

C

ISSUES

PRO'IOTYPE I

PU -PIIOO-

PROOUCT10N I

H

~

0

"'

Q

ArtOOS"olCIZ

C

SCHEOU.E : 5S33219
DRILLING : 5840174

I
I

I

I

I

'

•

•

•

•

SCALE

DIMDISIONS IN mm

I

I

I DEC. PLACE • 0.4 11U11

2 DEC. PLACES• 0.1 mm

UNLESS O'T11ERWISE STATED

DMWNI

CHEClt'DIK·C·YOUNf.

APP'D I 7L,._'L

•

TOL£RANCES

ANCULAa • o.n•

R. F.

-

I~

?~:strand Lighting Ltd

MATEIUAI.·

F1N1SH:·

DATE .

U/11111

6/8/9(

· flllST USED Off :. IL 33227

':11Cl10

Rf&CT

!!.2!!l

ANALOGUE
DIGITAL GNO

GNO•~

·-L

GNO

TITLE

REACT MAIN PANEL CARO

PCBl014/I

DIIO. No.

68 40045 OFI

... ,on..r,.u..o,.c.-, .. ,_ .. , ... c. ..... ,

...._..,.._~ .. , TWll,C)O

h i . II MOllll TtlH . UtU ru . 11 NI IIU

,_, ..._ .. -1a4 .. 11..it .. ,i. . 1 .. u.w, , .... u,-.,

h i 0111 IUU ,,i.. ruao ru OHi UIU

{PSU BLOCK DI •GRAM)

REFt~,

1111,1

I~

•

H

~

DIG . No.

68 40045

lllz

OFI

IISUli

l

31tDANGLE PROJECTION

DO NOT SCALE

IF IN DOUBT-ASK

I

-

-

1

I© ............ -

I

n..Dr•W"'IIIMIMlbtn,pl,N

•.. ,. .............. ,_

.:::::.:;-ur·"'·

~

~

~-

~

~

~

~

t.

I

i

I
I
I

I
I

I

I

Al

I

C25

c•

Al.010 GN0
Al.0I0

Al.010 IN

C

-,3

IN I

Al.0I0 IN A

Cl .,j,, Cl

220pFT

I

f;' 1

220pl'T

I

ll

,..........,

....

C21

I

c,

II

O. luf'

Cl

I

O.luF

o. su,

.~n

51

A7

~

"" 51

I

~

I

u-

I

220~F

O. OluF

2

3

RIO

1201( 51

LOW PASS FIL TEA CORtEA AT 20K

All

120K 51

Cl4

O.OluFI

IC4 I

L+

,,

TLOl4CO

LOW PASS FILTER

CORfEA AT 200 HI

v

r

C

,.

I

..._

C

i'il/

C5

TEST Al.0I0

C22

IOUF

!IOV

1·

*

ICII

Ttuf

13V

I

••• I!!!__,

1

.

Nt:5710

Cl9

I

luF

l]V

Cl5

1~

IIJV

CIO

l220pF

3

E

~

1---6--------L.---------< A9 o.~~~r J

O.OluF

-f!v

,

IM2 51

C34

IOOpF

Al

CII

]

IUF

IJV

Al9

A24

-~

151< 21

C23

sour

IIOV

Cll

2i0pr

2s=;!:~-------_j~

...

Nt:5710

II

01 ·

IASII

C21

Al4

Al2

.,.

.,.

luF

13V

51

51

120• 51

220pF

IC4

9

I +

TLOUCO

AU

Cl7

L-

D

c..

I

C

•

ALO O OUT

E

I

~

I

I

I

r

ISSUEli

PIIOTOTTPE

l'IIE-~

noDUC'110II

NI 5

-'

6

All'l00S"«)l

ICAL£

DINDISIONS Ill mm

I

TOLEMNCES

I DEC. PI.ACE • 0.4 mm

I DEC. PI.ACES• 0. 1.,,.

AIIGIJLAR • o.as-

llliLESII 011IEIIWISE STATED

I

I

=r;. :~ .

-l A Strand Lighting Ltd

I MA, EJIIAL:,

t~

T USED OH:· ll 33227

REACT

--

mu:

PCBI0l4/I

DRO. No.

68 40045

..,. oan . u.i 1. c._,._, __ ••• a..-"•'

.__,.. • ...._ ... "" IQD

h i. t l MO Jill T•• 11111 r.,. 11 111 IIN

,_, _..._ .. .......,.-r~ . b ... lWJ rlfe . lTIAT

T.t . NII IUU TM1

REACT MAIN PANEL CAF(J.

(WJI0 lNPUT) .

CIRCUIT 0lAGRAM.

1m2

Of'I

JUO(I J'H , HU 11111

,~

•

..._

0

H

REF!95~

D,o.No. SllJ I ISSUE I I DO NOT SCALE I

68 •oo•5 or• t ' 31U)ANGLE PROJECTION IF lN DOUBT-ASK ©.,.,..,.....,.,.._ ;::7$.r::;:

A A

I I I l I 4 5 I :... I J

I

j ""'"'' .... ''"'_ .. ..,...

t

I

I
I

..

$TAA2 __J

con~~~tson rt·

polnt I

I

".! r

I

-C • J

• AXEll!I

POHER COlffCT~ 3 : .L.__ I r+ ... ADIC~~

15V oc _ 1 .~ •-------+--------------+--~~-"--! Vo COie µ!.H/c

C 1.- l"5321 7 PFI FBI 12 I C

- .t70uf 47DuF 4170UF 1-

$1(8 r-----t-~LJ..IU8..,,.._ _ ___. IC10 =--,-., 1.r"in . Tri' .....LL "551 I I IOOUF

- G • Y-

C•3 .... -l--,...-~ ~--l---"-1 GNO GNO >-'-'-- ..C7 I OK ••7

IL_

0. SuF . - - ----------..L 15r Yrtf 11 V REF

STAA I 50Y 50Y 50V

Ql"'ound ,t

conn1ct1on~l-:'----------4-------4----4-----4-------1~--4--._-._ ______ ~~--l-.-~,-+---4__.-+-4--~-+--1--4---_J

I

point I oh, ,--;::::::::::::::::::::::::::~;:::::t:::::::::::::::::::::::::::::::::::::J;::::: _ ___. I

~

1 - 2

5

OPST ,-----------+----+~ LS7 ...,--;, luH

R5I! '~ .!.U~ f -.c.!'!!:<'!!-J -110

h 1• o--+=-- c,8

3

TIil ,-.!L_

Yin

I GNO GNO..Q.. 51 51 51 - .,

OEL

-·-·

~~

• .,

""' 1"6282 T 0 . luF i •

,i.c,, ,~ cu "52 c,a ,,, ,,,co - .,, => c=> ,.,

019

Fel 5 U A4!S A47 A42

~

111<221 • AST Jl!!T 10

2

~°1 ~: mi• i •

~--+---"-'-1 GNO GNO

~

,-----

1

• ... ..,-

iJ ·;~1 I

a~:~:"' C49 ... C50 '" T-C5I ''°' 1~8

A4]

I

~

+!SlV LCD + V LAMPS PSIJ l-

L-----------..J

~

LU_~- I .,. AM, .,

25

v

1

1

1'l!ilElfllH

~

~

t 13 0 MPS .--------+-----' ,.;. VTI

D

- mlml

l

~

STUl 2z,/,"25v

C52 C57 51 I.If 4002 ' ._

0

~:g :·

~~2

":V~~ ~~Ufc:;02

c•o

>---Jl" V 11AM

2~ 018 ••

nn •~

- L...-.-- I

E MC7809CT llYJ t-rf:3MC780:-:T D2!1 811 E

D22 +UY 0~

:~ .... ~ll

I.If •002 _I I.If ,002

~

L_l, IC12 voh-- .. I ·1

.,.

I l LJ~ • OM rJ" Uf:~02 ].I .. ICAO

--- l .ev n1cuury ta 1l1Dw

• O.luF""' O. luF,. , .. 02• '""O . luf TO . luF '-

C55 •• C5l •• ,1, •• C5e •• C5'

tor 3Y ctrd •o 1 llQI

~~

1

I

D

I UF•oo~~ I~ ·1· T

r 220A51 ,, l

I R4& ] AU <• LCO CONT REF tO

1 4K7 4K7 12

• TEST LED t:::J .,

Rl5 LOI - ,

t£E3102G °A!'ID I

5

v v AEF

,. 51 I 13 ...

~

0 A REF 9

~

4

,

11

7

TEST CONNECTOR

!.,

__,,_.___: ~=--c::J-!;;-,,----+---t----' I i [ ,l.

.. , 51 I

~

I

lSS1JES I SCAU: '~ ... c... Uool I c ....... h ...... ,_, o. .... ,

PROTOTYPE I I I DIMENSION'S lH"'"'

PRE-PROD· 1 1 I 1----------.....1 ctrand L' ht: .... g Ltd ·-· ...............

••ooucnoN

H i ANGULAR• 0.25" REACT MAIN PANEL CAF().

iJ UNLESS anu:RWliE STATED 1- - ----------l (POHER SIPPL Y) . H

--' DRAWN I A. F . 0/10/H PCBIOt•lt RFFIQII\:>

. CHECrDIM·C·YOUNO .,1/90 >-- ---------.µ.===.,_---~--~----'-'""--,...."'-I

~

,.....,.,.

1 1

--.. .I. .. • • • -- •

------------------------'---! TOL£MNCES .-, 1g UI ,. .. "" IUU , .... . IUOI , .. nu'""

I DEC. PLACE• 0.4 nun MJ,TUIAL:· Tm.£

I DEC. Pt.ACES • 0 .1 1M1

1-------1---'De,A!.!TE.!:....J Fll!lfl\:•

APP'!> I .,, w,.... .i, ...._ Ml!S'I' USED OIi:- IL 33227 MO . No. I SIU I ISSUE

~

,.,. f M . ..... 1111 , .... 11111 , ......... ...

X

AEACT 68 •oo•5 or 8 I

~

IIJle•- •. •-"'•• T"WI IQD

~

.. , __ ,.., ... , , .. """

CIRCUIT DIAGRAM.

r

0

;

DIIO. No.

6B 40045

Ill. •

OF 8

ml/E

I

3mANGLE PROJECTION

DO NOT SCALE

IF IN DOUBT-ASK

c, ............... .....

n..o.,.....,,W,_M~

• .....,.odwnod ... ..,_

::::~ir- ....

s

~

~

[!I

~

~

[!I

"

I

C

DI

E

r

P ROTOTT~

PRE-PltOD-

PIODUC110N

HI i.

u

..

~

ISS\/EI

-

-

-

-

-

-

- DPI

- DP2

-

R

OPO

DP3
DP•

oP5

OP&

0P7

D A REF
D

o A OUT

~

m,•-

~

Ill ASd!I

UDA

.

t'iliB1T1rl

RXDA
RXOl2

UbllC! JSil! Ti

UOI

RXOII

A SET

...

••

11
15

1•

13

12

II

10

g

~

•

CJ2

t200F

-~

:~~i,

ClJ C:10

0 tuF 0 tuF

~

7

I

. ·-

DO

DI YREF+

02 VREF-

DJ
D• ICII

05

DI

01 TOOT

VLC IDUT

CIH'

UA<;UO·ED

-

2

J

~

I

I

RJ3

JK] 21

Stopa proc111or ootng

lnlo TEST Ckll'lng RESET

:j::~~I 2~:=

R22

lKJ 21

R21

lKJ 21

1~::-:

5DY

~

I

1 lKJ 21

••o .sur

~

:r:~tss

DI

..

BASIS

R2J

-

Cl!

1111 tr.1n 0 .5 LSI

RC gh11

rlOPll WOl"lt CHI

R50

-,""s1

Also Dh'II O. SY n0111

l-.unUy blt .. en tf"Dunctl

1:~ '10

,.l-ics,sc

m~

~t,

-~

All

2i!OR

SI

51~ C I

,f.c;.,sc

!Cl A

I 2

,lfc" .. sc

~

2

5

I

c2,..L. .l.m

2200F 1-1" 2i!OpF

IC• D

~~·

!t

..,

..,,.

!CJ F

7 ACS-SC

0 . 0luF

Js""_(I

()A

IC5

r-

RA
ATC

~

: C38

: IOOpF

I

g

7~s,sc

J

1J-i'c1<1SC

C211

..

DY~

RYP2-

F:25V

RJZ

·~~I

D

I~

1g_ I

I

. •

R•

.r-,__

220A 51

~

220A 51

-

AC

11t1 lhl t IN con1t .

of lht drhtr la Ohl

approa . 2 . !V/uS

RJII

IK221

CJ7

..----!<

. I

llill

-~

~~

2

~

I L"6321N

·r/.

• 5 I

-'§V

.--

J

DE

A I

•

D ICII

.___

11£

9

R

~

5"7517680

C35

2uF Z5V

7

!.!!_

lull

~

lull

~

n'n

+5V

• I I !Cl

~~

-~r

ff "' tHIILI

1

L~ -- -'

LI

lull

L9

"

luH

ui~a:"'

~

n'n

~

L7

lull

A3!1

4k7 51.

c...__L

~

luH

lll

FP%19!

DZ

8'911

DJ • ,-

BASIi • "

~

nn

mi

010 ; "

FP1009 •

5V

~

OE

•

D ICI luH

,___

2 11£
I

R

-

5"7517680

~

nn

A I

I 7

,1

mi

D15,j

FPsoog

.__

.,,,

~Ill

·~ DI

!

~

FP1009

mi

SCALE

DIMDISIONS IN mm

I

I

I

'l'OI.EMNCES

I DEC. PI.ACE • 0.4 mn,

I DEC. PLACES • 0.1 mn,

AIIOUt.AR. o.zs-

lJNLESI OT11DWISE ST ATtD

I ~r u I i/lt;p.. I Tlfl.'l.!...j RE.cl

Rl

220R 51

05 •lo

1

1asu1 .. ,..

mi

-~

~

RI

220A 51

RI&

220A 51

IAi\1:"

'la DI

! FP1009

~

mi

r.n

R40

51

RJ5

!ODA 51

~I

r

I\. Strand Lighting Ltd

MA T&J!IAL:.

FlNISII:·

Fll!ST USED ON:- IL 33227

l~_

LI•

lull

FP1009

-

gy

~

luH

012 ' ..

! "

~

mi

n'n

Rll,1

IOOR tOOR

51

R34

51

I

I ~Fi

1

~

470A 51

LI

-

luH

I

I

L•

IUH

I

~

~

4K7 51

R29.r-,_J

R29 •• , 51 I

4V 51

A30

.,___,..-

.,,, 51

0 AJ7

ZZOA

51

All

•• , 51

sbog

RZ9

""' 51

R25

-

.,,, 51

'ITl'LE

REACT MAIN PANEL CA!lJ. IH

PCBlOH

Dl!G . No.

6B 40045

51(2

..!-c

?..c

MIDI IN

le

I

I

5'::

·-

SK4

..!-c

z

le

MIDI

THROUGH

·-5'::

5"5

..!-c

z

3-

MIDI OUT

"<

5'::

·-

5"3

2-

J::

N/C

~

5-

EIA-232-D

1'::

1/0

8

t -

t'

SKJ

..

SECONDARY

16-

SMX

26-

OUTPUT

I'll
J

N/C L

~

c...._!_.

~

f_,- ..._ .. ._. • ..,.___,...._ . ........ , fN . lfl UT

T ..

ICOMHVNICA TIO/IS) .
CIRCUIT

SIi.•

ora

054

OUTPUT

I

PL•

2

AMX 192

J

OUTPUT

•

I'll

J

SMX/OMX5l2

2

OUTPUT

c- ...... ,_ .. ,. ... 0.,111•••

,11, N ....... , T•1IOO

IHJUI T••

"" IUU '"" · '"°' , .. nu UHi

DIAGRAM.

rnu ru II 11,110,

ISSUE

I

A

I

C

D

E

r

G

-·-'

~

~

DIIG. No.

68 40045

111.5

or,

1:-

•

I

I •

3

•

311DANGLE PROJECTION

I I

DO NOT SCALE

DOUBT-ASK

IF IN

I

I

-1

1

I

I«:>· .................

•

n-0t,......, .. _ ... n,p.4

."""' .............. ,_

==-~.::t:r-··" .,

!i

~

~

~

~

~

~

~

~

ti

~

~

~ .

~

'j

~

~

~

~

"

-

•

-

C

-

D

-

E

-

"

+5Y~

'!~

m

·~co

'1·~p·t1"" i

POWER FAIL J

PROCESSOR

~

RX082 DP2

TEST AUDIO DP3

-

AUDIO OUT

V IATT

LCD COIIT REF
D A REF

"2

Ml
RX08I

RXOA

~

LEO SWITCH

~

POWER FAIL

... 0

111
1ill

~

~

~

~

ClK 8Y 4

PERIPIERAL RESET

PlA.LOOWN2

rnrrnie

82?9 INT

AO <O: 7>

PIA.LIM'

-

CARD DET

WP

BO

II

82

JlllliEnrn:

llE§T

PlA.LODWN2

rnrrnie

82?9 INT

~

CARD VOLTS
CARD DET

WP

BO

BI

82

~

EtUILE RS•8! Alt

EH.illl.E PS485 fk

PERIPIERAL RESET

TEST LED

OPO

DPI

DP4
DP,

DP&

DP?

T>COA

TX08

D A SET

054 SYNC

TnITT!!

RX Rs,e,

D A OUT

~

n,m

CUC BY 4

MA <O: 15>

AO <O: 7>

141!

Ii

-

'All

1111

-

II 17 II I! 120

~~~n

e

OPO

DPI

DP2

DP3

-

DP4

DP,

DPI

DP7

~112212112,~

~u~a

I

Pl.7

12fl27 12112! 13<131

a I!!

Q~

~

1;

13:13:

IJ•ll!

;~

....

OS

!i

PI

!J,

Plb!

ll "-

a a

..

0

!;

~

..

0

I -

40,0

~I:

..

Is>

u

B

,2,:

~

... !

§S

"·r1·~

0~

I

i~

~

~

r MA <O: II>

0

~

•jUM>S P5U

f

IC TABLE FOR REACT PROCESSOR SECTION

COMP. REF ,

IC2fi
IC23 J•

31

IC2B

ICIB 19

IcJ,
ICIJ 14 1, 32
IC16

27 21 ,1

IC2'
IC2I

1CJ6 39

CDl<P. REF. TYPE Vee GIIU

IC30 33 3? ,o 70C541SC
IC22 2,
ICl7
IC20
ICJII

CARO INTERFACE

llE§T

?reiRl5 CARD DET

'All

1111

~

CARD VOLTS

AO <0' 7>

BO
BI

a2 ......_e1.__

Ill'

!

I

I

TYPE

NBOCl96XC

70C14SC

GAL20Vl!IA-15LP 2,

HCl40,IBP

PCHHCOOT

70C138SC
70C573SC

SCC2692AClA44 ..

PC74t<OOT

27C512-20FA

CXK58257M- 70l

lA.N2003D
TMPB2C?9P-2 ,o

PC74HC245T

CARii DET
BO

BI

WP

Vee GNO

I

14

- -

14

II
20 10

-

30 32 II

20

-

20

61

?
12

7

B

22

7

10

••

-

20
10

I-

•

I-

C

-

-

D

-

E

~

3

~

3

~

r

1G

ISSUES

PROTOTYPE I
PRE-PltOO' I
PltODIJCnOH I

H

~

u

..;

~

---

I

'

r

I

I

I

I

~

R5II

I

. ., ~·

~l~-1~.:

=~ e::

'~~,:~

25Y

I

I
I
I

I

li:

-~

-1

0

5T

0 u Ou

5T-~T-m

•

:

~

0 0

~:

=~ e:

=~ ~=

0

•

=~ ~= =~ ~=

0 0

=~sl~~l~J

. . . u

0 0 0

- T-r-·1

=~ PJ:

0

•

=~~l~~l~NI

=~ ~=

0

: T;,~; "~

+

•

SCALE

DIMENSIONS IN mm

I

I

I DEC. PLACE• 0.4 mm

I DEC. PLACES • D. I mn,

UNLESS OTHERWISE STATED

DMWH [ R. F .

CHECrDIK ·C -TOUNG

APP'D I -.'La-.

.

T'OLEMNCES

ANGULAR

I

I

--

~~

·- Strand Lighting Ltd

MATDIAL:-

• o.as•

DAn;

U / 11( !.!

6/A/ iJO

nRST USED ON:· IL 3322?

~·,~·

>EACT

mu:

(PROCESSOR SECTION BLOCK DIAGRAM) ' 111f1SH:.

PCAIOU/1

DltG.

Ho.

6B 40045

....,. ~ u ... 1 c_,..,, a.,- •• ,.,. c,_ "•'

1 .... .., • .,. ... , .... , t•I l,QO

t. 1. •1t1 0 1111 t.a., 11,11, .. 0 1 ,111 101

,_, N H Mi.t .. l ... •ti• .. l t11111 1.,~.w , tll1 IT I )Lf

h4 OHi IIIU hln , fl)OO , .. nn uu,

REACT MAIN PANEL CARO

1~~

ore

I~

•

-

C

-

H

"""'°~'

I ~

4 I I I

1010.No. Ille Im I I 3110ANGLE PROJECTION DO NOT SCALE @;)., ........... ....,_ ~:.:,,m-~7'.::""'

68 40045 -Of'I I lF 1N DOUBT-ASK ..,.._i.,T"

'~

I

rl-~

,·j ~

I~

IJ

I

r!SI

~

~

~

~

~ -

;~

~ -

i~

~ -

~

I.~

:i

l

ll!!I -

r .

~

I~

~

~

3

~

L'-" CONT REF

PQIIEAFAIL

21

30

PU

.12

••

.,~~

4K7

-

,1

All5

4«7

51

,~

D

MA I
MA I

MA 10

NA II

MA 12
MAil

MA 14

"' ,, '

lll I

PAGE stlECT 2

11111

ill

lR1ICrlliR ••

I:

··-T

F

c;,

o.r.~:

ISSUES

PIIO!'CITYP

OTOTYPE

PlE ·PltOO'

PIIOO\lCTION

HI g

~

6

.. ""'°' ....

IOOuF IOOR

mlJ

25V

R73

51

...,

If!• A

....

I >

1J.t•sc

AHL n

All.I

.... ,2

AU •

••

..

C73 0 . tuF C'III O. luF

~

MIUl

!DOK 51

0,4

~AllllO OUT

a

•

•

MPXR AO

ll'XA Al

ll'XA

MPXA AO

ll'XA Al
ll'XA ••

.. lA ,..r-,r""T

.S!..,!!!-

..

,.,

a.511

3

MA I

13 ....

5

MA 10

EHA1LE PERIPHS ..!L

MA II

1

MA 12 CL Lal

NA 13
NA 14 IEMCORIU'T

•

ID

MA II -NA II

Ill

P•GE SELtCT

II 11111

23 ill

liUIICnWI

INST

·-····

uAL..cw•aA-.1.._,.

II AO

10 Al

I

~

• !

18 YOO

'~ YSS Y7

7

II

1•

I Y2 15 PEIIIPl£RAL AESEI JI

•

II VOO

LF ::

HI

I

I ""

MPXR 51n...u.,

TIIE I

TIIE A

(

A70

470A 51

Rl7

All ~f----1 R99 4K7

4X7 I

••

..

..

~10

ICll571

Rl21 470A

AI02

I

I - ••

A71

41(7 51

rn

YT12

:r

ICl571

~

!!!!!.

41(7 51

11 CE LCO

CE RAM

19

21 IEM COARUPT

A0M MA US INST

II

15 rrnl!ll

1IIC'"1IIA lll

20

, ..

illnWI

YO 13 IATT VOLTS

YI 14 CAL VllLTS

y

s, CARO YOL TS

2

YJ 12 0 A REF

IOAOUT

..

5 LCO CONT REF

Y5

2 TIIE A

YI

• TIIE I

• ll'XA 51'..,"

1200( 51

IC21

A2

YEE Z

RYB

IOI<

CE RAM

~

1IIC'"1IIA

illnWI

ICII

.............

1c•1

AO

YO 1'
YI l4

Al

AZ

YJ U

!

I

..

5

Y5

•

YI

Y7 •

zLI-

-·-·-

..

41(7

••

~M COMUPT 3

~

CIOO

O. OluF

MA 10
MA II
MA 12 7
MAU

... 14

MA "

- WAIT
ALE

lilill:rlliR 1 •

ill

11111

CLXOUT
CU<OUT 4

IOI< UNC

RYJr

r

I

r

ER18CE MIDI
ENAILE RSi115 Ti 20

.

Lal CONT
LCO LIGHT
P£AIP1£RAL RESET 30

PAGE SELECT

RC»4 ~AIT
TX RS415
RX RS415 17
21112 !NT
Ml 44

M2

0 A SET

ll'XA SIGNAL

GM

AI >I

.

,,..,..,n-_. -n t.AI 2

~

~ ~

417CWI 51

~

llllTlf'l'llI1I

I 12

~

1t.c1•sc

5

MA 10

e

MA II
MA 12

I

MAil

I

MA 14

10 MA s,

20 RC»4 WAIT

2

ALE

3

INST

til1!llr1liA

17 JIil

2] ill

II 11111

I

ClKOUT

clkout

l IOOK II

C66

~0 . 0IUF

470ii""""51

RY4 rl

]R~ rl

JIOK

]~a: rl

m=r

••~v

-·-·

XU.I.I

111, ...

22 IIUSWIOTH
15 ClX IY 2
15 CU< IY 4
II

READY

21 l5rl6

(AOOI

(ADIi Pl . 1

(A021

(AOSI
IAOII P3 . I
(A071

IAOII
IAOIOJ P4 . 2

IA0121 P4,4

IAOl51 P4. 7

11512/HS0 , 4

H7liM

ALE/IllV

IIUSWIDTl<

en,.

22PFT

READY

Pl.O

••

PI.I

Pl.2
22 Pl. 3/PIIMI (AOJI
23 Pl. 4/PM>l2 (A041 Pl . 4

Pl.5/WD
31 PI , 8/ICDX
32 pl. 7 /lrCll

II P2 . 0 (11101 (ADIi

P2 . I (RXOI
15 P2 . 2 IEXTINTJ

P2 . 3 (T2CI.KI IAOIII P4 , 3
4

2 P2 , 4 (T2ASTJ

39 P2 .5 IPlfNDI IAOlll P4 , 5

ll P2 .I IT2UP-ONI IA014I P4 . I

JI P2 . 7 IT2 CAPI

PO. O (ACHOI

•

5

PO. I IACHII

1

P0 . 2 IACH21 HSI. I

PO. J IACHll

•

II PO. • IACH41 HSIJ/HS0 . 5

10 PO. 5 (ACIIII
I

P0 . 8 IACHII HSO. I

P0 . 7 IACH71

•

13 YREF

12 -

... 1

r.

1l£"SET

,-..!!

vss

YSS

~

37 ypp

JITALS XTAL2

07

r--0--

•• CII
T221)F

ICJI

ALE EX TENDED ,_!! N/C

IUSIIIOTH
ClX IY 2

CU IY 4

~

lll1ICl

~

CB006101

UAL20VaA- l:>l.t"

RIO

All

m= rl

]RVIZ

IOI<

llRAICl

MASTER

Y IATT

]~~

rl

==oc.11~ :

ISO AO 0

Pl .O

51 AO I
!58 AO 2

Pl . 2

57

Pl . 3

!58 AO 4

55

Pl . 5

54
5]

PJ.I

52 AO I

P4.0

51 AO I

P4. I

so

••

41

47

41 AO 14

45 AO 15

2• tm""ffil!

HSI . O

25
21

27 TEST LED
21tim1Crn

HSO.O

21

34

HS0. 2

J, TEST Al.010

HSO.J

40

lill7IIIC

41 1ilil

43 READY

REAOY

51 lll

lll

62
53

INST

84 IIUSWIOTH
15 CU<OUT

Cl.KOUT

, ...

AIOO

11<2

21

]~~

rl

=O~uF :

AO 3

AO 5
AO I
AO 7

AO 10
AO 11
AO 12
AO 13

1271 !NT_

~

054 SYNC

AMll SYN:

]~~

=o~~

-

lffl

ALE

INST

MA e I
MA 7

MA I

.....----L

,-.L

I

-lliil

PC741COOT

0

rl

PI.U.00WN

_JY

RIO•

!IK2

21

~-~

IC32

AO

2

Al

]

A2

n
n 'OIi

I

El '01

,_,...,~

RIO]
41(7 51

PIA.LOONN

ll[ID

12

IC21113

+sy~

RYU
ICNC

Cl50

O.luF

g

AO 0

1.0 I

AO 2

AO 3 5

AO 4

AO <O: 15> Al

AIOI

41(7

DI

bill

OT TX RS4B,

?nm 1.0 0 2

'Ill! 15

14 ?rim

l!I

,.!!

11:!

N/C

n& N/C

mill N/C

l!!~

I A

~

AO 5

AO I

AO 7 I

AD I 2

1.0. 3

Ml 10

AO II 5
AO 12

AO 13

.AO 14

•o 15

•O I

AO 2

Ill 3

AO •

I>!) 5

AO 8

1~~

74AC14SC r 74Aso,,,._

~LDOIIN2

l CSI

::c;,OluF

L 14A 0

L MA I

l MA 2 I

l MA]

CA~ OET I
1'P 5
ClX IY 2

~

BO

II

12

RXOA
RXOI

'Cr3l2

lffl

JIil 10 RON

2

•

7

4

o IP2 07 21

3
43 IP•

42 !PI
41 !PI

J5 RXOA

II RXOI

JI CEN

•

C71 o •

22PFT

.. ,

• ID

20

•

30

•

41)

I

!50

7

150

I

70

10

II LE

I

llr

, ...........

IC21

10

20

30

•

40

I

!50

1

150

I

70

10

•

II LE

I

tll

74ACO,.s,<;

FADER PAGE REG

ICIS

ID

3

20

30

•

,

40

e

!50

1

150

I

70

tll

~

41<7 51

SCC261>ACIA ..

AO
Al
A2

AJ

!PO
!PI

IPJ

IC25

-

RESET

XI CU<

315

AIOI

100KS1

H~

3.-...U

... 0

10 II

... t

20 II

... 2

30 17

... ]

4Q 18

....

511 15

... 5

11G 14

70 13

""8

IQ .. MA 7

....

IQ II

MA I

II

20

MA 10

30

17

MA II

40 16

MA 12

511 15

MA 13

50 14

MA l4

70 13

MA 15

IQ 12

10 19

20 II

30 17

.a ID

511 15

11G 14

70 ,.ll N/C

ea&-

ll[ID

CE RAM

DO 21
DI II

02 27

OJ 19
04 25
05 20

06 25

32

OPO

14

OPI

JI

OP2

15

OPJ

JO

OP4

18

OP5

21

OPI

17

OP7

33

TXOA

13

rxoe

INTRN

.ll-

X2

.,

•• ceo
T 22PF

-

HPXR AO 21

HPXR Al 22

ll'XA A2 23

y~

g - l4

1nl IC21

PC741COOT

MA I

... 2
... 3

....

... 5

MA I

MA 7

MA I

MA I
MA 10

MA II

MA 12

... 13

MA 14

MA 15

A0fO MA II 3

PIA.lOONN

Pll

2•
25

>6

c1e l

O.luFL

I

All•

-~,

,1~ CS

7,.fc";•sc

12 AO

II Al

10
I
I
7

I
5
27 Al

26 Al

23
2S All

•

21 Al]

21 At4

2

I

t±

t':/YPP

AO 0
AO I
AO 2

AO 3

AO 4

AO,

AO I

AO 7

OPO
OPI
OP2
OPJ
OP4

OP5

OPI
OP7 _

TXOA

TXOI

5Y

2112 INT

ICJI

DO 13

1lrll0M

10 AO

I
I
7

5

•

J
2, Al
24 Al
2I AIO
23 All

2
21 All

I Al4

21
27 iE
22

r

~

01 l4

OJ 17
04 II

08 20
07 21

Al
A2

AJ 1/03

..

A5

AS

A7

Al2

YCC

~

~

A2 02 15

Al

..

A5 05 II
Al
A7

AIO

Al2

Al5
All

I

PGM
YPP

c,'"'JJc'-Cl.lF"~ ;a1,,;:,ic:-20FA

MA I

... 2
MA 3

MA 4

MA 5 e
MA e
MA 7

MA I

MA •
MA 10
MA II

MA 12

MA u

MA 14

MA 15

~

JIil

..

2
3

•

5
I
7
I
I

__L

....!!.

AO <O: 15>

<O: 15>

MA

IC24

·--··"-, ...

uH

1.~J"~

0

Lal LIGHT

1c~o

1

RXOI

1ucs'isc

1

·~"

PC

NOTE: PIN OUTS FOR 271:512·20FA l!Cll, 391 ARE DISPLACED SY 2 BECAUSE A 211 PIN DEVICE IS

SCA!,£

DIMENSIOffS IN nuo

I

I

I

I DEC. PLACE • 0.4 •un

I DEC. PLACES o 0.1 mm

UNLESS OTHEIIWlSJ; STATED

IC30 IC39

YI

Al

A2

Al

••

A5

A7 Al

Al

'l!n

~

~

Y2

11 AO 2

n

Y4 l5 All l
vsUAD4
,8 13 AD 5

Y7 12 AO I

y111A07

--·-

AO 0

II

1/00

AO t

12

1/01

AO 2

13

1/02

1, AO 3 ....

15

AO •

1/04

17 AO 5 MA 8

1/05

AO U

II

1/08

AO 7 ....

II

1/07

1~

C77 l

O. lufL

· ~

"88 R90

(.1(7

~I

JC:c!3 E

.SC

L-

lllk11 e11tt froa 11tNf' EIA-232-0 or AS

FITTED IN A 32 >IN SITE. THIS DEVICE THE>lEFORE OCC\.PIES PINS 3-30 .

TOl.£RANcts

AHCUlJJI • o.as•

I

MA I

12 AO

... 2

II Al

... 3

10 A2

....

I

... 5

... 6 7

MA 7

MA I

MA I

MA 10

MA II 2

MA 12

... 13

... 14

MA 15

A0fO MA II 3

PIA.lOONN

MA I

MA 2

MA 3

MA 5

MA 7

MA I
MA 10

MA II

MA 12
MA 13

... 14

MA 15

lllirlllM

lll

r~ ·--·

,;;,

) YTII

~

IRO IRO IAO

,.

I

1c21

PC741COOT

Al

I

..

A5

I
5 07 21

A7

27 Al

26 A9

3 AIO

25 AU

4

Al2

21 All

29 AS,t

Al5

2

All

I

PGM

I

t±

YPP

t':/YPP

Al
A2
Al

..

A5
AS

A7

AIO

Al2

I AS4

YCC

5

4

1

R92 I

51 51

RIii 41(7 51

.r-,___

-

IC22

M-70L

R93

~

10 AO

•

I

1

e

,

•

3

25 A8

24 Al
21

23 All
2

2l5 All

21
27 Iii'
22 tir

BSTISO

1/00
1/01
l/02
1/03
1/04
1/05
1/08
1/07

T

I

rtt1lnr

~and Lighting Ltd

MA TEJUAL:.

FlNISII:·

l1JtST USED ON:- IL 33227

REACT

I TITLE

OJtO. No.

6B 40045 or,

DO 13

01 14
02 15
OJ 17

04 II
05 19

08 20

II
12 AO I

13

15 AO II
15 AO 12

17 AO 13

18 AO 14

II AO 15

p

.F

3

IC21

PC741COOT

REACT HAIN PANEL CAOO

2

Al

3

Ai

Al

•

5

••

I

A5

7

Al

I

A7

Al

•

__L

m

m

....!!.

•-••<ISC

AO I

AO 10

AO 0 1 :

AO I 1:

AO 2

AO 3

AO 4
AO 5
AO 5
AO 7

• CE LCD 6 C

Lal CONT REF JC

0

-El~

.,Fs

r

IC2;_.,F

I

172U~:

2

eWU RS485 RX

hl. flU IUU h .. , . IUOII r ... OHi UUI

IPROCCESSORI

DIAGRAM

CIRCUIT

SIi~

IC33

YI 11 Ml I

1

Y2 17 AO I

-',i .

Y3 18 AO 10

Y4 15 AO II

y5 14 AO 12
YI 13 AO 13
y7 12 AO 14

YI II AO 15

MA 0

I

MA

ct

•·-1GHT 1-

.

0~

RXOII

ISSUE

I

SIC7

,:

·-

so:

·-

u:

12:

13:
14:

PLS

, .

5 •
3

MIIIOJ

.,,,u

,.

C

D

E

r

G

IH

~------

1

DIG. No. Dl 7 ISIUS

68 40045 OFI l

I 4 I

~

; ~ A &) ~/ :-:==:SLO :::: :

--'

~

~

::,

_ 082 14 All 2 9

~

- PEA I RESET 01• I 4A7 51

. l ":)

~

iii N/C 1!! SHIFT SI.I 33 SI.I 4A7 51 h SW29

;;:i N/C 37 CNT\./&TI Sl.2 34 Sl.2 C 7 A72 µ FX 5

;;:i X SWITCH 2 I R.2 91 JO 12 .--r:3--+----+-----+-- --+---- ~ •-+---1~~ I

~

:

~

~

I Del 13 All I 10

I'll 10 I'll 085 17 A77

'ill 11 'ill Dee 11 ~----r,--1---~ D•5 057

.... o 2, Ao 017 19 4A7 51 Q •1

X SWITCH 3 2 R.l 92 29 l ll D3 Lt •

C X SWITCH 4 5 R.• 93 29 4 14 o• ~~~=-=--=--=--=-~-' r-C=J-+----l----+----l----+-----J Lt,-1 BASIS

l SWITCN 5 I R.5 AD 5 15 05 12 =()C h SW33

• SWITCH a 7 R.S a IS 06 II K rtµ FX 6

l SW T 7 I R.7 ,=~-----<-->----'-< ~1!.!0!._ ______ C:::l--l----+----l----+----...J.-----l-, LJ

~

----- ·- 112

«7 BI r--t---- ?ill

::iPIA.::L~OOWIQ~~~=================~--4

12 AD o 11

080

3 CUC 013 15 AD 3 All <O: 7> A71

~~---' -9 -

-a,

I

7

• BASIS

3

1tDANGLE PROJECTION

DQ NOT SCALE

IF IN DOUBT-ASK

o~

~

~

~

I

~

II !__, !Cl4 E SL • lT 11! 10 CA 5 II BASIS

_

I

~

. •

I

I ~ ~-1-~

1271 !NT .,..::-"''-!..!.""-.L.-+-+.----

-=~='---+---------------' ,. l SWITCH 2 _

D Sl.0 I AO M 15 CA D 13 dµ CYCLE

ICIJ

PU [ h SW2I

~

0

D49

BASIS

!'-='-~-, A2 1!l! 13 CA 2 15 ,o l SWITCH 3

1l] 12 CA l IS ,-------11----+-+---t--ll----+-+---<H---+-ii----++--~ D52

~

II CA • 17 q .,

u:::,.,.,---<t--l-f----'5"-lt, ?ill I CA I II h SW27

.-.Cl<IC a El -a, 7 CA 7 nµ FLICKER

7

....,.Til',,.,,,111!1'~ ~-----1----+-+----1----+-+---,-1---+-1----..i---~ ... SWITCH • LI

y LAWS PSU D40

q

.,

~

l p swu

- - E -C::J---+-lf-t: r-----f---...-+-----+---...-+----.-+---1--4---...-+----, ,. l SWITCH 5 d CHASE

q

AO 15 D43

H

3 ,.PQNEA FA11, ,..-, , L--c:::i---+~-r ,.x SWITCH, LI

rl I t 4 In '! .............__ -.N--J

Ll I El l-7'----,

Al 14 .,

l A2 13 ---11----+-+---,-ll----+-+----<H----+-1----<H---~ IT BASIi

12

._

____ ..,

~

,.• SWITCH I LI

~D

Yp SWl7

~

059

.,

BASIi

~~~

BUILD

D47 D39 029 I

I I BASUI l BASUI BASUS

~h SW24' ~h SW15 h SW]

µ STEP µ MINUS . µ FI !EXIT)

045 038 031

q O q .,

BASIi BASIi 8ASl5

h SW23

µ FCJlH.t.RD µ RECOfll µ F2

05S D29 D3'

051 OJI 03 7

~

BASIi r1 BASIi ~IS

~h SW]S yh swu 4h sw,:"~

µ BOUICE µ CH SCENE µ F 4

D41 062 034

~

. L-th SWl2 Y,t, SW'.35 4h SNS BA!

IIA!III IT IIA!III ~II

µ FX l '.J BLACKDUT µ CURSOR lJ>

042 051 032

0,1 050 on

053 058 030

' q .,

1

'h SWl4 h SW5

BASIi BASIi

q

h sw2 h sw1

µ HOLD µ FJ

BASIS BASIi

Q

i, SW25 h SW7

I') FLASH µ CURSOR

SOLO

SW22

FLASH µ CURSOR

CH SCENE RIGHT

SN32

GO STOP rlµ CURSOR

q .,

q .,

DOWN

q .,

BASIi

h SW9

q .,

BASIi

h sw4

LEFT

() ........ ,..,. ....

n..0ta....,,"-ll,..banp,N

-~--,-

.:::: ::.::-llrnl ..

ll

•

A

C

D

~

I~

GI I I

ISSUES

I~

" s

..

Q

--

oi5i'Mii"

SCALE

DIMENSlONS IN

I

TOLERANCES

I DEC. Pt.AC£• 0.4 nun

I DEC. PLACES • 0.1 mm

ANGULAR

11NLES1 O'niEIIWISE ST A TE~

mm

• a.as•

kiand Lighting Ltd

MAT£R!AL:-

llNISH :•

DAT>:

nRST USED ON:- IL 33227

REACT

1TrLE

DRC. No.

68 40045

.....,.Clftlc-9 lh>ftl C•••••h•'"""•' c.- •u

, ... _" ...... i. ... "" IOCl

h t Il l HD JIii h•• . lltO ru II Ml IIU

r-, . Nloc:Nllll .. l...._to altat. 1• ld coW, r 11, ltl JU

hi . OHi UU J fo .. a. tUOIII Fu HU IJUI

REACT MAIN PANEL CAf10.

(LED SWITCH) .

CIRCUIT DIAGRAM.

Sll.7

ISSll£

ore

I

0

H

1·!~

-~

~

:~

~

~

~

'~

~

~

:ill

~

~ -

~

3

~

~

~

~

3

~

iJ

:i DIIO.llo.

\

I

I I

111.,

or,

1-:i-

I

I

I

>

'

All <O: 7>

T

.,

VlU

I

-I

CARii POWER

All4

.,.,

,.

IC8571

AIOI AIIO

IK2 21

41(7 ,.

=I

I I 11

MA <0: SS>

1

~

m

I

-I I I

ill

4

I 3mANGLE PROJECTION

I

DO NOT SCALE I

IF IN DOUBT-ASK

All
All

z

All
All ,

MA 0
MA
MA

z

MA J
MA 4

MA 5

7

RIii

47011 51

MA I
MA I

MA 10

A112

47011

111

l

u

3

Al

.,

4
5

u

B

&5

7

AB YI

I

A7

AB

'

I

m

•m

I

Al

3

&2

.,

u Y4

A5

All YI

A7 Y1

C40

1

t

1~-- ....

PU

N/C

N/C

. _J_

23

2'

PI.I

21

'

17

5

11

PI.I C

51

.a

0

~

~

••

•5
7

'

I

([

0

I-

II

112

13

14

115

II

17

N

Y1

YI

7

YI

Y2
Y3

va

YI

CARD DO

0

C&III

C&III AO
CAIII Al
C&III Ac
C&III &3
CAAOU 3

&Ill A5

CARii AB I

&7

CAAO Al

C&III A9

CARD A 0

~

I

n.Drt-.Nllll•be~

_...,.......... _ _,_

::::~.r ... .,

A

11

IC

ID

u

w

z

I

ID 11

3

2D

4

30

5

40

B

!ID

7

BO

I

70

110

'

I

LE

¥

C4

"

Ill'

m

.. CARD PONEII

IO

I

112

.cHI! :l'l

0 . 01111'~

AD 0

,,

I

1nlT

...

I

,I

i

I

r

AIIB

47K 51

y

AIIB All7

IO

11

1201(51 1201(51

C93

t - 1111'

PC741COOT

Al15

41(7

51

RIii

41(7 41(7

BI BI

5Y

Al20

7

CARii PAGE AEGlSTEA

~

A113
47K

51

. 51

LE

§i

PI.I 0

47

5

53

55

I
10
12

4

PI.I E

••

&

52

5•

5e

2.

~

..B.

z

0

u

0

([

<(

u

IE

f-

IF

~

GI

-

1~=1

~

I

"'

~

...

&

L__

.~

I

E~~L _______________________________________________________________________

r

~

oac. . u •••. c-••• .. ,_ .. ,.,,, o.- w,,

lll•-" • lob,,Nl,o,Ma TWT IOO
hC OI N• 1111 hle1 1101 tM II WI IIOI

I

l I DEC. PLACE•0 .4 "'' "

I

I ~=:a I ~and Lighting Ltd

l DEC . PLACES • 0.1 ""-'

ANGU!.AR. O.Z!r I

UNLDII O'nlDWISE ITAl'ED I -:

DMWNt

I

l

4

--.

•

11.f . l!l!< ·l"

MA TEJl1AL:.

1

DATE

nltST USED ON:- SL 33227

,o

REACT

'l'l11.E

Df"'Atnu/1

OltG.

No.

68 40045

r...-, MltcMi.,- , ...... . ... t.o ..... lootc.Wr Flit IT! JU

t. t. HU UU.J """· · tnoo , .. . .... IUII

REACT MAIN PANEL CARO

(CARO lNTERF ACE)

CIRCUIT DIAGRAM

SH~

or,

T~

I

,- ..

IG

H

m:'J:'(QI;:)

DIIO ....

6B40046

_ __.,.... __ _

Ill

Of'

@·El

3rd ANGLE PROJECTION

DO NOT SCALE

IF IN DOUBT ASK

@;) __ ...

n-0..--. ........ .. .....

__ ...

...- .. ..-...........

11.U l,kJII

~ -

I! !~

I

f

I

I

!-.~

11

A

·sr

RV17

lOIC

SM AO

SW A
SW U I

..l!!L-.!

0 l.il

1lli

2~

JlH

,u

sLI

ICS

I .. ..:~-· U-l

II lOIC l OIC

.. W,i

e

~

R\'22

lOIC

R\'21 Ul RV20 I •

L-f

lOIC ·ytOIC "'-10

•

RVll
lOIC

L-t

AVlB

lOIC

L-f

·sr

C

+9~

All

4IO

All

«7

INH

_ , Iv,,

r---1 ICI

olil

till

zu,_

Jill

•' l

sLI

eL1.

R:111

1/f.7

J

II~

11~3;

II~

I -v ~, ; UJ J q q q q q q q q

11

[jpswe QbSV7

bsws 0~ ... [j~SW3 [j~swz [jb1W1

0b-0

+!5~

PI.I ,

A3 Q11.1 I !Al

«7 .. 7 «7

O

A30

4IO

11~

•9~

ICl<O!IIIICl'_~I

-=-=c-=-iA

=-=-....,•

=-=---=-;C

-"'""--"--1INH

R2I

«7

[1~

.• "lli I I I I I 1 I

I 1'

2~

Jill

•' I

S' s

IC9 'L2 I I

-Y C0"

I•

7 ·-

~

_:~ I

112,

llC7

CIM' , FEF.

It!

IC2-9

q [

"27 [

«7

[j

II~

«7

-

q q

b IWIZ ,

_!;ol!I_I_IOf

b SMll [jb SMIO [jb -

TYi'£

IOf;_H!!OIIICP 1•

1.~,,c:.._1~

II~

11:

A

C

~~1!.~ I~-~

SWl3 I l:1 -ii~ I

DSllC2•1

AVJI RVlS
IOI< lOIC

ICl•DSIIICP

ll A

•

C

INH

YH

e

+SY All.

F

..

!

u

D

r kKI

1

SW AO

RYU
IOIC

L-f

RYU
IOIC

AVl2 L_J) RYil [ .f'l RVlO

y

lOK

~

IOIC ~lOIC

I .f'l AVI I! 7 I

~lOK

~

I I

I I

~

• i 2 l!

-~

I

I

ICUO~

.,.

~

.,

1r.2

-·.

-v

I J

otn

1lH

zUL_

3i::u==

.

~

s~

9L2_

7 L 4_

At§--~

~!K

~

~IK

•StAl4PI

dVll

~IIOS71

Pll

11,

CA •
CA 2

15.

CA

0

lK

CA 8

u,

1•.

-1 CJ

M

y'

l.:

0

LOI l - L~ l

r.::it::1 ,, I

lTU23lH kn!13lH

VT2

10171

1

D

I

I

I

I

l

kKO

e

,,

I

Pll

~

I 22 ,_,,A Al RB c::rJ.!!.

~

~! ::: :~ Rt CJ lk

..,_,"-===-------"'l!!-.r-,...I?•'--+-~SW~A!,!!•_.!.!..j

~

..,.A A4

21 ,_,XA A5

-

I

0

··111111:

..

~

" l K SW AS 10 l U kKl

AU

I

AYI

IOI<

~

AY7

lOIC

IIYI

lOIC

L-f

RYS
lOIC

!

~~,i

ii, . .

o U kKO

A K !!WAI IC zl5 ILK2

'----=-•-11NH 3 2 kKJ INH

I

1 VII ,1 l IUC4 ~~~-------+------------1-4-+4

IC7 srS~-------------+------------'

• 2

I

~=======1=1 ===~

L-t

I

......

lOIC

AY3

L-t

O.OlufT CJ

lOIC

Cl 1

I

L-f

AY2

lOIC

~

L-f

AYI

lOIC

zf:> • ! I

• !Cl

CASUIOE

~

~Hl--------~•

I

All

... ,

~

ll!

0

,-i l l-'-''--1--1-~

I

I

7 YH 4

!C9 S lK

I lK

7 ·-

COi<

_,, r-rttt-=======-_J

1•

..__,I_L_

.!!.!.-...C:J ,~

CA S

I

CA

CA

CA 7

r~

~

RP

~

l

41<7

~

1121

.,

~

R20 DAIi

«17 41(7

.

NOTES:

a. ) •N•LOGUE OV NOT•TEO VU : - m1l

b.) •LL flESISTORS AIIE SFR25 0 . 4N lN.ESS SUTEO.

-~rand Lighting Ltd

_ .... _

.,_.aa-,c,,._w.,1•.,_.,_, .........

,... •. .....,u, . .,.._. mn ,._ .,....,,a

,-y:.....,_..._........._._..,,,. n,a, .

M.......,..,_.,,._,_ .......

I

3 ll
l

PI.I

1•

..

20.

i

•

l

+!5Y AM.

I I I

r

f

C2 6 C• 6 CS J. Cl .L C7 l Cl l Cl •

2~:T 2~:·T O.Oluf T O. Oluf T O.Oh# T O. Oluf T O.Oluf" -

~

DIMENSIONS

MATEJIIAL<•

FllCllll:·

11JS'Tlllm011 :•

AOCT

1 DEC. PUICE • 0. tnaa

I DEC. PLACD • 0.1,..

UNLEII OfflDW1SE ff ATm

ICALEI

ll3322 7

l

DltA\lnl 11 .... -- 1~ , 11 . ..

au:cro I •.c. YCIU4I I" . u.•

AWD

1

OI IMI

'IOI.EIWICEII

AHCtn.Al•O .Jr

& ••

DATE

I

... ._.

I

SCIECU.E : 5S33221
CJRILLIIIG : 584017l

'lfflZ

RHCT F .lOER WING

PCBl0l5/2

I

--

X lid 0

• ltd l

l( )Id 2

X ltd l

l )Id 4 I

! ltd !! 1 •

"bf

oA---s L±:

~

CIRCUIT OUGAAM

IDIICJ ....

6840045

Pll

12

1

11.

10.

' .

5

'-·

2,-

1

.

REF1953

I'

L!J!

Ill.I

or I

0

111