STMicroelectronicsS R3911BD1 User Manual

UM2042
User manual
Discovery kit for the ST25R3911B
high performance HF reader / NFC initiator
Introduction
The ST25R3911 B-DISCO is a ready-to-use development kit to evaluate the functions of the high performance HF reader / NFC initiator ST25R3911B in Reader mode for contactless applications.
The ST25R3911B-DISCO kit supports
ISO 18092 (NFCIP-1) active P2P
ISO 14443A and ISO14443B
ISO 15693
FeliCa™
VHBR, with 6.8 Mbit/s PCD to PICC framing and 3.4 Mbit/s PICC to PCD framing
Up to 1.4 W output power with differential antenna
Possibility of driving two antennas in single ended mode, with automatic antenna tuning
(AAT) system
Inductive and capacitive Wake-up
User selectable and automatic gain control
®
Transparent and Stream modes to implement MIFARE custom protocols
The evaluation kit includes
the STM32L476RET6, a 32-bit microcontroller with 512 KB of Flash memory
a 105 mm x 52 mm, two turns antenna etched on the PCB, and its VHBR tuning circuit
a Micro-USB connector for communication with the host PC and board powering
six LEDs indicating the presence of the RF field and of the protocol used to communicate.
Classic compliant or other
Figure 1. ST25R3911B-DISCO PCB (top view)
July 2017 DocID029132 Rev 2 1/25
www.st.com
1
Contents UM2042
Contents
1 Quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.1 USB connectivity and power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.2 STM32L4 MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.3 ST25R3911B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.4 Antenna and matching network components . . . . . . . . . . . . . . . . . . . . . . 8
2.3 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.1 PCB overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.2 PCB layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Antenna matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 Federal Communications Commission (FCC)
and Industry Canada (IC) compliance statements . . . . . . . . . . . . . . . . 22
4.1 FCC Compliance Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.1 Part 15.19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.2 Part 15.21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.3 Part 15.105 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.4 FCC ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2 Formal notices required by the Industry Canada (“IC”) . . . . . . . . . . . . . . 22
4.2.1 Compliance Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2.2 Declaration de Conformité . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2.3 IC ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25 DocID029132 Rev 2
UM2042 List of tables
List of tables
Table 1. NFC Forum matching alternatives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 2. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DocID029132 Rev 2 3/25
3
List of figures UM2042
List of figures
Figure 1. ST25R3911B-DISCO PCB (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Schematics overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. USB interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. STM32L476 schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. ST25R3911B schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Antenna and matching network schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. PCB overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. PCB layout, top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. PCB layout, mid layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. PCB layout, mid layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. PCB layout, bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. VHBR matching with an AAT setting of 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 14. NFC Forum matching with an AAT setting of 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4/25 DocID029132 Rev 2
UM2042 Quick start
1 Quick start
The ST25R3911B-DISCO is connected to a PC via USB to show the features of the ST25R3911B chip. To do so, use the software STSW-ST25R001 to control all the functions of the discovery kit.
1.1 Getting started
Connect the discovery kit to a PC using a micro USB cable. The USB port of the PC must be capable of delivering at least 250 mA at 5 Volt supply.
To control the board, download the software STSW-ST25R001 from www.st.com and install it. Further information on how to operate the software can be found in the user manual UM2177 “PC software for the ST25R3911B-DISCO kit”, available on www.st.com.
1.2 System requirements
Windows® PC (Windows 7 recommended)
USB port, capable of delivering at least 250 mA at 5 V supply (1.25 W)
Unit must be supplied by a Safety Extra Low Voltage (SELV) limited power source
through the USB port, the source should not exceed 60 Vdc / 8 A / 100 VA
Micro-USB cable
DocID029132 Rev 2 5/25
24
Hardware UM2042
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2 Hardware
The PCB (Printed Circuit Board) is connected via USB to the PC. The STSW-ST25R001 PC software controls the STM32 MCU located on the PCB. The STM32 MCU then operates the ST25R3911B via SPI.
The ST25R3911B is connected directly to the 5 V supply of the USB bus. An LDO converts this voltage down to 3.3 V, to supply the microcontroller.
A green LED close to the USB plug indicates if the board is powered. Six blue LEDs indicate the mode of operation (transmit / receive) and which technologies are in use.
The antenna runs along the PCB perimeter.
2.1 Block diagram
Figure 2 shows the functional block diagram of the board.
Figure 2. Functional block diagram
2.2 Schematics
As indicated in Figure 3, the schematics can be split into four main parts
USB connectivity and power supply (Figure 4)
STM32 MCU (Figure 5)
ST25R3911B (Figure 6)
Antenna and matching network components (Figure 7)
6/25 DocID029132 Rev 2
UM2042 Hardware
2.2.1 USB connectivity and power supply
The ST25R3911B-DISCO board can be connected via USB to a host device. Right behind the Micro-USB plug, an ECMF02 common mode filter with ESD protection for
USB 2.0 interface is placed. The common mode filter is connected to VBUS and to the D+/D- data lines of the USB. All the USB terminals are ESD-protected by the built-in ESD diodes of the ECMF02.
Additionally , the power supply filter for the 5 V supplies the 3.3 V LDO, that, in turn, supplies the microcontroller.
A green LED is connected to the USB VBUS supply and shows the USB-power status.
2.2.2 STM32L4 MCU
This schematic includes the microcontroller needed to operate the NFC reader IC. The MCU is clocked by a 32.768 kHz crystal. The MCU uses an internal PLL to generate the
48 MHz USB clock and the 80 MHz core clock from the provided 32.768 kHz. Connector P201 is a JTAG/SWD interface to assist in software development. It can be
connected to an external ST-LINK/V2 device using a 9-pin Cortex The six blue LEDs (LED201 to LED206) show the current mode of communication. If
multiple protocols are active at the same time, then all corresponding LEDs are turned on. The five resistors (R218 to R222) can be used to disconnect the MCU from SPI interface
header P204. This SPI cross-connect mode can be used to operate th e ST25R3911B with a different MCU PCB by cross connecting the ST25R3911B SPI to the second MCU PCB.
Connectors P202 and P203 can be used to connect an external UART or I2C host device to the MCU.
®
-M adapter.
2.2.3 ST25R3911B
The ST25R3911B is directly connected to the filtered 5 V USB supply, and there are additional supply filtering components placed close to it. The jumper JP301 can be used to measure the supply current of the chip. If this measurement is performed, the ferrite bead L301 has to be removed.
Capacitors C301 to C304 provide additional filtering. All decoupling capacitors have been placed as close as possible to the ST25R3911B. Special care has been taken for C310, C302, C314 and C301, as they are the decoupling capacitors for the high power driver stage.
In order to demonstrate the capacitive wake-up feature, two capacitive electrodes are placed on the PCB. Additional electrodes can b e connected using UFL connectors o n P301 and P302.
For SPI cross-connecting to another reader PCB, the resistors R301 to R305 can be removed. Then the STM32L4 MCU SPI can be connected to the ST25R3911B on any customer PCB via header P204.
Thanks to J303 it is possible to bypass the internal VSP_RF regulator, this is required in case output currents higher than 200 mA need to be supplied.
DocID029132 Rev 2 7/25
24
Hardware UM2042
2.2.4 Antenna and matching network components
This schematic contains the matching network and the automatic antenna tunin g capacitors, as well as the alternative NFC Forum matching components. In the default configuration, the ST25R3911B-DISCO is populated with a VHBR matching, with communication speeds up to 3.4 Mbps.
To support VHBR, the antenna is matched to a system Q-Factor of 8. By switching to the NFC Forum matching components the system Q-Factor is increased to 16. This can increase the read range up to 20%, depending on the used communication technology, but limits the maximum supported communication bit rate to 848 kbps. Additional details about antenna matching can be found on www.st.com/st25r.
8/25 DocID029132 Rev 2
UM2042 Hardware
Figure 3. Schematics overview
4
4
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U_Microcontroller
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B B
C C
D D
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DocID029132 Rev 2 9/25
Hardware UM2042
ST25
G103
Logo_ST25
ST Microelectronics
G104
GND
Logo_STM
PM/USB_con
V_RF
3V3
PM/USB_con
V_RF
3_3V
USBD_N
USBD_N
USBD_P
USBD_P
4
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ESD
G101
Logo_ESD
RoHS
G102
Logo_RoHS
4
LED101
3
V_RF
R101
C103
C102
C_1μ_0603_X5R
Figure 4. USB interface
2
1
L101
FB_0603
USBD_N
5
6
D-
GND
D-2D+3ID
VBUS
U101
1
2
1
D-
PWR
P101
USB Interface
C101
C_10μ_0603_X5R
USBD_P
7
D+
3
D+
C_10μ_0603_X5R
8
GND
ECMF02-4CMX8
4
4
5
ID
GND
Shield
J101
6
μUSB
closed 0R
L103
FB_0603_0R
L102
FB_0603_0R
GNDGND
3V3
3
U102 LD39050PU33R
6
V_RF
3V3 LDO
PG
VI
C106
C105
4
VO
EN
1
C104
C_2μ2_0402_X5R
C_10n_0402_X7R
5
NC
GND
0
GND
2
C_1μ_0603_X5R
2
GND
GND
1
A A
B B
10/25 DocID029132 Rev 2
C C
D D
UM2042 Hardware
6
V
5
4
3
Figure 5. STM32L476 schematics
2
1
LED6
LED5
LED4
LED3
R206
LED2
R205
LED1
R203
R202
LED201
Interface
T_JTMS
T_JTCK
R207
R201
R204
3V3
123456789
P201
SWD
T_SWO
AVDD
LED3
LED4
26
28
27
PB0
PB2
PB355PB456PB557PB658PB759PB861PB9
PB1/VREF+
PA014PA115PA216PA3/SAR_VREF+
PA420PA521PA622PA7
U201A
17
497-15872-ND
Microcontroller
IRQ_MCU
LED1
LED2
R209
R208
LED205
LED204
LED203
LED202
T_JTDI
T_SWO
R210
R211
SDA
SCL
/SS_MCU
LED5
62
PA841PA942PA1043PA1144PA1245PA1346PA1449PA15
23
SCLK_MCU
MISO_MCU
MOSI_MCU
UART_TX
LED6
LED206
T_NRST
10
30
29
PB10/PE8
MCU_D_N
UART_RX
PM/USB_con
V_RF
Header 10
AVDD
33
35
36
PB13/PB1434PB14/PB15
PB11/VCAP1
PB12/SD_VREF+
50
T_JTMS
T_JTCK
T_JTDI
MCU_D_P
V_RF
3_3V
3V3
MCU_D_P
R212
USBD_P
USBD_N MCU_D_N
40
PC839PC9
PB15/PD8
PC08PC19PC210PC3
LP_UART_RX
LP_UART_TX
PM/USB_con
USBD_N
USBD_P
USBD_N
USBD_P
R213
C202
C201
PC1051PC1152PC12
11
P202
C_56p_0402
C_56p_0402
C203
2
53
3
PC13
PC14 - OSC32_IN
PC424PC5
PC637PC7
25
V_RF
3_3V
SPI/Power_Con
V_RF
3V3
3V3
LP_UART_RX
LP_UART_TX
R214
R215
123
4
d.n.p.
C204
C_4p3_0402
X201
32.768 kHz
4
PC15 - OSC32_OUT
STM32L476RE
38
SPI/Power_Con
SEN
INTR
MISO
MOSI
SCLK
INTR
MISO
MOSI
SCLK
SEN
3V3
SDA
SCL
R216
123
P203
C_4p3_0402
C205
MCU_CLK
R217
4
d.n.p.
d.n.p.
Y201
SCLKSCLK_MCU
R218
R219
S201
T_NRST
7
NRST
PF0/PD0/PH0 - OSC_IN
U201B
5
d.n.p.
C206
LP_UART_RX
LP_UART_TXUART_TX
J201
open
J202
open
UART_RX
MOSI
MOSI_MCU
Case
60
BOOT0
PF1/PD1/PH1 - OSC_OUT
6
d.n.p.
3V3
INTR
R220
R221
IRQ_MCU
C207
12
VSSA
VBAT/VLCD
1
L201
GND
SEN
MISO
R222
MISO_MCU
/SS_MCU
C_100n_0402_X7R
63
31
54
PD2
VSS/VCAP1
VDDA/VREF+
VDD
13
32
64
AVDD
FB_0603
8 7
V_RF
6 5
3V3
4 3 2 1
3V3
Case
S202
C208
18
47
VSS
VSS/PF4/PA3
VSS/VCAP2/PF6
VDD/PF5
VDD/VUSB/VSA/PF7
VDD
STM32L476RE
19
48
P204 d.n.p.
C_100n_0402_X7R
R223
DD
C216
C21
in 12+
A
AVDD
C215
Pin 1
C214
4 Pin 31+
C213
in 63+
C212
C211
Pin 47+
C210
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5R
C_100n_0402_X7R
C_1μ_0402_X5R
C_100n_0402_X7R
C_100n_0402_X7R
C_100n_0402_X7R
1
C_4μ7_0402_X5R
3V3
A A
B B
C C
C_4μ7_0402_X5R
D D
C_100n_0402_X7R
C209
Pin 18+19 Pin 47+48 Pin 63+64 Pin 12+13Pin 31+32 Pin 1
Pin 18+
DocID029132 Rev 2 11/25
Hardware UM2042
SPI/Power_Con
4
Controller Interface
V_RF
SPI/Power_Con
V_RF
3V3
3_3V
INTR
R301
INTR_11
MISO
MOSI
R303
R302
MISO_11
MOSI_11
SEN
SCLK
R305
R304
SCLK_11
SEN_11
MCU_CLK
Antenna_Con
RFI1
RFI2
RFO1
RFO2
TRIM1_0
RFO1
RFO2
TRIM1_1
TRIM1_0
TRIM1_1
TRIM1_2
Antenna_Con
RFI2
RFI1
Antenna Connection
TRIM1_2
TRIM1_3
TRIM2_0
TRIM2_0
TRIM1_3
TRIM2_1
TRIM2_2
TRIM2_1
TRIM2_2
TRIM2_3
TRIM2_3
4
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Figure 6. ST25R391 1B schematics
3
TRIM1_0
TRIM1_1
TRIM1_2
U301
ST25R3911B
V_RF
d.n.p.
GND
C301
V_RF_3911
L301
C_1μ_0402_X5R
3V3
FB_0603
JP301
GND
C_100n_0402_X7R
C302
C304
C_100n_0402_X7R
C303
d.n.p.
d.n.p.
TRIM1_019TRIM2_0
TRIM1_117TRIM2_1
VDD
8
1
MISO29MOSI30SCLK
/SS
GND
32
SEN_11
MISO_11
MOSI_11
J302
J301
2
1
ST25R3911 NFC Initiator / HF Reader
TRIM1_3
TRIM2_0
TRIM2_1
TRIM2_2
TRIM2_3
14
20
16
18
TRIM1_313TRIM2_3
TRIM1_215TRIM2_2
VDD_IO
ST25R3911
NFC Initiator / HF Reader IC
CSO
IRQ27MCU_CLK
CSI
2
28
31
SCLK_11
INTR_11
P301
R306
CSO_out
2
CSO
25
CSI
R307
RFO1
RFO2
11
RFO110RFO2
5
CSI_out
GND
GND
GND
1
3
XTO4XTI
RFI1
RFI122RFI2
C306
C305
RFI2
23
EP VSUB VSS AGD
VSN_D VSP_D
VSN_RF VSP_RF
VSN_A VSP_A
C307
C_8p2_0402
Y301
C_12p_0402
GND GND
d.n.p.
33 21 24
6 3
12
9
26
7
GND
C308
GND
C_12p_0402
P302
VSP_RF
J303
V_RF_3911
C_8p2_0402
2
open
GND
GND
AGD
VSP_D
VSP_RF
VSP_A
1
3
C312
C311
C310
C309
d.n.p.
C_1μ_0402_X5R
C_10n_0402_X7R
C316
C315
C_2μ2_0402_X5R
C_10n_0402_X7R
C314
C_10n_0402_X7R
C313
C_10n_0402_X7R
C_2μ2_0402_X5R
GNDGND
GND
GNDGND
C_2μ2_0402_X5R
GND
3
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A A
B B
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C C
D D
UM2042 Hardware
Figure 7. Antenna and matching network schematics
4
4
MDG NFC & Reader Competence Center
Antenna Loop
J404
closed 0R
J401
closed 0R
123
J405
GND
C408
C_120p_0603
d.n.p.
C407
C409
closed 0R
R402
C410
C_180p_0603
C_680p_0603
L402
270n
C411
C_10p_0603
C412
C_82p_0603
GND
J402
3
C401
C_82p_0603
GND
2
C402
C_10p_0603
C403
R401
L401
C406
C404
C_180p_0603
C405
C_680p_0603
270n
C_120p_0603
d.n.p.
GND
R401_NFCF
R402_NFCF
C410_NFCF
C_120p_0603
C_120p_0603
GND GND
C403_NFCF
NFC Forum matching
TRIM1TRIM2
closed 0R
J407
C_5p6_0402
C_12p_0402
C_27p_0402
C416
TRIM1_0
C_5p6_0402
C415
C418
C_12p_0402
C417
C420
TRIM1_1
J406
C419
C_56p_0402
C422
TRIM1_2
closed 0R
C_56p_0402
C_27p_0402
C421
TRIM1_3
77
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Antenna.SchDoc
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ST25R3911B-DISCO
Title
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J403
RFI1
TRIM1
Antenna Circuit incl. EMI Filter and Matching
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A A
RFO1
RFO2
B B
DocID029132 Rev 2 13/25
TRIM2
RFI2
TRIM2_0
TRIM2_1
TRIM2_2
RFO1
RFO1
RFO2
RFO2
TRIM2_3
TRIM1_0
TRIM1_1
TRIM1_2
TRIM1_0
TRIM1_1
TRIM1_2
Antenna_Con
TRIM1_3
TRIM1_3
Trim Capacitor Banks
RFI2
RFI1
RFI1
RFI2
Antenna_Con
Antenna Connection
C C
TRIM2_1
TRIM2_0
TRIM2_0
TRIM2_1
TRIM2_3
TRIM2_2
TRIM2_2
TRIM2_3
D D
1
Hardware UM2042
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2.3 PCB layout
2.3.1 PCB overview
The PCB (see Figure 8) is organized in two halves
Left side: the SPI header P204 and the digital / MCU sections
Right side: the analog parts and the ST25R3911B.
The whole PCB is surrounded by a two turns NFC antenna.
Figure 8. PCB overview
The boot button can be found right above the I2C header. If this button is pressed during the powering or the resetting of the board, the STM32L4 will enter the boot loader mode. The reset button is positioned between the JTAG/SWD header and the I2C header.
2.3.2 PCB layers
The PCB layout is designed considering that the ST25R3911B is a high power RF transmitter, hence the decoupling cap acitors are located as close as possible to the positive and negative power supply pins, for example VSP_RF and VSN_RF.
Since the chip is using a differential output driver stage, the antenna matching network is treated as a differential network. The space between the components is kept as small as possible and the whole network is routed in a completely symmetrical way.
Via stitching and via shielding is used to maintain a low impedance and prevent short return current loops. The RF traces are protected by via stitching in combination with guard rings to create a via wall. This keeps the PCB electromagnetically “quiet”.
A via shield is used to create a vertical copper barrier th rough the PCB. This help s to reduce crosstalk and electromagnetic interference in any route carrying an RF signal. The RFI traces and AAT lanes are routed as close as possible to each other.
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UM2042 Hardware
Top layer
The top layer (Figure 9) contains most of the components and PCB traces. The unused areas around the ICs are filled with GND planes, guarded using via stitching. Furthermore, important analog traces are surrounded by GND vias.
Mid layer 1
This layer (Figure 10) is a pure GND plane, providing a low ohmic DC path for the GND connection.
Mid layer 2
Mid layer 2 (Figure 11) is used for the power distribution. It contains the power planes for the 5 V supply of the ST25R3911B and the 3.3 V supply of the microcontroller.
Bottom layer
The bottom layer (Figure 12) is mainly a GND plane, but some traces are routed through it.
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Hardware UM2042
Figure 9. PCB layout, top layer
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UM2042 Hardware
Figure 10. PCB layout, mid layer 1
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Hardware UM2042
Figure 11. PCB layout, mid layer 2
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Figure 12. PCB layout, bottom layer
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Antenna matching UM2042
3 Antenna matching
The default matching network assembled enables VHBR operation up to 3.4 Mbps. Components for an optional NFC Forum matching are placed on the board. Exchan ging the
components as indicated in Table 1 will increase the Q factor of the antenna system. VHBR communication at 3.4 Mbps and 1.7 Mbps bit rate will not be supported anymore, but the read range for lower data rate applications will increase, up to 20%.
The matching impedance will remain the same when switching between the two matchings.
VHBR matching
The VHBR matching is designed with a target Q-Factor of 8. The matching impedance is around 12.8 + j5 . The HW based AAT algorithm will typically adjust to an AAT value of 8 (see Figure 13).
Figure 13. VHBR matching with an AAT setting of 8
NFC Forum matching
The NFC Forum matching is designed with a target Q-Factor of 16. To switch to the NFC Forum matching the user needs to change the components listed in
Table 1.
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UM2042 Antenna matching
Table 1. NFC Forum matching alternatives
Default assembly Value NFC Forum replacement Value
C403 80 pF C403_NFCF 120 pF C410 180 pF C410_NFCF 120 pF R401 3R9 R401_NFCF 1R96 R402 3R9 R402_NFCF 1R96
With the new assembled values, the matching impedance looks as in Figure 14, with a value close to 11 + j6 .
Figure 14. NFC Forum matching with an AAT setting of 11
The HW based AAT algorithm will typically adjust to an AAT value of 11. Due to the higher Q-Factor the voltage on the antenna is also increasing. To have the receiver in an optimum signal level range, the capacitors C401 and C412 can be increased to 100 pF.
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Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements
4 Federal Communications Commission (FCC)
and Industry Canada (IC) compliance statements
4.1 FCC Compliance Statement
4.1.1 Part 15.19
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
4.1.2 Part 15.21
Any changes or modifications to this equipment not expressly approved by STMicroelectronics may cause harmful interference and void the user’s authority to operate this equipment.
4.1.3 Part 15.105
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed an d used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the
receiver is connected.
Consult the dealer or an experienced radio/ TV technician for help.
4.1.4 FCC ID
FCC ID: YCPR3911BD1
4.2 Formal notices required by the Industry Canada (“IC”)
4.2.1 Compliance Statement
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation.
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UM2042Federal Communications Commission (FCC) and Industry Canada (IC) compliance state-
4.2.2 Declaration de Conformité
Le présent appareil est conforme aux CNR d’Industrie Canada applicables aux appareils radio exempts de licence. L’exploitation est autorisée aux deux conditions suivantes: (1) l’appareil ne doit pas produire de brouillage, et (2) l’utilisateur de l’appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d’en compromettre le fonctionnement.
4.2.3 IC ID
IC ID: 8976B-R3911BD1
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Revision history UM2042
5 Revision history
Table 2. Document revision history
Date Revision Changes
23-Jun-2017 1 Initial release.
Added Section 4.1.3: Part 15.105.
25-Jul-2017 2
Updated Section 4.1.4: FCC ID and Section 4.2.3: IC ID. Updated Figure 8: PCB overview, Figure 9: PCB layout, top layer and
Figure 12: PCB layout, bottom layer.
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