Filter-free flip-chip stereo 2x2.5 W class D audio power amplifer
Features
■ Operates from V
■ Dedicated standby mode active low for each
= 2.5 V to 5.5 V
CC
channel
■ Output power per channel: 1.15 W @5 V or
0.63 W @ 3.6 V into 8Ω with 1% THD+N max.
■ Output power per channel: 1.85 W @5 V into
4 Ω with 1% THD+N max.
■ Output short-circuit protection
■ Four gain setting steps: 6, 12, 18, 24 dB
■ Low current consumption
■ PSSR: 63 dB typ @ 217 Hz.
■ Fast startup phase: 7.8 ms
■ Thermal shutdown protection
■ Flip-chip 16-bump lead-free package
LOUT-
LOUT-
LOUT+
LOUT+
Flip chip 16 bumps
Pin connections (top view)
STDBYL
PVCC
PVCC
STDBYL
STDBYR
STDBYR
G1
G1
G1
G1
PGND
PGND
AGND
AGND
G0
G0
ROUT-
ROUT-
ROUT+
ROUT+
AVCC
AVCC
Applications
■ Cellular phone
■ PDA
Description
The TS2012 is a fully differential stereo class D
power amplifier able to drive up to 1.15 W into an
8 Ω load at 5 V per channel. It achieves better
efficiency compared to typical class AB audio
amps.
The device has four diff erent gain settings utilizing
2 digital pins: G0 and G1.
Pop and click reduction circuitry provides low
on/off switch noise while allowing the device to
start within 8 ms.
Two standby pins (active low) allow each channel
to be switched off separately.
The TS2012 is available in a flip-chip 16-bump
lead-free package.
LIN+
LIN+
INL+
INL+
LIN-RIN-
LIN-RIN-
RIN+
RIN+
April 2008 Rev 31/31
www.st.com
31
ContentsTS2012FC
Contents
1Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
TS2012FCAbsolute maximum ratings and operating conditions
1 Absolute maximum ratings and operating conditions
Table 1.Absolute maximum ratings
SymbolParameterValueUnit
(2)
(1)
(6)
(5)
(7)
(3)
6V
GND to V
CC
V
200°C/W
(4)
2kV
200V
GND to V
CC
V
V
T
T
R
V
oper
P
Supply voltage
CC
Input voltage
in
Operating free air temperature range-40 to + 85°C
Storage temperature-65 to +150°C
stg
T
Maximum junction temperature150°C
j
Thermal resistance junction to ambient
thja
Power dissipationInternally limited
d
HBM: human body model
ESD
MM: machine model
Latch-up Latch-up immunity200mA
V
STBY
Standby pin maximum voltage
Lead temperature (soldering, 10sec)260°C
Output short circuit protection
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed VCC + 0.3V / GND - 0.3V.
3. The device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period will cause abnormal operation.
5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
7. Implemented short-circuit protection protects the amplifier against damage by short-circuit between
positive and negative outputs of each channel and between outputs and ground.
3/31
Absolute maximum ratings and operating conditionsTS2012FC
Table 2.Operating conditions
SymbolParameterValueUnit
V
CC
V
V
V
STBY
R
V
V
R
thja
1. I Voo I ≤ 40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling capacitors are
mandatory.
2. Without any signal on standby pin, the device is in standby (internal 300 kΩ +/-20% pull-down resistor).
3. Minimum current consumption is obtained when V
4. Between G0, G1pins and GND, there is an internal 300 kΩ (+/-20%) pull-down resistor. When pins are
floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
5. With a 4-layer PCB.
Supply voltage2.5 to 5.5V
Input voltage rangeGND to V
in
(2)
(3)
(1)
(4)
STBY
(5)
= GND.
GND+0.5V to VCC-0.9VV
1.4 ≤ V
GND
≤ V
STBY
STBY
1.4 ≤ VIH ≤ VCC
≤ VIL ≤ 0.4
GND
90°C/W
Input common mode volt a ge
ic
Standby voltage input
Device ON
Device in STANDBY
Load resistor≥ 4Ω
L
GO, G1 - high level input voltage
IH
GO, G1 - low level input voltage
IL
Thermal resistance junction to ambient
CC
≤ VCC
≤ 0.4
V
V
V
V
4/31
TS2012FCTypical application
2 Typical application
Figure 1.Typical application schematics
Differential
Left Input
Left IN +
Left IN -
Differential
Rig ht In pu t
Right IN+
Right IN-
Differential
Left Input
Left IN +
Left IN -
Input cap a c itors
are optional
Cin
Cin
Cin
Cin
Input cap a c itors
are optional
Cin
Cin
Gain Select
Control
TS2012
Lin+
A1
Lin-
B1
G0
C2
G1
B2
Rin+
D1
Rin-
C1
STBYL
B4
STBYR
B3
Standby Control
Gain Select
Control
TS2012
Lin+
A1
Lin-
B1
Gain
Select
Gain
Select
Gain
Select
Standby
Control
D2
AVCC
C3
D2
AVCC
PWM
Oscillator
PWM
Protection
Circ uit
PWM
Cs2
0.1uF
Cs2
0.1uF
PVCC
H
Bridge
H
Bridge
PGNDAGND
PVCC
H
Bridge
VCC
VCC
Cs1
1uF
A2
Lout+
A3
LC Output Filter
Left speak er
Righ t sp eake r
Load
A4
Lout-
Rout+
D3
Rout-
D4
C4
Cs1
1uF
A2
Lout+
A3
A4
Lout-
Differential
Rig ht In pu t
Right IN+
Right IN-
G0
C2
C3
Oscillator
PWM
Protection
Circ uit
H
Bridge
PGNDAGND
Rout+
Rout-
C4
D3
D4
Ω
4 LC Ou tp ut Fi l ter
μ
15 H
μ
2 F
μ
2 F
μ
15 H
LC Output FilterLoad
Ω
8 LC Outpu t F ilter
μ
30 H
μ
1 F
μ
1 F
μ
30 H
G1
B2
Rin+
D1
Cin
Cin
C1
B4
B3
Gain
Select
Rin-
STBYL
STBYR
Standby Control
Standby
Control
5/31
Typical applicationTS2012FC
Table 3.External component descriptions
ComponentsFunctional description
C
, C
S1
C
in
Table 4.Pin descriptions
Pin numberPin namePin description
A1Lin+Left channel positive differential input
A2PVCCPower supply voltage
A3Lout+Left channel positive output
A4Lout-Left channel negative output
B1Lin-Left channel negative differential input
B2G1Gain select pin (MSB)
B3STBYRStandby pin (active low) for right channel output
B4STBYLStandby pin (active low) for left channel output
C1Rin-Right channel negative differential input
C2G0Gain select pin (LSB)
Supply capacitor that provides power supply filtering.
S2
Input coupling capacitors (optional) that block the DC voltage at the amplifier input
terminal. The capacitors also form a high pass filter with Zin
= 1 / (2 x π x Zin x Cin)). Be aware that value of Z
(F
cl
is changing with gain setting.
in
C3AGNDAnalog ground
C4PGNDPower ground
D1Rin+Right channel positive differential input
D2AVCCAnalog supply voltage
D3Rout+Righ t chan nel positive output
D4Rout-Right channel negative output
6/31
TS2012FCElectrical characteristics
3 Electrical characteristics
3.1 Electrical characteristics tables
Table 5.VCC = +5V, GND = 0V, Vic=2.5V, T
= 25°C (unless otherwise specified)
amb
SymbolParameters and test conditionsMin.Typ.Max.Unit
I
CC
I
STBY
V
oo
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
57mA
12µA
25mV
Output power
P
o
THD + N
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, R
= 8Ω
L
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, R
Total harmonic distortion + noise
= 0.8W, G = 6dB, f =1kHz, RL = 8Ω
P
o
= 8Ω
L
1.85
1.15
2.5
1.6
0.5%
Efficiency per channel
Efficiency
= 1.85W, RL = 4Ω +15µH
P
o
Po = 1.16 W, RL = 8Ω+15µH
78
88
Power supply rejection ratio with inputs grounded
PSRR
Crosstalk
C
V
Channel separation
P
o
(1)
=1µF
in
ripple
,f = 217Hz, RL = 8Ω, Gain=6dB,
= 200mV
pp
= 0.9W, G = 6dB, f =1kHz, RL = 8Ω
65dB
90dB
Common mode rejection ratio
CMRR
C
=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
in
= 200mV
Δ
VICM
pp
63dB
Gain value with no load
Gain
G1 = G0 = V
IL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = V
IL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
12
18
24
6
6.5
12.5
18.5
24.5
W
%
dB
Single-ended input impedance
Referred to ground
Z
in
Gain = 6dB
Gain = 12dB
Gain = 18dB
Gain = 24dB
F
Pulse width modulator base frequency190280370kHz
PWM
SNR
Signal to noise ratio (A-weighting)
P
= 1.1W, G = 6dB, RL = 8Ω
o
24
24
12
30
30
15
6
7.5
36
36
18
99dB
7/31
kΩ
9
Electrical characteristicsTS2012FC
Table 5.VCC = +5V, GND = 0V, Vic=2.5V, T
= 25°C (unless otherwise specified) (continued)
amb
SymbolParameters and test conditionsMin.Typ.Max.Unit
(2)
(2)
91316.5ms
1115.820ms
t
WU
t
STBY
Total wake-up time
Standby time
Output voltage noise f = 20Hz to 20kHz, RL=8Ω