4 x 50W/4Ω Max.
4 x 30W/4Ω @ 14.4V, 1KHz, 10%
4 x 80W/2Ω Max.
4 x 55W/2Ω @ 14.4V, 1KHz, 10%
■ MOSFET Output power stage
■ Excellent 2Ω driving capability
■ HI-FI class distortion
■ Low output noise
■ ST-BY Function
■ Mute function
■ Automute at min. supply voltage detection
■ Low external component count:
– Internally fixed gain (26dB)
– No external compensation
– No bootstrap capacitors
■ On board 0.35A high side driver
Protections:
■ Output short circuit to GND, to V
load
■ Very inductive loads
■ Overrating chip temperature with soft thermal
limiter
■ Output DC offset detection
■ Load dump voltage
■ Fortuitous open GND
■ Reversed battery
■ ESD
, across the
s
TDA7850
4 x 50W MOSFET
Flexiwatt25
(Vertical)
Flexiwatt25
(Horizontal)
Description
The TDA7850 is a breakthrough MOSFET
technology class AB audio power amplifier in
Flexiwatt 25 package designed for high power car
radio. The fully complementary P-Channel/NChannel output structure allows a rail to rail
output voltage swing, which, combined with high
output current and minimised saturation losses,
sets new power references in the car-radio field,
with unparalleled distortion performances.
(Refer to the test and application diagram, VS = 13.2V; RL = 4Ω; Rg = 600Ω; f = 1KHz; T
25°C; unless otherwise specified).
SymbolParameterTest conditionMin. Typ.Max.Unit
I
Quiescent currentRL = ∞100180280mA
q1
V
dV
Output offset voltagePlay Mode±60mV
OS
During mute ON/OFF output offset
voltage
OS
During St-By ON/OFF output offset
voltage
±60mV
±60mV
A
A
amb
=
Voltage gain252627dB
G
v
dG
Channel gain unbalance±1dB
v
= 13.2V; THD = 10%
V
S
= 13.2V; THD = 1%
V
S
= 14.4V; THD = 10%
V
S
VS = 14.4V; THD = 1%
Output power
P
o
= 13.2V; THD = 10%, 2Ω
V
S
VS = 13.2V; THD = 1%, 2Ω
= 14.4V; THD = 10%, 2Ω
V
S
= 14.4V; THD = 1%, 2Ω
V
S
P
o max.
Max. output power
(1)
VS = 14.4V; RL = 4Ω
= 14.4V; RL = 2Ω
V
S
6/14
23
16
28
20
42
32
50
40
25
19
30
23
45
34
55
43
50
80
W
W
W
W
W
W
W
W
W
W
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TDA7850Electrical specifications
Table 3.
Electrical characteristcs
(continued)
(Refer to the test and application diagram, VS = 13.2V; RL = 4Ω; Rg = 600Ω; f = 1KHz; T
25°C; unless otherwise specified).
SymbolParameterTest conditionMin. Typ.Max.Unit
P
= 4W
THDDistortion
e
Output noise
No
o
= 15W; RL = 2Ω
P
o
"A" Weighted
Bw = 20Hz to 20KHz
SVRSupply voltage rejectionf = 100Hz; V
f
High cut-off frequencyPO = 0.5W100300KHz
ch
Input impedance80100120KΩ
R
i
f = 1KHz P
f = 10KHz P
V
y = 1.5V20μA
St-B
V
y = 010μA
St-B
= 1.5V to 3.5V±10μA
St-By
= 4W8090dB
Oref
I
I
pin5
V
SB out
V
SB in
A
V
M out
V
C
Cross talk
T
St-By Current consumption
SB
St-by pin currentV
St-By Out threshold voltage(Amp: ON)3.5V
St-By in threshold voltage(Amp: OFF)1.5V
Mute attenuationP
M
Mute out threshold voltage(Amp: Play)3.5V
Mute in threshold voltage(Amp: Mute)1.5V
M in
(Amp: Mute)
V
AM in
VS automute threshold
Att ≥ 80dB; P
(Amp: Play)
Att < 0.1dB; P
V
I
pin23
Muting pin current
V
MUTE
MUTE
HSD section
= 1Vrms5070dB
r
= 4W
O
= 4W
O
= 4W
Oref
= 0.5W
O
= 1.5V (Sourced current)71218μA
= 3.5V-518μA
60
6.5
0.006
0.015
35
50
70
60
7
7.58
0.05
0.07%%
5070μV
-
-
amb
μV
dB
dB
=
V
V
V
dropout
I
Dropout VoltageIO = 0.35A; VS = 9 to 16V0.250.6V
Current Limits400800mA
prot
Offset detector (Pin 25)
V
M_ON
V
M_OFF
V
V
V
1. Saturated square wave output.
Mute voltage for DC offset detection
enabled
Detected differential output offsetV
OFF
Pin 25 Voltage for detection = TRUE
25_T
Pin 25 Voltage for detection = FALSE
25_F
V
= 5V
stby
V
V
V
V
stby
stby
OFF
stby
OFF
= 5V; V
= 5V; V
> ±4V
= 5V; V
> ±2V
= 8V±2±3±4V
mute
= 8V
mute
mute
= 8V
01.5V
12V
7/14
8V
6V
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Electrical specificationsTDA7850
Figure 3.Standard test and application circuit
ST-BY
MUTE
IN1
IN2
IN3
IN4
R1
10K
R2
47K
C1
0.1μF
C2 0.1μF
C3 0.1μF
C4 0.1μF
C9
1μF
C10
1μF
S-GND
C8
0.1μF
4
22
11
12
15
14
13
1610251
C5
0.47μF
C7
2200μF
Vcc1-2
SVRTAB
C6
47μF
Vcc3-4
620
17
18
19
21
24
23
HSD
9
8
7
5
2
3
D95AU335B
OUT1
OUT2
OUT3
OUT4
8/14
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TDA7850Electrical specifications
Figure 4.P.C.B. and component layout of the Figure 3..
Components &
top copper layer
Bottom copper layer
9/14
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Application hints (ref. to the circuit of Figure 3)TDA7850
3 Application hints (ref. to the circuit of Figure 3)
3.1 SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF
time sequence and, consequently, plays an essential role in the pop optimization during
ON/OFF transients. To conveniently serve both needs, Its minimum recommended value
is 10μF.
3.2 Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals (±
8Vpk) without any performance degradation.
If the standard value for the input capacitors (0.1μF) is adopted, the low frequency cut-off
will amount to 16 Hz.
3.3 Stand-by and muting
STAND-BY and MUTING facilities are both CMOS compatible. In absence of true CMOS
ports or microprocessors, a direct connection to Vs of these two pins is admissible but a 470
kOhm equivalent resistance should be present between the power supply and the muting
and stand-by pins.
R-C cells have always to be used in order to smooth down the transitions for preventing any
audible transient noises.
About the stand-by, the time constant to be assigned in order to obtain a virtually pop-free
transition has to be slower than 2.5V/ms.
3.4 DC offset detector
The TDA7850 integrates a DC offset detector to avoid an anomalous DC offset on the inputs
of the amplifier which may be multiplied by the gain, and result in a dangerous large offset
on the outputs, which may lead to speaker damage through overheating.
The feature is enabled by the MUTE pin and works with the amplifier unmuted and with no
signal on the inputs. The DC offset detection is signaled out on the HSD pin.
3.5 Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be
deduced from fig. 18, which reports the simulated power dissipation when real
music/speech programmes are played out. Noise with gaussian-distributed amplitude was
employed for this simulation. Based on that, frequent clipping occurence (worst-case) will
cause Pdiss = 26W. Assuming T
heatsink's thermal resistance should be approximately 2°C/W. This would avoid any thermal
shutdown occurence even after long-term and full-volume operation.
10/14
= 70°C and T
amb
= 150°C as boundary conditions, the
CHIP
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TDA7850Package Information
4 Package Information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 5.Flexiwatt25 (vertical) mechanical data & package dimensions
(1): dam-bar protusion not included; (2): molding protus ion included
mminch
MIN. TYP. MAX . MIN. TYP. MAX.
OUTLINE AND
MECHANICAL DATA
Flexiwatt25
(Horizontal)
12/14
7399733 A
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TDA7850Revision history
5 Revision history
Table 4.Revision History
DateRevisionDescription of Changes
22-Nov-20061First issue
13/14
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TDA7850
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