Datasheet TDA7563 Datasheet (SGS Thomson Microelectronics)

TDA7563

MULTIFUNCTION QUAD POWER AMPLIFIER

WITH BUILT-IN DIAGNOSTICS FEATURES

■ DMOS POWER OUTPUT

■ NON-SWITCHING HI-EFFICIENCY

■ HIGH OUTPUT POWER CAPABILITY 4x28W/

4Ω @ 14.4V, 1KHZ, 10% THD, 4x40W EIAJ

■ MAX. OUTPUT POWER 4x72W/2Ω

■ FULL I

2

C BUS DRIVING:
–ST-BY
– INDEPENDENT FRONT/REAR SOFT PLAY/

MUTE
– SELECTABLE GAIN 30dB
– 16dB (FOR LOW NOISE LINE OUTPUT

FUNCTION)
– HIGH EFFICIENCY ENABLE/DISABLE

2

–I

C BUS DIGITAL DIAGNOSTICS

■ FULL FAULT PROTECTION

■ DC OFFSET DETECTION

■ FOUR INDEPENDENT SHORT CIRCUIT

PROTECTION

■ CLIPPING DETECTOR PIN WITH

SELECTABLE THRESHOLD (2%/10%)

■ ST-BY/MUTE PIN

■ LINEAR THERMAL SHUTDOWN

■ ESD PROTECTION

MULTIPOWER BCD TECHNOLOGY
MOSFET OUTPUT POWER STAGE

FLEXIWATT27

ORDERING NUMBER: TDA7563

DESCRIPTION

The TDA7563 is a new BCD technology Quad
Bridge type of car radio amplifier in Flexiwatt27
package specially intended for car radio applica­tions. Thanks to the DMOS output stage the
TDA7563 has a very low distortion allowing a clear
powerful sound. Among the features, its superior
efficienc y perform ance com ing from the i nternal ex ­clusive structure, makes it the m os t s ui t abl e device
to simplify the thermal management in high power
sets.The dissipated output power under average
listening condition is in fact reduced up to 50%
when compared to the level provided by conven­tional class AB solutions.This device is equipped
with a full diagnostics array that communicates the
status of each speaker through the I

2

C bus.

BLOCK DIAGRAM

ST-BY/MUTE

May 2003

IN RF

IN RR

IN LF

IN LR

SVR

CLK

DATA

VCC1 VCC2

Thermal

I2CBUS

Mute1 Mute2

F

R

F

R

AC_GND

16/30dB

16/30dB

16/30dB

16/30dB

RF

RR

PW_GND

Protection
& Dump

LF LR

Reference

Short Circuit
Protection &
Diagnostic

Short Circuit
Protection &
Diagnostic

Short Circ uit
Protection &
Diagnostic

Short Circuit
Protection &
Diagnostic

TAB

Clip
Detector

CD_OUT

OUT RF+

OUT RF­OUT RR+

OUT RR-

OUT LF+

OUT LF­OUT LR+

OUT LR-

S_GND

1/20

TDA7563

0

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

op

V

V

peak

V

CK

V

DATA

I

O

I

O

P

tot

T

stg

THERMAL DATA

Symbol Parameter Value Unit

R

th j-case

Operating Supply Voltage 18 V
DC Supply Voltage 28 V

S

Peak Supply Voltage (for t = 50ms) 50 V
CK pin Voltage 6 V
Data Pin Voltage 6 V
Output Peak Current (not repetitive t = 100ms) 8 A
Output Peak Current (repetitive f > 10Hz) 6 A
Power Dissipation T

= 70°C 85 W

case

, TjStorage and Junction Temperature -55 to 150 °C

Thermal Resistance Junction to case

Max.

1 °C/W

PIN CONNECTION

(Top view)

27
26
25
24
23

22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6

5
4
3
2
1

TAB
DATA
PW_GND RR
OUT RR­CK
OUT RR+
V

CC2

OUT RF­PW_GND RF
OUT RF+
AC GND
IN RF
IN RR
S_GND
IN LR
IN LF
SVR
OUT LF+
PW_GND LF
OUT LF­V

CC1

OUT LR+
CD-OUT
OUT LR­PW_GND LR
STBY
TAB

D00AU123

2/20

Figure 1. Application Circuit

TDA7563

V(4V .. V

I2C BUS

IN RF

IN RR

IN LF

IN LR

)

CC

DATA

CLK

C1 0.22µF

C2 0.22µF

C3 0.22µF

C4 0.22µF

C8

0.1µF

S-GND

C7

3300µF

2

26

23

16

15

12

13

14

C5

1µF

Vcc1 Vcc2

17 11 5

C6

10µF

721

18
19
20

22
25
24

10

9
8

6
3
4

1, 27

47K

CD OUT

+

­+

­+

­+

­TAB

OUT RF

OUT RR

OUT LF

OUT LR

V

D00AU1231A

3/20

TDA7563

ELECTRICAL CHARACTERISTICS

(Refer to the test circuit, V

= 14.4V; RL = 4Ω; f = 1KHz; GV = 30dB; T

S

= 25°C; unless otherwise specified.)

amb

Symbol Parameter Test Condition Min. Typ. Max. Unit

POWER AMPLIFIER

V

P

THD Total Harmonic Distortion P

Supply Voltage Range 8 18 V

S

Total Quiescent Drain Current 170 300 mA

I

d

Output Power EIAJ (VS = 13.7V) 35 40 W

O

THD = 10%
THD = 1%

= 2Ω; EIAJ (VS = 13.7V)

R

L

RL = 2Ω; THD 10%
R

= 2Ω; THD 1%

L

RL = 2Ω; MAX POWER

= 1W to 10W; STD MODE

O

HE MODE; PO = 1.5W
HE MODE; PO = 8W

= 1-10W, f = 10kHz 0.2 0.5 %

P

O

= 16dB; STD Mode

G

V

25 28

22

55
40

62
46
35
72

0.03

0.02

0.15

0.02 0.05 %

0.1

0.1

0.5

VO = 0.1 to 5VRMS

C

R

G

∆G

G

∆G

E
E

Cross Talk f = 1KHz to 10KHz, Rg = 600Ω 50 60 dB

T

Input Impedance 60 100 130 KΩ

IN

Voltage Gain 1 29.5 30 30.5 dB

V1

Voltage Gain Match 1 -1 1 dB

V1

Voltage Gain 2 15.5 16 16.5 dB

V2

Voltage Gain Match 2 -1 1 dB

V2

Output Noise Voltage 1 Rg = 600Ω 20Hz to 22kHz 50 100 mV

IN1

Output Noise Voltage 2 Rg = 600Ω; GV = 16dB

IN2

15 30 mV

20Hz to 22kHz

SVR Supply Voltage Rejection f = 100Hz to 10kHz; V

R

= 600Ω

g

= 1Vpk;

r

50 60 dB

BW Power Bandwidth 100 KHz
A

I

A
V
V
T

T
V

V
V

I

CD
CD
CD

Stand-by Attenuation 90 110 dB

SB

Stand-by Current 2 20 µ A

SB

Mute Attenuation 80 100 dB

M

Offset Voltage Mute & Play -100 0 100 mV

OS

Min. Supply Mute Threshold 7 7.5 8 V

AM

Turn ON Delay D2/D1 (IB1) 0 to 1 5 20 ms

ON

Turn OFF Delay D2/D1 (IB1) 1 to 0 5 20 ms

OFF

St-By/Mute pin for St-By 0 1.5 V

SBY

St-By/Mute pin for Mute 3.5 5 V

MU

St-By/Mute pin for Operating 7 V

OP

St-By/Mute pin Curren t V

MU

Clip Det High Leakage Current CD off 0 15 µA

LK

Clip Det Sat. Voltage CD on; ICD = 1mA 300 mV

SAT

Clip Det THD level D0 (IB1) = 1 5 10 15 %

THD

STBY/MUTE

V

STBY/MUTE

= 8.5V 20 4 0 µA
< 1.5V 0 10 µ A

S

W
W

W
W
W
W

%
%
%

V

4/20

TDA7563

ELECTRICAL CHARACTERISTICS

(Refer to the test circuit, V

= 14.4V; RL = 4Ω; f = 1KHz; GV = 30dB; T

S

(continued)

= 25°C; unless otherwise specified.)

amb

Symbol Parameter Test Condition Min. Typ. Max. Unit

D0 (IB1) = 0 1 2 3 %

TURN ON DIAGNOSTICS 1 (Power Amplifier Mode)

Pgnd Short to GND det. (below this

Power Amplifier in st-by 1.2 V
limit, the Output is considered in
Short Circuit to GND)

Pvs Short to Vs det. (above this limit,

Vs -1.2 V
the Output isconsidered in Short
Circuit to VS)

Pnop Normal operation

1.8 Vs -1.8 V
thresholds.(Within these limits,
the Output is considered without
faults).

Lsc Shorted Load det. 0.5 Ω
Lop O pen Load det. 130 Ω

Lnop Normal Load det. 1.5 70 Ω

TURN ON DIAGNOSTICS 2 (Line Driver Mode)

Pgnd Short to GND det. (below this

Power Amplifier in st-by 1.2 V
limit, the Output is considered in
Short Circuit to GND)

Pvs Short to Vs det. (above this limit,

Vs -1.2 V
the Output isconsidered in Short
Circuit to VS)

Pnop Normal operation

1.8 Vs -1.8 V
thresholds.(Within these limits,
the Output is considered without
faults).

Lsc Shorted Load det. 1.5 Ω
Lop O pen Load det. 400 Ω

Lnop Normal Load det. 4.5 200 Ω

PERMANENT DIAGNOSTICS 2 (Power Amplifier Mode or Line Driver Mode)

Pgnd Short to GND det. (below this

limit, the Output is considered in
Short Circuit to GND)

Pvs Short to Vs det. (above this limit,

Power Amplifier in Mute or Play,
one or more short circuits
protection activated

1.2 V

Vs -1.2 V
the Output is considered in Short
Circuit to VS)

Pnop Normal operation thresholds.

1.8 Vs -1.8 V
(Within these limits, the Output is
considered witho ut faults).

L

Shorted Load Det. Pow. Amp. mode 0.5 Ω

SC

Line Driver mode 1.5 Ω

V

Offset Detection Power Amplifier in play,

O

±1.5 ±2 ±2.5 V

AC Input signals = 0

I2C BUS INTERFACE

S

V

V

Clock Frequency 400 KHz

CL

Input Low Voltage 1.5 V

IL

Input High Voltage 2.3 V

IH

5/20

TDA7563

)

(V)

(W)

(W)

(W)

Figure 2. Quiescent Current vs. Supply Voltage

Id (mA)

250
230
210
190
170
150
130
110

90
70

Vin = 0
NO LOADS

8 1012141618

Vs (V)

Figure 3. Output Power vs. Supply Voltage (4Ω)

Po (W)

70
65
60
55
50
45
40
35
30
25
20
15
10

5

RL = 4 Ohm
f = 1 KHz

8 9 10 11 12 13 14 15 16 17 18

Vs (V

Po-max

THD = 10 %

THD = 1 %

Figure 5.

10

1

0.1

0.01

0.1 1 10

Figure 6.

10

1

0.1

0.01

0.001

Distortion vs. Output Power (4Ω, STD)

THD (%)

STANDARD MODE
Vs = 14.4 V
RL = 4 Ohm

f = 10 KHz

f = 1 KHz

Po

Distortion vs. Output Power (4Ω, HI-EFF)

THD (%)

HI-EFF MODE
Vs = 14.4 V
RL = 4 Ohm

f = 10 KHz

f = 1 KHz

0.1 1 10
Po

Figure 4. Output Power vs. Supply Voltage (2Ω)

Po (W)

100

90
80
70
60
50
40
30
20
10

RL = 2 Ohm
f = 1 KHz

8 9 10 11 12 13 14 15 16

Vs

6/20

Po-max

THD = 10 %

THD = 1 %

Figure 7.

10

1

0.1

0.01

0.1 1 10

Distortion vs. Output Power (2Ω, STD)

THD (%)

HI-EFF MODE
Vs = 14.4 V
RL = 2 Ohm

f = 10 KHz

f = 1 KHz

Po

TDA7563

(Hz)

(Hz)

(Hz)

(Hz)

(W)

)

Figure 8. Distortion vs. Frequency (4Ω)

THD (%)

10

STANDARD MODE
Vs = 14.4 V

1

RL = 4 Ohm
Po = 4 W

0.1

0.01
10 100 1000 10000

f

Figure 9. Distortion vs. Frequency (2Ω)

THD (%)

10

STANDARD MODE
Vs = 14.4 V
RL = 2 Ohm

1

Po = 4 W

0.1

0.01
10 100 1000 10000

f

Figure 11. Supply Voltage Rejection vs. Freq.

SVR (dB)

90

80

70

60

50

40

30

20

STD & HE MODE
Rg = 600 Ohm
Vripple = 1 Vpk

10 100 1000 10000

f

Figure 12. Power Dissipation & Efficiency vs.

Output Power (4Ω, STD, SINE)

Ptot (W)

90

STANDARD MODE

80

Vs = 14.4 V
RL = 4 x 4 Ohm

70

f = 1 KHz SINE

60
50
40
30
20
10

0

024681012141618202224262830

Po

n (%)

n

Ptot

90
80
70
60
50
40
30
20
10
0

Figure 10. Crosstalk vs. Frequency

CROSSTALK (dB)

90

80

70

60

STANDARD MODE

50

RL = 4 Ohm
Po = 4 W

40

Rg = 600 Ohm

30

20

10 100 1000 10000

f

Figure 13. Power Dissipation & Efficiency vs.

Output Power (4W, HI-EFF, SINE)

Ptot (W)

90
80
70
60
50
40
30
20
10

0

0.1 1 10

HI-EFF MODE
Vs = 14.4 V
RL = 4 x 4 Ohm
f = 1 KHz SINE

Po (W

n (%)

n

Ptot

7/20

90
80
70
60
50
40
30
20
10
0

TDA7563

(W)

(W)

Figure 14. Power Dissipation vs. Average

Ouput Pow er (A udi o P rogram
Simu la tion , 4 Ω )

Ptot (W)

45
40

Vs = 14 V
RL = 4 x 4 Ohm

35

GAUSSIAN NOISE

30
25
20
15
10

5
0

012345

Po

CLIP

START

STD MODE

HI-EFF MODE

Figure 15. Power Dissipation vs. Average

Ouput Power (Au dio Pr og ram
Simulati on, 2Ω )

Ptot (W)

90
80
70

Vs = 14 V
RL = 4 x 2 Ohm

60

GAUSSIAN NOISE

50
40
30
20
10

0

0123456789

Po

CLIP

START

STD MODE

HI-EFF MODE

DIAGNOSTICS FUNCTIONAL DESCRIPTION:

TURN-ON DIAGNOSTIC

a)

It is activated at the turn-on (stand-by out) under I2Cbus request. Detectable output faults are:
– SHORT TO GND

– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
– OPEN SPEAKER

To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. 16) is inter­nally generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored
until a successive diagnostic pulse is requested (after a I2C reading).

If the "stand-by ou t" and "diag. ena ble" c ommands ar e both given through a singl e progr amming step, the pul se
takes place first (power stage still in stand-by mode, low, outputs= high impedance).

Afterwards, when the Amplifier i s bi ased, the P ERMANENT diagnostic takes plac e. The prev ious Turn On state
is kept until a short appears at the outputs.

Figure 16. Turn - On di agnostic: working principle

Vs~5V

Isource

I (mA)

Isource

Isink

CH+

CH-

Isink

8/20

~100mS

Measure time

t (ms)

TDA7563

Fig. 17 and 18 show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON
DIAGNOS TIC.

Figure 17. SVR and Output behaviour (CASE 1: without turn-on diagnostic)

Vsvr
Out

Permanent diagnostic

acquisition time (100 mS Typ)

Bias (power amp turn-on)

Diagnostic Enable

(Permanent)

FAULT

event

I2CB DATA

Permanent Diagnostics data (output)

permitted tim e

Figure 18. SVR and Output pin behaviour (CASE 2: with turn-on diagnostic)

Vsvr
Out

Diagnost i c E n able

(Turn-on)

Turn-on diagnostic

acquisition time (100mS Typ)

Turn-on Diagnostics data (output)

Bias (power amp turn-on)

permitted time

permitted time

Read Data

Diagnostic Enable

(Permanent)

Permanent Diagnostics data (output)

Permanent diagnostic
acquisition time (100mS Typ)

t

Read Data

t

FAULT

event

permitted time

I2CB DATA

9/20

TDA7563

The information related to the outputs status is read and memorized at the end of the current pulse top. The
acquisition time is 100 ms (typ.). No audibl e noise is gener ated in the process . As for SHORT TO GND / Vs the
fault-detection thresholds remain unchanged from 30 dB to 16 dB gain setting. They are as follows:

S.C. to GND x S.C. to Vs

0V 1.8V VS-1.8V V

1.2V VS-1.2V

xNormal Operation

D01AU1253

S

Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 30 dB to 16 dB
gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The
values in case of 30 dB gain are as follows:

S.C. across Load x Open Load

0V 1.5Ω 70Ω Infinite

0.5Ω

xNormal Operation

130Ω

D01AU1254

If the Line-Driver mode (Gv= 16 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will
change as follows:

S.C. across Load x Open Load

xNormal Operation

0Ω 4.5Ω 200Ω infinite

1.5Ω 400Ω

D01AU1252

b) PERMANENT DIAGNOSTICS.

Detectable conventional faults are:
– SHORT TO GND

– SHORT TO Vs
– SHORT ACROSS THE SPEAKER

The following additional features are provided:
– OUTPUT OFFSET DETECTION

The TDA7563 has 2 operating statuses:
1 RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each

other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output
status is made every 1 ms (fig. 19). Restart takes place when the overload is removed.

2

2 DIAGNOSTIC mod e. It is enabled via I

C bus and self activates if an output overload (such to cause
the intervention of the short-circuit protection) oc curs to the s peakers out put s . Once act ivated, the di­agnostics procedure develops as follows (fig. 20):

10/20

TDA7563

– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output sta-

tus is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and
the channel returns back active.

– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration

of about 100 ms is started.

– After a diagnostic cycle, the audi o c hannel interes ted by the fault i s switched t o RES TAR T mod e. The

relevant data are stored inside the device and can be read by the microprocessor. When one cycle has
terminated, the next one is activated by an I
throughout the car-radio operating time.

– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor

level (over half a second is recommended).

Figure 19. Restart timing without Diagnostic Enable (Permanent) - Each 1mS time, a sampling of

the fault is done

1-2mS

1mS 1mS 1mS

2

C reading. This is to ensure continuous diagnostics

Out

1mS

Overcurrent and short

circuit protection intervention

(i.e. short circuit to GND)

Short circuit removed

t

Figure 20. Restart timing with Diagnostic Enable (Permanent)

1-2mS 100/200mS 1mS1mS

t

Over cu rr en t an d short

circuit protection intervention

(i.e. short circuit to GND)

Short circuit removed

OUTPUT DC OFFSET DETECTION

Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a consequence of
initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the
speakers at risk of overheating.

This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):

– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1

11/20

TDA7563

– STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any

overloads leading to activation of the short-circuit protection occurs in the process.

MULTIPLE FAULTS

When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one
of them is initially read out. The others are notified after successive cycles of I
provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent).

The table below shows all the coupl es of double-fault po ssible. It sh ould be taken int o account that a short ci rcuit
with the 4 ohm speaker unconnected is considered as double fault.

Double fault table for Turn On Diagnostic

S. GND (so) S. GND (sk) S. Vs S. Across L. Open L.

S. GND (so) S. GND S. GND S. Vs + S. GND S. GND S. GND
S. GND (sk) / S. GND S. Vs S. GND Open L. (*)

S. Vs / / S. Vs S. Vs S. Vs

S. Across L. / / / S. Across L. N.A.

Open L. / / / / Open L. (*)

2

C reading and faults removal,

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted
to ground (test-curr ent source s ide= so, tes t-cur rent sink s ide = sk ). More precisel y, in C hannels LF and RR, so
= CH+, sk = CH-; in Channels LR and RF, so = CH-, sk = CH+ .

In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not
among the recognisable faults. Should an Open Load be present during the device's normal working, it would
be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).

FAULTS AVAILABILITY

All the resul ts c oming from I2Cbus, by read operati ons, are the cons equence of measurements insi de a defined
period of time. If the fault is stable throughout the whole period, it will be sent out.

To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be
reactivate after any I
but the read data will come from the previ ous diag. cycle (i.e . The device is in Turn On state , with a short to Gnd,
then the short is removed and micro reads I
of the previous cycle. If another I
observe a change in Diagnostic bytes, two I

2

C reading operation. So, when the micro reads the I2C, a new cycle will be able to start,

2

2

C reading operation occurs, the bytes do not show the short). In general to

C. The short to Gnd is still present in bytes, because it is the result

2

C reading operations are necessary.

THERMAL PROTECTION

Thermal protection is implemented through thermal foldback (fig. 21). Thermal foldback begins li miting the audio
input to the amplifier stage as the junc tion temperatures r ise abo ve the normal operating r ange. This effectivel y
limits the output power capability of the device thus reduci ng the temperature to acc eptable levels without totall y
interrupting the operation of the device. The output power will decrease to the point at which ther mal equilibrium
is reached. Thermal equili brium will be reached when the reducti on in output power reduce s the dissipated pow­er such that the die temperature falls below the thermal foldback threshold. Should the device cool, the audio
level will increase until a new thermal equilibrium is reached or the amplifier reaches full power. Thermal fold­back will reduce the audio output level in a linear manner.

12/20

Figure 21. Thermal Foldback Diagra m

TDA7563

Vout

Vout

CD out

TH. WARN.

SD

< T

ON

TH. SH.
START

> TSD (with same input

signal)

TH. SH.

END

Tj (°C)

Tj (°C)

Tj ( °C)

I2C PROGRAMMING/READING SEQUENCES

A correct turn on/off sequenc e respectful of the di agnostic timings and pr oducing no audible noises could be as
follows (after battery connection):

TURN-ON: PIN2 > 7V --- 10ms --- (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING O UT
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) --- 10ms --- PIN2 = 0
Car Radio Installation: PIN2 > 7V --- 10ms DIAG ENABLE (write) --- 200 ms --- I

2

C read (repeat until All faults

disappear).
OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I

2

C reading (repeat I2C reading until

high-offset message disappears).

13/20

TDA7563

I2C BUS INTERFACE

Data transmis sion f rom microp rocesso r to the TDA7563 and vi ceve rsa take s place thr ough the 2 wi res I2C BUS inter­face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).

Data Validity

As shown by fig. 22, the data on the SDA line must be s table during the hig h period of the cloc k. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.

Start and Stop Conditions

As shown by fig. 23 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.

Byte Format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.

Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 24).
The receiver** the acknowledges has to pull -down (LOW) the SDA line during the acknowle dge clock pul se, so
that the SDAline is stable LOW during this clock pulse.

* Transmitter

–master (µP) when it writes an address to the TDA7563
– slave (TDA7563) when the µP reads a data byte from TDA7563

** Receiv er

– slave (TDA7563) when the µP writes an address to the TDA7563
–master (µP) when it reads a data byte from TDA7563

Figure 22. Data Validity on the I2CBUS

SDA

SCL

DATA LINE

STABLE, DATA

VALID

1

MSB

2

2

CBUS

CBUS

Figure 23. Timing Diagram on the I

SCL

SDA

START

Figure 24. Acknowledge on the I

SCL

SDA

START

CHANGE

DATA

ALLOWED

D99AU1032

23789

D99AU1033

D99AU1031

2

I

CBUS

STOP

ACKNOWLEDGMENT

FROM RECEIVER

14/20

SOFTWARE SPECIFICATIONS

All the functions of the TDA7563 are activated by I2C interface.

µ

The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from
instruction (from TDA7563 to

µ

P).

P to TDA7563) or read

Chip Address:

D7 D0

1101100XD8 Hex

X = 0 Write to device
X = 1 Read from device

If R/W = 0, the

µ

P sends 2 "Instruction Bytes": IB1 and IB2.

IB1

D7 X

D6 Diagnostic enable (D6 = 1)

Diagnostic defeat (D6 = 0)

D5 Offset Detection enable (D5 = 1)

Offset Detection defeat (D5 = 0)

TDA7563

D4 Front Channel

D3 Rear Channel

D2 Mute front channels (D2 = 0)

D1 Mute rear channels (D1 = 0)

D0 CD 2% (D0 = 0)

Gain = 30dB (D4 = 0)
Gain = 16dB (D4 = 1)

Gain = 30dB (D3 = 0)
Gain = 16dB (D3 = 1)

Unmute front channels (D2 = 1)

Unmute rear channels (D1 = 1)

CD 10% (D0 = 1)

IB2

D7 X

D6 used for testing
D5 used for testing
D4 Stand-by on - Amplifier not working - (D4 = 0)Stand-by off - Amplifier working - (D4 = 1)
D3 Power amplifier mode diagnostic (D3 = 0)Line driver mode diagnostic (D3 = 1)
D2 X
D1 Right ChannelPower amplifier working in standard mode (D1 = 0)Power amplifier working in high

efficiency mode (D1 = 1)

D0 Left ChannelPower amplifier working in standard mode (D0 = 0)Power amplifier working in high efficiency

mode (D0 = 1)

15/20

TDA7563

If R/W = 1, the TDA7563 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.

DB1

D7 Thermal warning active (D7 = 1)

D6 Diag. cycle not activated or not terminated (D6 = 0)

Diag. cycle terminated (D6 = 1)
D5 X
D4 Channel LF

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)
D3 Channel LF

D2 Channel LF

D1 Channel LF

D0 Channel LFNo short to GND (D1 = 0)Short to GND (D1 = 1)

Normal load (D3 = 0)

Short load (D3 = 1)

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Offset diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

No short to Vcc (D1 = 0)

Short to Vcc (D1 = 1)

DB2

D7

D6 X
D5 X
D4 Channel LR

Offset detection not activated (D7 = 0)

Offset detection activated (D7 = 1)

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)
D3 Channel LR

Normal load (D3 = 0)

Short load (D3 = 1)
D2 Channel LR

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Permanent diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

D1 Channel LRNo short to Vcc (D1 = 0)

D0 Channel LRNo short to GND (D1 = 0)

16/20

Short to Vcc (D1 = 1)

Short to GND (D1 = 1)

B3

D7 Stand-by status (= IB1 - D4)

D6 Diagnostic status (= IB1 - D6)
D5 X

TDA7563

D4 Channel RF

D3 Channel RF

D2 Channel RF

D1 Channel RF

D0 Channel RF

DB4

D7 X

D6 X
D5 X

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)

Normal load (D3 = 0)

Short load (D3 = 1)

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Permanent diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

No short to Vcc (D1 = 0)

Short to Vcc (D1 = 1)

No short to GND (D1 = 0)

Short to GND (D1 = 1)

D4 Channel RR

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)
D3 Channel R

RNormal load (D3 = 0)

Short load (D3 = 1)
D2 Channel RR

Turn-on diag.: No open load (D2 = 0)

Permanent diag.: No output offset (D2 = 0)

D1 Channel RR

No short to Vcc (D1 = 0)

Short to Vcc (D1 = 1)
D0 Channel RR

No short to GND (D1 = 0)

Short to GND (D1 = 1)

Open load detection (D2 = 1)

Output offset detection (D2 = 1)

17/20

TDA7563

Examples of bytes sequence

- Turn-On diagnostic - Write operation

1

Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP

2

- Turn-On diagnostic - Read operation

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

The delay from 1 to 2 can be selected by software, starting from T.B.D. ms

3a

- Turn-On of the power amplifier with 30dB gain, mute on, diagnostic defeat, CD = 2%.

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X0000000 XXX1XX1 1

3b

- Turn-Off of the power amplifier

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X0XXXXXX XXX0XXXX

4

- Offset detection procedure enable

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

XX1XX11X XXX1XXXX

5

- Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits

(D2 of the bytes DB1, DB2, DB3, DB4).

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

■ The purpose of this test is to check if a D.C. off set (2V typ.) i s present on the outputs, produced by input

capacitor with anomalous leackage current or humidity between pins.

■ The delay from 4 to 5 can be selected by software, starting from T.B.D. ms

18/20

TDA7563

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

mm inch

A 4.45 4.5 0 4.65 0.175 0.177 0.183
B 1.80 1.9 0 2.00 0.070 0.074 0.079
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.3 9 0.42 0.014 0.015 0.016

F (1) 0.57 0.022

G 0.80 1.00 1.20 0.031 0.040 0.047

G1 25.75 26.00 26.25 1.014 1.023 1.033

H (2) 28.90 29.23 29.30 1.139 1.150 1.153

H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031

L (2) 22.07 22.47 22.87 0.869 0.884 0.904

L1 18.57 18.97 19.37 0.731 0.747 0.762

L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626

L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138

M 3.70 4.00 4.30 0.145 0.157 0.169

M1 3.60 4.00 4.40 0.142 0.157 0.173

N 2.20 0.086

O 2 0.079

R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019

V 5˚ (Typ.)
V1 3˚ (Typ.)
V2 20˚ (Typ.)
V3 45˚ (Typ.)

(1): dam-bar protusio n not included
(2): molding protusion i ncluded

OUTLINE AND

MECHANICAL DA T A

Flexiwatt27 (vertical)

L2

V

C

B

H

V3

H3

OL3 L4

Pin 1

G

H1

G1

H2

R3

R4

N

V2

F

V

A

V1

R2

R

L

L1

V1

R2

FLEX27ME

L5

R1

R1 R1

M

D

E

M1

7139011

19/20

TDA7563

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or oth erwise under any patent or patent rights of STMicroelectronic s. Specific ations mentioned in th i s publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devi ces or systems wi t hout express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

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20/20