STMicroelectronics TDA2822 Schematic

®

.

SUPPLY VOLTAGE DOWN TO 3 V

.

LOW CROSSOVER DISTORSION

.

LOW QUIESCENT CURRENT

.

BRIDGE OR STEREO CONFIGU RATION

TDA2822

DUAL POWER AMPLIFIER

POWERDIP

(Plasti c 12+ 2+2 )

DESCRIPTION

The TDA2822 is a monolithic integrated circuit in 12+2+2 powerdip, intended for use as dual audio power ampli fi er in port abl e r adios and TS set s.

TYPICAL APPLICATION CIRCUIT (S TE REO)

ORDERING NUMBE R :

TDA2822

Septembe r 20 03

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TDA2822

PIN CONNECTION (t op v iew)

INPUT+(1)

OUTPUT(1)

SCHEMATIC DIAGRAM

N.C.

INPUT-(1)

GND GND

N.C.

+V

1 2 3 4 5 6 7 N.C.

S

8 N.C.9

D95AU321

15 14 13 12 11 10

INPUT+(2)16 N.C. INPUT-(2) GND GND OUTPUT(2)

ABSOLUTE MAXI MUM RA TIN GS

Symbol Parameter Value Unit

Supply Voltage 15 V

V

s

I

Output Peak Current 1.5 A

o

P

Total Power Dissipation at T

tot

= 70 °C

at T

case

T

, TjStorage and Junction Temperature – 40 to 150

stg

2/11

= 50 °C

amb

1.25 4

W W

C

°

TDA2822

THERMAL DATA

Symbol Parameter Value Unit

R

th j-amb

R

th j- ca se

Thermal Resistance Junction-ambient Thermal Resistance Junction-pins

Max Max

80 20

C/W

°

C/W

°

ELECTRICAL CHARACTERISTICS (Vs = 6 V, T

= 25 °C, unless otherwise specified)

amb

STEREO (test circuit of fig. 1)

Symbol Parameter Test Condition Min. Typ. Max. Unit

Supply Voltage 3 15 V

V

s

V

Quiescent Output Voltage Vs = 9 V

c

Quiescent Drain Current 6 12 mA

I

d

I

Input Bias Current 100 nA

b

P

Output Power

o

(each channel)

G

Closed Loop Voltage Gain f = 1 kHz 36 39 41 dB

v

R

Input Resistance f = 1 kHz 100

i

e

N Total Input Noise

V

= 6 V

s

d = 10 % f = 1 kHz

= 9 V RL = 4

V

s

V

= 6 V RL = 4

s

V

= 4.5 V RL = 4

s

R

= 10 k

s

Ω

Ω Ω

1.3

0.45

Ω

B = 22 Hz to 22 kHz Curve A

SVR Supply Voltage Rejection f = 100 Hz 24 30 dB

CS Channel Separation

V

Supply Voltage 3 15 V

s

I

Quiescent Drain Current

d

V

Output Offset Voltage

os

I

Input Bias Current 100 nA

b

P

Output Power d = 10 % f = 1 kHz

o

d Distortion (f = 1 kHz)

G

Closed Loop Voltage Gain f = 1 kHz 39 dB

v

R

Input Resistance f = 1 kHz 100

i

e

N Total Input Noise

R

= 10 kΩ f = 1 kHz

g

R

=

∞

L

R

= 8

Ω

L

= 9 V RL = 8

V

s

V

= 6 V RL = 8

s

V

= 4.5 V RL = 4

s

R

= 8 Ω Po = 0.5 W

L

R

= 10 k

s

Ω

2.7

0.9

Ω

B = 22 Hz to 22 kHz Curve A

SVR Supply Voltage Rejection f = 100 Hz 40 dB

4

2.7

1.7

0.65

0.32

2.5 2

50 dB

612mA

10 60 mV

3.2

1.35 1

0.2 %

3

2.5

V V

W W W

k

Ω

V

µ

V

µ

W W W

k

Ω

V

µ

V

µ

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TDA2822

Figure 1 : Test Circuit (stereo).

Figure 2 : P.C. Boar d and Com ponents Layou t of the Cir c uit of Figure 1 (1:1 scale ).

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STMicroelectronics TDA2822 Schematic [ru]