UNCOMMITTED OUTPUTS FOR SINGLEENDED OR PUSH PULL APPLICATIONS
LOW STANDBY CURRENT 8mA TYPICAL
OPERATION UP TO 300KHz
1% MAXIMUM TEMPERATURE VARIATION
OF REFERENCE VOLTAGE
SG3524
DESCRIPTION
The SG3524 incorporates on a single monolithic
chip all the function required for the construction
of regulating power suppies inverters or switching
regulators. They can also be used as the control
element for high power-output applications. The
SG3524 family was designed for switching regulators of either polarity, transformer-coupled dcto-dc converters, transformerless voltage doublers and polarity converter applications
employing fixed-frequency, pulse-width modulation techniques. The dual alternating outputs allows either single-ended or push-pull applications.
BLOCK DIAGRAM
DIP16 SO16
ORDERING NUMBERS:
SG3524P (SO16)
Each device includes an on-ship reference, error
amplifier, programmable oscillator, pulse-steering
flip flop, two uncommitted output transistors, a
high-gain comparator, and current-limiting and
shut-down circuitry.
SG3524N (DIP16)
July 2000
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/9
Page 2
SG3524
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
IN
I
C
I
R
I
T
P
tot
T
stg
T
op
Supply Voltage40V
Collector Output Current100mA
Reference Output Current50mA
Current Through CT Terminal– 5mA
Total Power Dissipation at T
= 70°C1000mW
amb
Storage Temperature Range– 65 to 150°C
Operating Ambient Temperature Range: 0 to 70°C
PIN CONNECTION
(Top view)
THERMAL DATA
SymbolParameterDIP16SO16Unit
R
th j-amb
R
th j-alumina
(*) Thermal resistance junction-alumina with the device soldered on the middle of an alumina supporting substrate measuring 15 x 20mm;
(*) Excluding oscillator charging current, error and current limit dividers, and with outputs open.
3/9
Page 4
SG3524
Figure 1:
Figure 3:
Open-loop Voltage Amplification of
Error Amplifier vs. Frequency
Output Dead Time vs. Timing
Capacitance Value.
Figure 2:
Figure 4:
Oscillator Frequency vs. Timing
Components.
Output Saturation Voltage vs. load
Current.
Figure 5:
4/9
Open Loop Test Circuit.
Page 5
SG3524
PRINCIPLES OF OPERATION
The SG3524 is a fixed frequency pulse-withmodulation voltage regulator control circuit. The
regulator operates at a frequency that is programmed by one timing resistor (R
ing capacitor (C
charging current for C
voltage ramp at C
). RT established a constant
T
. This results in a linear
T
, which is fed to the compara-
T
) and one tim-
T
tor providing linear control of the output pulse
width by the error amplifier. the SG3524 contains,
an on-board 5V regulator that serves as a reference as well as powering the SG3524’s internal
control circuitry and is also useful in supplying external support functions. This reference voltage is
lowered externally by a resistor divider to provide
a reference within the common mode range the
error amplifier or an external reference may be
used. The power supply output is sensed by a
second resistor divider network to generale a
feedback signal to error amplifier. The amplifier
output voltage is then compared to the linear voltage ramp at C
. The resulting modulated pulse
T
out of the high-gain comparator is then steered to
the appropriate output pass trans istors (Q
or QB)
A
by the pulse-steering flip-flop, which is synchronously toggled by the oscillator output. The oscillator output pulse also serves as a blanking pulse
to assure both output are never on simultaneously during the transition times. The width of the
blanking pulse is controlled by the value of C
T
The outputs may be applied in a push-pull configuration in which their frequency is half that of
the base oscillator, or paralleled for single-ended
applications in which the frequency is equal to
that of the oscillator. The output of the error amplifier shares a common input to the comparator
with the current limiting at shutdown circuitry and
can be overridden by signals from either of these
inputs. This common point is also available externally and may be employed to control the gain of,
or to compensate, the error amplifier, or to provide additional control to the regulator.
RECOMMENDED OPERATIN G CONDITIONS
Supply voltage V
Reference Output Current0 to 20mA
Current trough C
Timing Resistor, R
Timing Capacitor, C
IN
Terminal- 0.03 to -2mA
T
T
T
8 to 40V
1.8 to 100KΩ
0.001 to 0.1µF
TYPICAL APPLICATIONS DATA
OSCILLATOR
The oscillator controls the frequency of the
SG3524 and is programmed by R
and CT ac-
T
cording to the approximate formula:
1.18
f =
R
T CT
where:
R
is in K
T
is in µF
C
T
Ω
f is in KHz
Pratical values of C
fall between 0.001 and
T
0.1µF. Pratical values of RT fall between 1.8 and
100KΩ. This results in a f requency r ange typically
from 120Hz to to 500KHz.
BLANKING
The output pulse of oscillator is used as a blank-
ing pulse at the output. This pulse width is controlled by the value of C
.If small values of CT are
T
required for frequency control, the oscillator output pulse width may still be increased by applying
a shunt capacitance of up to 100pF from pin 3 to
ground. If still greater dead-time is required, it
should be accomplished by limiting the maximum
duty cycle by clamping the output of t he er ror amplifier. This can easily be done with the circuit below:
Figure 6.
.
SYNCRONOUS OPERATION
When an external clock is desired, a clock pulse
of approximately 3V can be applied directly to the
oscillator output terminal. The impedance to
ground at this point is approximately 2KΩ. In this
configuration R
must be selected for a clock
T CT
period slightly greater than that the external clock.
If two more SG2524 regulators are to be operated
synchronously, all oscillator output terminals
should be tied together, all C
terminals con-
T
nected to a single timing capacitor, and timing resistor connected to a single R
terminal. The
T
other RT terminals c an be left open or shorted to
. Minimum lead lengths should be used be-
V
REF
tween the C
terminals.
T
5/9
Page 6
SG3524
Figure 7
: Flyback Converter Circuit.
Figure 8:
PUSH-PULL Transformer-coupled circuit.
6/9
Page 7
SG3524
DIM.
MIN.TYP. MAX.MIN.TYP. MAX.
a10.510.020
B0.771.650.0300.065
b0.50.020
b10.250.010
D200.787
E8.50.335
e2.540.100
e317.780.700
F7 .10.280
I5.10.201
L3.30.130
Z1.270.050
mminch
OUTLINE AND
MECHANICAL DATA
DIP16
7/9
Page 8
SG3524
DIM.
MIN.TYP. MAX.MIN.TYP. MAX.
A1.750.069
a10.10.250.0040.009
a21.60.063
b0.350.460.0140.018
b10.190.250.0070.010
C0.50.020
c145˚ (typ.)
D (1)9.8100.3860.394
E5.86.20.2280.244
e1.270.050
e38.890.350
F (1)3.840.1500.157
G4.65.30.1810.209
L0.41 .270.0160.050
M0.620.024
S
mminch
8˚(max.)
OUTLINE AND
MECHANICAL DATA
SO16 Narrow
(1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch).
8/9
Page 9
SG3524
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