The STM32 Nucleo-144 boards based on the MB1312 reference board (NUCLEO-L496ZG,
NUCLEO-L496ZG-P, NUCLEO-L4A6ZG, NUCLEO-L4P5ZG, NUCLEO-L4R5ZI and
NUCLEO-L4R5ZI-P) provide an affordable and flexible way for users to try out new
concepts and build prototypes with STM32 microcontrollers, choosing from the various
combinations of performance, power consumption and features. The ST Zio connector,
which extends the ARDUINO
easy to expand the functionality of the Nucleo open development platform with a wide
choice of specialized shields. The STM32 Nucleo-144 boards do not require any separate
probe as they integrate the ST-LINK/V2-1 debugger/programmer. The STM32 Nucleo-144
boards come with the STM32 comprehensive free software libraries and examples available
with the STM32Cube MCU Package.
The STM32 Nucleo-144 boards offer the following common features:
•STM32 Arm®-based microcontroller in LQFP144 package
•USB OTG FS
•3 user LEDs
•2 user and reset push-buttons
•32.768 kHz crystal oscillator
•Board connectors:
–USB with Micro-AB
–SWD
–ST Zio expansion connector including ARDUINO
–ST morpho expansion connector
•Flexible power-supply options: ST-LINK, USB V
•On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability:
mass storage, Virtual COM port and debug port
•Comprehensive free software libraries and examples available with the STM32Cube
MCU Package
•Support of a wide choice of Integrated Development Environments (IDEs) including
™
IAR
, Keil®, GCC-based IDEs
®
Uno V3
or external sources
BUS
Additionally, some STM32 Nucleo-144 boards offer the following specific features:
•External SMPS to generate V
•Arm® Mbed Enabled™
a. SMPS significantly reduces power consumption in Run mode, by generating V
DC/DC converter.
b. Arm and Mbed are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and or
elsewhere.
(b)
compliant
logic supply
core
(a)
logic supply from an external
core
6/48UM2179 Rev 9
Page 7
UM2179Ordering information
2 Ordering information
To order an STM32 Nucleo-144 board, refer to Tab l e 1. Additional information is available
from the datasheet and reference manual of the target STM32.
Order codeBoard reference Target STM32Differentiating features
NUCLEO-L496ZG
NUCLEO-L496ZG-PSTM32L496ZGT6PUExternal SMPS
NUCLEO-L4A6ZGSTM32L4A6ZGT6UCryptography
NUCLEO-L4P5ZGSTM32L4P5ZGT6U-
NUCLEO-L4R5ZISTM32L4R5ZIT6UArm
NUCLEO-L4R5ZI-PSTM32L4R5ZIT6PU
2.1 Product marking
Table 1. Ordering information
STM32L496ZGT6UArm
MB1312
®
Mbed Enabled™
®
Mbed Enabled™
®
–Arm
– External SMPS
Mbed Enabled™
Evaluation tools marked as “ES” or “E” are not yet qualified and therefore not ready to be
used as reference design or in production. Any consequences deriving from such usage will
not be at ST charge. In no event, ST will be liable for any customer usage of these
engineering sample tools as reference design or in production.
“E” or “ES” marking examples of location:
•On the targeted STM32 that is soldered on the board (for illustration of STM32 marking,
refer to the STM32 datasheet “Package information” paragraph at the www.st.com
website).
•Next to the evaluation tool ordering part number that is stuck or silk-screen printed on
the board.
The boards feature a specific STM32 device version, which allows the operation of any
bundled commercial stack/library available. This STM32 device shows a "U" marking option
at the end of the standard part number and is not available for sales.
In order to use the same commercial stack in his application, a developer may need to
purchase a part number specific to this stack/library. The price of those part numbers
includes the stack/library royalties.
UM2179 Rev 97/48
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Ordering informationUM2179
2.2 Codification
The meaning of the codification is explained in Tabl e 2.
XXMCU series in STM32 Arm Cortex MCUs STM32L4 Series
YYMCU product line in the seriesSTM32L496
ZSTM32 package pin count144 pins
T
-PSTM32 has external SMPS functionExternal SMPS
The order code is mentioned on a sticker placed on the top side of the board.
Table 2. Codification explanation
STM32 Flash memory size:
– G for 1 Mbyte
– I for 2 Mbytes
1 Mbyte
8/48UM2179 Rev 9
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UM2179Quick start
3 Quick start
This section describes how to start a development quickly using the STM32 Nucleo-144
board.
Before installing and using the product, accept the Evaluation Product License Agreement
from the www.st.com/epla webpage. For more information on the STM32 Nucleo-144 board
and for demonstration software, visit the www.st.com/stm32nucleo webpage.
3.1 Getting started
Follow the sequence below to configure the Nucleo-144 board and launch the demonstration
application (for components location refer to
1.Check the jumper position on the board:
JP1 (PWR-EXT) OFF (see Section 5.5.1: Power supply input from ST-LINK/V2-1 USB
connector for more details)
JP6 (Power source) on STLK side (for more details see Table 7: Power related jumper)
JP5 (IDD) ON (for more details see Section 5.8: JP5 (IDD))
CN4 ON selected (for more details see Table 4: CN4 states of the jumpers).
2. For the correct identification of the device interfaces from the host PC and before
connecting the board, install the Nucleo USB driver available on the
www.st.com/stm32nucleo website.
3. To power the board connect the STM32 Nucleo-144 board to a PC with a USB ‘Type-A
to Micro-B’ cable through the USB connector CN1 on the ST-LINK. As a result, the
green LED LD6 (PWR) and LD4 (COM) light up and the red LED LD3 blinks.
4. Press button B1 (left button).
5. Observe that the blinking frequency of the three LEDs LD1 to LD3 changes, by clicking
on
the button B1.
6. The software demonstration and the several software examples, that allow the user to
use the Nucleo features, are available at the www.st.com/stm32nucleo webpage.
7. Develop an application, using the available examples.
Figure 4: STM32 Nucleo-144 board top layout).
3.2 System requirements
•Windows® OS (7, 8 and 10), Linux® 64-bit or macOS
•USB Type-A to Micro-B cable
3.3 Development toolchains
•Keil® MDK-ARM
•IAR™ EWARM
•GCC-based IDEs
•Arm
a. macOS® is a trademark of Apple Inc., registered in the U.S. and other countries
b. On Windows® only.
®
Mbed™ online (see https://mbed.org)
(b)
(b)
UM2179 Rev 99/48
®(a)
47
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Conventions UM2179
3.4 Demonstration software
The demonstration software, included in the STM32Cube MCU Package corresponding to
the on-board MCU, is preloaded in the STM32 Flash memory for easy demonstration of the
device peripherals in standalone mode. The latest versions of the demonstration source
code and associated documentation can be downloaded from the www.st.com/stm32nucleo
webpage.
4 Conventions
Tabl e 3 provides the conventions used for the ON and OFF settings in the present
document.
Convention Definition
Jumper JPx ON Jumper fitted
Jumper JPx OFF Jumper not fitted
Solder bridge SBx ON SBx connections closed by solder or 0 ohm resistor
Table 3. ON/OFF conventions
Solder bridge SBx OFF SBx connections left open
In this document the references for all information that is common to all sale types, are
“STM32 Nucleo-144 board” and “STM32 Nucleo-144 boards”.
10/48UM2179 Rev 9
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UM2179Hardware layout and configuration
Embedded
ST-LINK/V2-1
STM32
Microcontroller
RESET
SWD
ST ŵorpho extension Header
ST ŵorpho extension Header
Micro-B
USB
Đonnector
IO
USB
B2
RST
B1
USER
IO
Zio Đonnector
LED
LD1
ST-LINK Part
MCU Part
LED
LD2/3
Micro-AB or
Micro-B USB
Đonnector
Zio Đonnector
Ext
SMPS
IO
5 Hardware layout and configuration
The STM32 Nucleo-144 board is designed around the STM32 microcontrollers in a 144-pin
LQFP package.
Figure 3 shows the connections between the STM32 microcontroller and its peripherals (ST-
LINK/V2-1, push-buttons, LEDs, USB, ST Zio connectors and ST morpho headers).
Figure 4 and Figure 5 show the location of these features on the STM32 Nucleo-144 board.
Figure 6 and Figure 7 show the mechanical dimensions of the STM32 Nucleo-144 board.
Figure 3. Hardware block diagram
1. Ext SMPS function is only available on '-P' suffixed boards.
UM2179 Rev 911/48
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Hardware layout and configurationUM2179
CN1
ST
-
LINK Micro
USB connector
CN4
ST
-LINK/
NUCLEO selector
LD1-LD3
User LEDs
B1
User button
CN11
ST Porpho
pin header
CN13
SMPS signal
connector
JP1
PWR
-
EXT
CN5
SWD
connector
JP5
IDD
measurement
U11
STM32
Microcontroller
LD7
USB over
CN7, CN10
Zio connectors
SB6
3.3V regulator
output
JP6
Power Source
selection
LD6
Power (Green
LED)
LD5
(Red LED) ST-/,1.9
Power Over
FXUUHQWDODUP
LD4
(Red/Green
LED) COM
LD8
USB VBUS
CN14
User USB
connector
B2
Reset button
CN8, CN9
Zio connectors
CN12
ST Porpho
pin header
5.1 STM32 Nucleo-144 board layout
Figure 4. STM32 Nucleo-144 board top layout
12/48UM2179 Rev 9
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UM2179Hardware layout and configuration
SB101, SB103,
SB105, SB107
(RESERVED)
SB100, SB102,
SB104, SB106
(DEFAULT)
Figure 5. STM32 Nucleo-144 board bottom layout
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Hardware layout and configurationUM2179
5.2 STM32 Nucleo-144 board mechanical drawing
Figure 6. STM32 Nucleo-144 board mechanical drawing in millimeter
14/48UM2179 Rev 9
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UM2179Hardware layout and configuration
Figure 7. Nucleo-144 board mechanical drawing in mils
UM2179 Rev 915/48
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Hardware layout and configurationUM2179
5.3 Cuttable PCB
The STM32 Nucleo-144 board is divided into two parts: ST-LINK and target STM32. The
ST-LINK part of the PCB can be cut out to reduce the board size. In this case the remaining
target STM32 part can only be powered by V
CN11, or by V
and 3.3 V on the ST Zio connector CN8. It is still possible to use the ST-
IN
, E5V and 3.3 V on the ST morpho connector
IN
LINK part to program the STM32, using wires between the CN5 and SWD available signals
on the ST morpho connector (SWCLK CN11 pin 15, SWDIO CN11 pin 13 and NRST CN11
pin 14, same I/O level as VDD_MCU).
5.4 Embedded ST-LINK/V2-1
The ST-LINK/V2-1 programming and debugging tool is integrated in the STM32 Nucleo-144
board.
The embedded ST-LINK/V2-1 supports only SWD for STM32 devices. For information about
debugging and programming features refer to the ST-LINK/V2 in-circuit
debugger/programmer
for STM8 and STM32user manual (UM1075), which describes in
details all the ST-LINK/V2 features.
The changes versus ST-LINK/V2 version are listed below. New features supported on STLINK/V2-1:
•USB software re-enumeration
•Virtual COM port interface on USB
•Mass storage interface on USB
•USB power management request for more than 100 mA power on USB
Features not supported on ST-LINK/V2-1:
•SWIM interface
•Minimum supported application voltage limited to 3 V
There are two different ways to use the embedded ST-LINK/V2-1, depending on the jumper
state (see Table 4):
•Program/debug the STM32 on board
•Program/debug the STM32 in an external application board, using a cable connected
SWD connector CN5
Jumper stateDescription
Table 4. CN4 states of the jumpers
to
Both CN4 jumpers ON
Both CN4 jumpers OFF
16/48UM2179 Rev 9
ST-LINK/V2-1 functions enabled for on-board programming
(default). See Section 5.4.3.
ST-LINK/V2-1 functions enabled for external CN5 connector
(SWD supported). See Section 5.4.4.
Page 17
UM2179Hardware layout and configuration
5.4.1 Drivers
Before connecting the Nucleo-144 board to a Windows® (XP, 7, 8 and 10) PC via USB,
install the driver for ST-LINK/V2-1 that can be downloaded from the www.st.com website.
If the STM32 Nucleo-144 board is connected to the PC before installing the driver, the PC
device manager may report some Nucleo interfaces as “Unknown”.
To recover from this situation, after installing the dedicated driver, the association of
“Unknown” USB devices found on the STM32 Nucleo-144 board to this dedicated driver,
must be updated in the device manager manually.
Note:It is recommended to proceed by using USB Composite Device, as shown in Figure 8.
Figure 8. USB composite device
5.4.2 ST-LINK/V2-1 firmware upgrade
The ST-LINK/V2-1 embeds a firmware upgrade mechanism for in-situ upgrade through the
USB port. As the firmware may evolve during the lifetime of the ST-LINK/V2-1 product (for
example new functionalities, bug fixes, support for new microcontroller families), it is
recommended to keep the ST-LINK/V2-1 firmware up to date before starting to use the
STM32 Nucleo-144 board. The latest version of this firmware is available from the
www.st.com website.
5.4.3 Using the ST-LINK/V2-1 to program and debug the on-board STM32
To program the on-board STM32, place the two jumpers marked in red on the connector
CN4, as shown in Figure 9. The CN5 connector must not be used, since it could disturb the
communication with the STM32 microcontroller of the Nucleo-144 board.
UM2179 Rev 917/48
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Hardware layout and configurationUM2179
06Y9
&1MXPSHUV21
&16:'
FRQQHFWRU
Figure 9. Connecting the STM32 Nucleo-144 board to program the on-board STM32
5.4.4 Using ST-LINK/V2-1 to program and debug an external STM32
application
It is very easy to use the ST-LINK/V2-1 to program the STM32 on an external application.
Simply remove the two jumpers from CN4, as shown in Figure 10 and connect the
application to the SWD debug connector according to Table 5.
Note:JP4 NRST (target STM32 RESET) must be open when CN3 pin 5 is used in an external
application.
18/48UM2179 Rev 9
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UM2179Hardware layout and configuration
Table 5. Debug connector CN5 (SWD)
PinCN5Description
1VDD_TARGETV
from application
DD
2SWCLKSWD clock
3GNDground
4SWDIOSWD data input/output
5NRSTRESET of target STM32
6SWOReserved
UM2179 Rev 919/48
47
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Hardware layout and configurationUM2179
06Y9
&1MXPSHUV2))
&16:'
FRQQHFWRU
Figure 10. Using ST-LINK/V2-1 to program an external STM32 application
20/48UM2179 Rev 9
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UM2179Hardware layout and configuration
5.5 Power supply and power selection
The power supply is provided either by the host PC through the USB cable or by an external
source: VIN (7 V-12 V), E5V (5 V) or +3.3 V power supply pins on CN8 or CN11. If VIN, E5V
or +3.3
standard EN-60950-1: 2006+A11/2009 and must be Safety Extra Low Voltage (SELV) with
limited power capability.
If the power supply is +3.3 V, the ST-LINK is not powered and cannot be used.
V is used to power a Nucleo-144 board, this power source must comply with the
5.5.1 Power supply input from ST-LINK/V2-1 USB connector
The STM32 Nucleo-144 board and shield can be powered from the ST-LINK USB connector
CN1 (U5V), by placing a jumper between the pins 3 and 4 of JP6, as shown in
Power related jumper. Note that only the ST-LINK part is power supplied before the USB
enumeration, as the host PC only provides 100 mA to the board at that time. During the
USB enumeration, the STM32 Nucleo-144 board requires 300
If the host is able to provide the required power, the targeted STM32 microcontroller is
powered and the green LED LD6 is turned ON, thus the STM32 Nucleo-144 board and its
shield can consume a maximum current of 300
provide the required current, the targeted STM32 microcontroller and the extension boards
are not power supplied. As a consequence the green LED LD6 stays turned OFF. In such
case it is mandatory to use an external power supply as explained in the next section.
After the USB enumeration succeeds, the ST-LINK U5V power is enabled, by asserting the
PWR_EN pin. This pin is connected to a power switch (ST890), which powers the board.
This power switch also features a current limitation to protect the PC if a short-circuit happens
on the board. If an overcurrent (more than 500
lits up.
mA, not more. If the host is not able to
mA) happens on the board, the red LED LD5
mA of current to the host PC.
Table 7:
Warning:If the maximum current consumption of the STM32 Nucleo-
144 board and its shield boards exceed 300 mA, it is
mandatory to power the STM32 Nucleo-144 board, using an
external power supply connected to E5V, VIN or +3.3 V.
Note:If the board is powered by a USB charger, there is no USB enumeration, so the green LED
LD6 stays in OFF state permanently and the target STM32 is not powered. In this specific
case a jumper must be placed between pins 5 and 6 of JP6, to allow the board to be powered
anyway.
5.5.2 External power supply inputs
Depending on the used voltage, an external power source supplies in three different ways
the STM32 Nucleo-144 board and its shield boards. The three power sources are listed in
Table 6.
When the STM32 Nucleo-144 board is power supplied by VIN or E5V, the jumper configuration
must be as showed below:
•Jumper JP6 on pin 1 and pin 2 for E5V or jumper JP6 on pin 7 and pin 8 for V
•Jumper JP1 OFF
UM2179 Rev 921/48
IN
47
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Hardware layout and configurationUM2179
E5V
STLK
CHGR VIN
E5V
STLK
CHGR VIN
E5V
STLK
CHGR VIN
E5V
STLK
CHGR VIN
Input power
name
Connector
pins
Table 6. External power sources
Vol tag e
range
Max currentLimitation
From 7 V to 12 V only and input
current capability is linked to input
voltage:
V
IN
CN8 pin 15
CN11 pin 24
7 V to 12 V800 mA
– 800 mA input current when
=7 V
V
IN
– 450 mA input current when
7V<V
<9V
IN
– 250 mA input current when
<12 V
IN
E5VCN11 pin 6
4.75 V to
5.25 V
9 V<V
500 mA-
Two possibilities:
+3.3 V
CN8 pin 7
CN11 pin 16
3 V to 3.6 V-
–ST-LINK PCB is cut
– SB3 and SB111 OFF (ST-LINK not
powered)
The 5 V power source is selected by the jumper JP6 as shown in Table 7.
Table 7. Power related jumper
JumperDescription
STLK (ST-LINK V
) is used as power source when JP6 is set as shown on the
BUS
right (Default setting)
E5V is used as power source when JP6 is set as shown on the right:
JP6
CHGR (USB Charger on CN1) is used as power source when JP6 is set as shown
on the right:
is used as power source when JP6 is set as shown on the right:
V
IN
22/48UM2179 Rev 9
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UM2179Hardware layout and configuration
Using VIN or E5V as an external power supply
When powered by VIN or E5V, it is still possible to use the ST-LINK for only programming or
debugging, but it is mandatory to power the board first using VIN or E5V, then to connect the
USB cable to the PC. In this way the enumeration succeeds, thanks to the
external power
source.
The following power-sequence procedure must be respected:
1.Connect jumper JP6 between pin 1 and pin 2 for E5V or between pin 7 and pin 8 for V
IN
2. Check that JP1 is removed
3. Connect the external power source to VIN or E5V
4. Power on the external power supply 7 V< VIN < 12 V to VIN, or 5 V for E5V
5. Check that the green LED LD6 is turned ON
6. Connect the PC to the USB connector CN1
If this order is not respected, the board may be powered by USB (U5V) first, then by VIN or
E5V as the following risks may be encountered:
1.If the board needs more than 300 mA, the PC may be damaged or the current supplied
can be limited by the PC. As a consequence the board is not powered correctly.
2. 300 mA is requested during the enumeration phase (since JP1 must be OFF) so there
is the risk that the request is rejected and the enumeration does not succeed if the PC
cannot provide such current. Consequently the board is not power supplied (LED LD6
remains OFF).
External power supply input: + 3.3 V
If 3.3 V is provided by a shield board, it is worth using the +3.3 V (CN8 pin 7 or CN11 pin 16)
directly as power input. In this case the ST-LINK is not powered thus
debugging features are not available.
When the board is powered with +3.3 V, two different configurations are possible:
•ST-LINK is removed (PCB cut)
•SB6 (3.3 V regulator) and JP3 (NRST) are OFF
5.5.3 External power supply output
When powered by USB, VIN or E5V, the +5 V (CN8 pin 9 or CN11 pin 18) can be used as
output power supply for an ST Zio shield or an extension board. In this case the maximum
current of the power source specified in Tabl e 6: External power sources must be respected.
The +3.3 V (CN8 pin 7 or CN11 pin 16) can also be used as power supply output. The
current is limited by the maximum current capability of the regulator U6 (500 mA max).
5.5.4 SMPS power supply
Power figures in Run Mode are significantly improved, by generating V
the external DC/DC converter (this function is only available on '-P' suffixed boards).
Board is populated with two different SMPS mounted on U15 and U16:
•SMPS U15 allows to dynamically supply the V
maximum current of 30 mA. For the NUCLEO-L4R5ZI-P, the V
mode are supplied at 1.2 V with a maximum current of 40 mA.
DD_1V2
the programming and
logic supply from
core
pins in Run mode at 1.1 V with a
pins in Run
DD_1V2
UM2179 Rev 923/48
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Hardware layout and configurationUM2179
•SMPS U16 allows to supply the V
DD_MCU
pins at 1.8 V with a maximum current of
50 mA. When SB125 is opened and SB120 closed, the SMPS can deliver higher
current but with higher consumption. This SMPS is disabled by default (See Table 10:
Configuration of the solder bridges and jumpers).
V
DD_MCU
solder bridge configuration:
•3.3 V (default): SB122 closed, SB121 and SB127 open
•1.8 V: SB122 open, and SB121 and SB127 closed (best ULPBench score)
Caution:The power sequence is not respected when using 1V8 MCU_VDD. Refer to the Getting
started with STM32L4 Series and STM32L4+ Series hardware development application
note (AN4555), and to the corresponding STM32L4 Series and STM32L4+ Series product
datasheets.
Note:The ST-LINK is still available in this configuration as a result of level shifter U14.
5.6 LEDs
User LD1: a green user LED is connected to the STM32 I/O PC7 (SB124 ON and SB123
OFF) or PA5 (SB123 ON and SB124 OFF) corresponding to the ST Zio D13. It only works
when V
CC_MCU
User LD2: a blue user LED is connected to PB7.
User LD3: a red user LED is connected to PB14.
These user LEDs are on when the I/O is HIGH value, and are off when the I/O is LOW.
LD4 COM: the tricolor LED LD4 (green, orange and red) provides information about ST-LINK
communication status. LD4 default color is red. LD4 turns to green to indicate that the
communication is in progress between the PC and the ST-LINK/V2-1, with the following
setup:
•Slow blinking red/off: at power-on before USB initialization
•Fast blinking red/off: after the first correct communication between PC and
ST-LINK/V2-1 (enumeration)
•Red LED on: when the initialization between the PC and ST-LINK/V2-1 is complete
•Green LED on: after a successful target communication initialization
•Blinking red/green: during communication with target
•Green on: communication finished and successful
•Orange on: communication failure
LD5 USB power fault: LD5 indicates that the board power consumption on USB exceeds
500 mA, consequently the user must power the board using an external power supply.
is 3.3 V.
LD6 PWR: the green LED indicates that the STM32 part is powered and +5 V power is
available on CN8 pin 9 and CN11 pin 18.
LD7 and LD8 USB FS: refer to Section 5.12: USB FS OTG.
Note:1LD1 is connected to U8 and it is driven by PC7 or PA5 which may be changed to 1.8 V I/O,
so LD1 cannot be lit when V
Note:2LD2, LD3 cannot work with V
24/48UM2179 Rev 9
is set to 1.8 V.
DD
DD_MCU
= 1.8 V
Page 25
UM2179Hardware layout and configuration
5.7 Push-buttons
B1 USER: the user button is connected to the I/O PC13 by default (Tamper support, SB197
ON and SB178 OFF) or PA0 (Wakeup support, SB178 ON and SB197 OFF) of the STM32.
B2 RESET: this push-button is connected to NRST and is used to RESET the STM32.
5.8 JP5 (IDD)
The jumper JP5, labeled IDD, is used to measure the STM32 microcontroller consumption by
removing the jumper and by connecting an ammeter:
•JP5 ON: STM32 is powered (default)
•JP5 OFF: an ammeter must be connected to measure the STM32 current. If there is no
ammeter, the STM32 is not powered
5.9 OSC clock
5.9.1 OSC clock supply
There are four ways to configure the pins corresponding to the external high-speed clock
(HSE):
•HSE not used (Default): PF0/PH1 and PF1/PH1 are used as GPIOs instead of as
clock. The
–SB147 and SB156 ON
–SB109 and SB148 (MCO) OFF
–SB12 and SB13 removed
•MCO from ST-LINK: MCO output of ST-LINK is used as input clock. This
cannot be changed, it is fixed at 8 MHz and connected to the
•PF0/PH0-OSC_IN of STM32 microcontroller. The configuration must be:
–SB147 OFF
–SB109 and SB148 ON
–SB12 and SB13 OFF
•HSE on-board oscillator from X3 crystal (not provided): for typical frequencies and
its capacitors and resistors, refer to the STM32 microcontroller datasheet and for the
oscillator design guide refer to the Oscillator design guide for STM8S, STM8A and STM32 microcontrollers Application
characteristics: 8 MHz, 8 pF, 20 ppm. It is recommended to use the NX3225GD-8.000MEXS00A-CG04874 crystal manufactured by NIHON DEMPA KOGYO CO., LTD. The
configuration must be:
–SB147 and SB156 OFF
–SB12 and SB13 soldered
–C37 and C38 soldered with 4.3 pF capacitors
–SB109 and SB148 OFF
configuration must be:
frequency
note (AN2867). The X3 crystal has the following
UM2179 Rev 925/48
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Hardware layout and configurationUM2179
•Oscillator from external PF0/PH0: from an external oscillator through the pin 29 of the
CN11 connector. The configuration must be:
–SB147 ON
–SB109 and SB148 OFF
–SB12 and SB13 removed
5.10 OSC 32 KHz clock supply
There are three ways to configure the pins corresponding to low-speed clock (LSE):
•On-board oscillator (Default): X2 crystal. Refer to the Oscillator design guide for
STM8S, STM8A and STM32 microcontrollers Application note (AN2867) for oscillator
design guide for STM32 microcontrollers. It is recommended to use the NX3214SA-
•Oscillator from external PC14: from external oscillator through the pin 25 of CN11
connector. The configuration must be:
–SB145 and SB146 ON
–R39 and R40 removed
•LSE not used: PC14 and PC15 are used as GPIOs instead of low-speed clock. The
configuration must be:
–SB145 and SB146 ON
–R39 and R40 removed
5.11 LPUART1 communication
The LPUART1 interface available on PG7 and PG8 of the STM32 can be connected to the
ST-LINK or to the ST morpho connector. Another option to do this connection is to set the
related solder bridges. By default the LPUART1 communication between the target STM32
and the ST-LINK is enabled, to support the Virtual COM port (SB130 and SB131 ON). Refer
to
Table 8.
Pin
name
PG7LPUART1 TXSB131 ON and SB195 OFFSB131 OFF and SB195 ON
PG8LPUART1 RXSB130 ON and SB193 OFFSB130 OFF and SB193 ON
Function
Table 8. LPUART1 pin configuration
Virtual COM port
configuration)
(default
ST morpho connection
26/48UM2179 Rev 9
Page 27
UM2179Hardware layout and configuration
5.12 USB FS OTG
The STM32 Nucleo-144 board supports the USB OTG as host or as device-full-speed
communication through a USB Micro-AB connector (CN14) and USB power switch (U12)
connected to V
Warning:The USB Micro-AB connector (CN14) cannot power a Nucleo-
A green LED LD8 lits up in one of these cases:
•Power switch (U12) is ON and STM32 Nucleo-144 board works as a USB host
•V
is powered by another USB host when the STM32 Nucleo-144 board works as a
BUS
USB device.
.
BUS
144 board. To avoid damaging the STM32, it is mandatory to
power the board before connecting a USB cable on CN14.
Otherwise there is a risk of current injection on STM32 I/Os.
The red LED LD7 lits up if overcurrent occurs when +5 V is enabled on V
in USB host
BUS
mode.
Note:1It is recommended to power the Nucleo-144 board with an external power supply when
using the USB OTG or the host function.
Note:2JP4 must be closed when using the USB OTG FS.
Note:3Limitation: when the cable is not connected, PA9 (V
) is not floating, because internal pull
BUS
up of PA12 (D+) impacts PA9 through ESD protection part USBLC6-2SC6 (U13).
For pin configuration refer to Tab le 9.
Pin
name
PA8USB SOF--Test point TP1
PA9USB V
PA10USB IDSB134 ONSB134 OFF-
PA11USB DMSB142 ONSB142 OFF-
PA12USB DPSB143 ONSB143 OFF-
PG6USB GPIO OUT
PG5USB GPIO IN
Function
BUS
Table 9. USB pin configuration
Configuration
using USB
when
connector
SB135 ONSB135 OFF-
OTG:SB201 OFF,
SB200 ON
JP4 ON, SB199
SB198 ON
OFF
Configuration
when using ST
morpho connector
OTG:SB200 OFF
JP4 OFFUSB overcurrent alarm
OTG:USB power switch
Remark
control
UM2179 Rev 927/48
47
Page 28
Hardware layout and configurationUM2179
5.13 Solder bridges and jumpers
SBxx are located on top layer and SB1xx-SB2xx on bottom layer of the STM32 Nucleo-144
board. The configuration of the solder bridges and jumpers is showed in
Bridge/jumperState
Table 10. Configuration of the solder bridges and jumpers
(1)
Description
Table 10.
SB5 (+3V3_PER)
SB6 (3.3 V)
SB195, SB193 (GPIO)
SB131, SB130
(ST-LINK-USART)
SB152 (V
DDA
)
SB100,102,104,106
(DEFAULT)
SB101,103,105,107
(RESERVED)
SB141 (SWO)
ONPeripheral power +3V3_PER is connected to +3.3 V.
OFFPeripheral power +3V3_PER is not connected.
ON
Output of voltage regulator LD39050PU33R is connected
to 3.3 V.
OFFOutput of voltage regulator LD39050PU33R is not connected.
PG7 and PG8 on STM32 are connected to ST morpho
ON
connectors CN12. If these pins are used on ST morpho
connectors, SB130 and SB131 should be OFF.
OFF
PG7 and PG8 on STM32 are disconnected to ST morpho
connectors CN12.
PA2 and PA3 on ST-LINK STM32F103CBT6 are connected to
ON
PG7 and PG8 to enable the Virtual COM port. Thus PG7 and
PG8 on ST morpho connectors cannot be used.
OFF
ONV
OFFV
PA2 and PA3 on ST-LINK STM32F103CBT6 are disconnected
to PG7 and PG8 on STM32.
on STM32 MCU is connected to VDD.
DDA
on STM32 MCU is disconnected to VDD.
DDA
ONReserved, do not modify.
OFFReserved, do not modify.
ON
SWO signal of the STM32 (PB3) is connected to ST-LINK SWO
input.
OFFSWO signal of STM32 is not connected.
OFF, OF F,
ON
IOREF is connected to V
DD_MCU
.
)
ON, OFF,
OFF
OFF, ON,
OFF
OFF
ON
IOREF is connected to +3.3 V.
IOREF is connected to +3V3_PER.
Pin 6 of CN7 and Pin 7 of CN12 are disconnected to V
STM32.
Pin 6 of CN7 and Pin 7 of CN12 are connected to V
STM32.
SB110, SB111,SB112
(IOREF)
SB119 (V
REF+
ONThese pins are connected to ST morpho connector CN12.
SB137 (SDMMC_D0),
SB136 (SDMMC_D1)
OFF
These pins are disconnected from ST morpho connector CN12
to avoid stub of SDMMC data signals on PCB.
28/48UM2179 Rev 9
REF+
REF+
on
on
Page 29
UM2179Hardware layout and configuration
Table 10. Configuration of the solder bridges and jumpers (continued)
Bridge/jumperState
(1)
Description
ON, OFF Green user LED LD1 is connected to PC7.
SB124, SB123
(LD1-LED)
SB172 (Legacy)
SB173 (SMPS) (LD2-
LED)
SB132 (LD3-LED)
SB145,146
(X2 crystal)
SB147 (PH0), SB156
(PH1) (Main clock)
OFF,ON
Green user LED LD1 is connected to D13 of ARDUINO® signal
(PA5).
OFF, OFF Green user LED LD1 is not connected.
ON,ONForbidden.
ONBlue user LED LD2 is connected to PB7.
OFFBlue user LED LD2 is not connected.
ONRed user LED LD3 is connected to PB14.
OFFRed user LED LD3 is not connected.
OFF
ON
ON, ON
PC14, PC15 are not connected to ST morpho connector CN11.
(X2 used to generate 32 kHz clock).
PC14, PC15 are connected to ST morpho connector CN11.
(R39 and R40 must be removed).
PH0 and PH1 are connected to ST morpho connector CN11.
(SB12, SB13 and SB148 must be removed).
PH0 is not connected to ST morpho
OFF, ON
PH1 is connected to ST morpho connector CN11 (MCO is used
as main clock for STM32 on PH0).
PH0, PH1 are not connected to ST morpho connector CN11
OFF, O FF
(X3, C37, C38, SB12 and SB13 provide a clock. In this case
SB148 must be removed).
SB109, SB148 (MCO)
SB12, SB13 (external
8M crystal)
SB154 (V
BAT
)
SB197, SB178
(B1-USER)
SB179 (PA0)
SB151,SB153
OFF
ON
MCO of ST-LINK (STM32F103CBT6) is not connected to PH0
of STM32.
MCO of ST-LINK (STM32F103CBT6) is connected to PH0 of
STM32.
OFFPH0 and PH1 are not connected to external 8 MHz crystal X3.
ONPH0 and PH1 are connected to external 8 MHz crystal X3.
ONV
OFFV
pin of STM32 is connected to VDD.
BAT
pin of STM32 is not connected to VDD.
BAT
ON, OFF B1 push-button is connected to PC13.
OFF, ON
OFF,
OFF
B1 push-button is connected to PA0 (Set SB179 OFF if ST Zio
connector is used).
B1 push-button is not connected.
ONPA0 is connected to ST Zio connector (Pin 29 of CN10).
OFFPA0 is not connected to ST Zio connector (Pin 29 of CN10).
OFFDefault setting.
ONForbidden.
UM2179 Rev 929/48
47
Page 30
Hardware layout and configurationUM2179
Table 10. Configuration of the solder bridges and jumpers (continued)
Bridge/jumperState
(1)
Description
SB158, SB167 (A
VDD
SB142 (PA11), SB143
(PA12)
SB149 (V
REF+
)
ON, OFF A
)
OFF, ON A
ONThese pins are used as D+ and D- on USB connector CN14.
OFFThese pins are used as GPIOs on ST morpho connectors.
ONV
OFFV
on STM32 is connected to VDD.
VDD
on STM32 is connected to VDD_MCU.
VDD
on STM32 is connected to A
REF+
on STM32 is disconnected to A
REF+
ONThese pins are connected to ST morpho connector CN11.
SB144 (QSPI_IO1)
OFF
These pins are disconnected from ST morpho connector CN11
to avoid stub of QSPI_IO1 signals on PCB.
OFFNo incidence on ST-LINK STM32F103CBT6 NRST signal.
(2)
(STM_RST)
JP2
ON
ON
ST-LINK STM32F103CBT6 NRST signal is connected to GND
(ST-LINK reset to reduce power consumption).
Board RESET signal (NRST) is connected to ST-LINK reset
control I/O
(T_NRST).
JP3 (NRST)
OFF
ON,
SB122, SB121, SB127
(V
DD_MCU
)
OFF,OFF
OFF, ON,
ON
1. Default SBx state is shown in bold.
2. The jumper JP2 is not mounted on the board by default.
Board RESET signal (NRST) is not connected to ST-LINK reset
control I/O (T_NRST).
V
DD_MCU
V
DD_MCU
is connected to VDD directly (3.3 V fixed).
is connected to output of DC-DC (1.8 V fixed).
VDD
.
VDD
.
All the other solder bridges present on the STM32 Nucleo-144 board are used to configure
several I/Os and power supply pins for compatibility of features and pinout with the target
STM32 supported.
STM32 Nucleo-144 boards are delivered with the solder bridges configured according to the
target STM32 supported.
30/48UM2179 Rev 9
Page 31
UM2179Hardware layout and configuration
NUCLEO-L496ZG
CN7
CN10
CN8
CN9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
PC8
PF5
PF3
PD2
PC12
PC11
PC10
PC9
GND
PD3
PD4
PD5
PD6
PD7
PG1
PF9
PF7
PF8
PE3
PE6
PE4
PE2
PE5
D34
D33
D32
GND
D31
D30
D29
D28
GND
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D27
D26
A8
A7
A6
GND
AGND
AVDD
PE0
PB0
PA0
GND
PE14
PE12
PB0
PE15
GND
PB4
PA4
PB3
PB5
PB4
PA4
PB12
PB13
PB15
PC6
PB10
PA2
PA1
PC2
PB1
GND
AGND
AVDDD50
D49
D48
D47
D46
D45
D44
D43
GND
D55
D54
D53
D52
D51
D64
D63
D62
D61
D60
D59
D58
D57
D56
Arduino subset of Zio = A0 to A5 and D0 to D15
Zio extension = A6 to A8 and D16 to D72
USB
OTG
USB
ST-LINK
D65
D66
D67
GND
D68
D69
D70
D71
D72
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
A5
A4
A3
A2
A1
A0
PG0
PD1
PD0
GND
PF0
PF1
PF2
PB6
PB2
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
PC5
PC4
PC1
PC3
PC0
PA3
PF12
PD15
PD14
PA7
PA6
PA5
GND
NC
PB9
PB8
PD9
PD8
PF15
PE13
PF14
PE11
PE9
PF13
PB11
PB10
PE15
PE14
PE12
PE10
PE7
PE8
GND
D8
D9
D10
D11
D12
D13
GND
AVDD
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D35
D36
D37
D38
D39
D40
GND
D41
D42
5.14 Expansion connectors
For each STM32 Nucleo-144 board, Figure 11, Figure 12, Figure 13, Figure 14, Figure 15
and Figure 16 show the signals connected by default to the ST Zio connectors (CN7, CN8,
CN9 and CN10), including the support for ARDUINO® Uno V3.
Figure 11. NUCLEO-L496ZG
UM2179 Rev 931/48
47
Page 32
Hardware layout and configurationUM2179
NUCLEO-L496ZG-P
CN7
CN10
CN8
CN9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
PC8
PF5
PF3
PD2
PC12
PC11
PC10
PC9
GND
PD3
PD4
PD5
PD6
PD7
PG1
PF9
PF7
PF8
PE3
PE6
PE4
PE2
PE5
D34
D33
D32
GND
D31
D30
D29
D28
GND
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D27
D26
A8
A7
A6
GND
AGND
AVDD
PE0
PB0
PA0
GND
PE14
PE12
PB0
PE15
GND
PB4
PA4
PB3
PB5
PB4
PA4
PB12
PB13
PB15
PC6
PB10
PA2
PA1
PC2
PB1
GND
AGND
AVDDD50
D49
D48
D47
D46
D45
D44
D43
GND
D55
D54
D53
D52
D51
D64
D63
D62
D61
D60
D59
D58
D57
D56
Arduino subset of Zio = A0 to A5 and D0 to D15
Zio extension = A6 to A8 and D16 to D72
USB
OTG
USB
ST-LINK
D65
D66
D67
GND
D68
D69
D70
D71
D72
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
A5
A4
A3
A2
A1
A0
PG0
PD1
PD0
GND
PF0
PF1
PF2
PB6
PB2
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
PC5
PC4
PC1
PC3
PC0
PA3
PF12
PD15
PD14
PA7
PA6
PA5
GND
NC
PB9
PB8
PD9
PD8
PF15
PE13
PF14
PE11
PE9
PF13
NC
PB10
PE15
PE14
PE12
PE10
PE7
PE8
GND
D8
D9
D10
D11
D12
D13
GND
AVDD
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D35
D36
D37
D38
D39
D40
GND
D41
D42
Figure 12. NUCLEO-L496ZG-P
32/48UM2179 Rev 9
Page 33
UM2179Hardware layout and configuration
NUCLEO-L4A6ZG
CN7
CN10
CN8
CN9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
PC8
PF5
PF3
PD2
PC12
PC11
PC10
PC9
GND
PD3
PD4
PD5
PD6
PD7
PG1
PF9
PF7
PF8
PE3
PE6
PE4
PE2
PE5
D34
D33
D32
GND
D31
D30
D29
D28
GND
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D27
D26
A8
A7
A6
GND
AGND
AVDD
PE0
PB0
PA0
GND
PE14
PE12
PB0
PE15
GND
PB4
PA4
PB3
PB5
PB4
PA4
PB12
PB13
PB15
PC6
PB10
PA2
PA1
PC2
PB1
GND
AGND
AVDDD50
D49
D48
D47
D46
D45
D44
D43
GND
D55
D54
D53
D52
D51
D64
D63
D62
D61
D60
D59
D58
D57
D56
Arduino subset of Zio = A0 to A5 and D0 to D15
Zio extension = A6 to A8 and D16 to D72
USB
OTG
USB
ST-LINK
D65
D66
D67
GND
D68
D69
D70
D71
D72
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
A5
A4
A3
A2
A1
A0
PG0
PD1
PD0
GND
PF0
PF1
PF2
PB6
PB2
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
PC5
PC4
PC1
PC3
PC0
PA3
PF12
PD15
PD14
PA7
PA6
PA5
GND
NC
PB9
PB8
PD9
PD8
PF15
PE13
PF14
PE11
PE9
PF13
PB11
PB10
PE15
PE14
PE12
PE10
PE7
PE8
GND
D8
D9
D10
D11
D12
D13
GND
AVDD
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D35
D36
D37
D38
D39
D40
GND
D41
D42
Figure 13. NUCLEO-L4A6ZG
UM2179 Rev 933/48
47
Page 34
Hardware layout and configurationUM2179
18&/(2/3=*
Figure 14. NUCLEO-L4P5ZG
34/48UM2179 Rev 9
Page 35
UM2179Hardware layout and configuration
NUCLEO-L4R5ZI
CN7
CN10
CN8
CN9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
PC8
PF5
PF3
PD2
PC12
PC11
PC10
PC9
GND
PD3
PD4
PD5
PD6
PD7
PG1
PF9
PF7
PF8
PE3
PE6
PE4
PE2
PE5
D34
D33
D32
GND
D31
D30
D29
D28
GND
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D27
D26
A8
A7
A6
GND
AGND
AVDD
PE0
PB0
PA0
GND
PE14
PE12
PB0
PE15
GND
PB4
PA4
PB3
PB5
PB4
PA4
PB12
PB13
PB15
PC6
PB10
PA2
PA1
PC2
PB1
GND
AGND
AVDDD50
D49
D48
D47
D46
D45
D44
D43
GND
D55
D54
D53
D52
D51
D64
D63
D62
D61
D60
D59
D58
D57
D56
Arduino subset of Zio = A0 to A5 and D0 to D15
Zio extension = A6 to A8 and D16 to D72
USB
OTG
USB
ST-LINK
D65
D66
D67
GND
D68
D69
D70
D71
D72
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
A5
A4
A3
A2
A1
A0
PG0
PD1
PD0
GND
PF0
PF1
PF2
PB6
PB2
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
PC5
PC4
PC1
PC3
PC0
PA3
PF12
PD15
PD14
PA7
PA6
PA5
GND
NC
PB9
PB8
PD9
PD8
PF15
PE13
PF14
PE11
PE9
PF13
PB11
PB10
PE15
PE14
PE12
PE10
PE7
PE8
GND
D8
D9
D10
D11
D12
D13
GND
AVDD
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D35
D36
D37
D38
D39
D40
GND
D41
D42
Figure 15. NUCLEO-L4R5ZI
UM2179 Rev 935/48
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Hardware layout and configurationUM2179
NUCLEO-L4R5ZI-P
CN7
CN10
CN8
CN9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
PC8
PF5
PF3
PD2
PC12
PC11
PC10
PC9
GND
PD3
PD4
PD5
PD6
PD7
PG1
PF9
PF7
PF8
PE3
PE6
PE4
PE2
PE5
D34
D33
D32
GND
D31
D30
D29
D28
GND
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D27
D26
A8
A7
A6
GND
AGND
AVDD
PE0
PB0
PA0
GND
PE14
PE12
PB0
PE15
GND
PB4
PA4
PB3
PB5
PB4
PA4
PB12
PB13
PB15
PC6
PB10
PA2
PA1
PC2
PB1
GND
AGND
AVDDD50
D49
D48
D47
D46
D45
D44
D43
GND
D55
D54
D53
D52
D51
D64
D63
D62
D61
D60
D59
D58
D57
D56
Arduino subset of Zio = A0 to A5 and D0 to D15
Zio extension = A6 to A8 and D16 to D72
USB
OTG
USB
ST-LINK
D65
D66
D67
GND
D68
D69
D70
D71
D72
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
A5
A4
A3
A2
A1
A0
PG0
PD1
PD0
GND
PF0
PF1
PF2
PB6
PB2
VIN
GND
GND
+5V
+3V3
RESET
IOREF
NC
PC5
PC4
PC1
PC3
PC0
PA3
PF12
PD15
PD14
PA7
PA6
PA5
GND
NC
PB9
PB8
PD9
PD8
PF15
PE13
PF14
PE11
PE9
PF13
NC
PB10
PE15
PE14
PE12
PE10
PE7
PE8
GND
D8
D9
D10
D11
D12
D13
GND
AVDD
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D35
D36
D37
D38
D39
D40
GND
D41
D42
Figure 16. NUCLEO-L4R5ZI-P
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UM2179Hardware layout and configuration
5.15 ST Zio connectors
The connectors CN7, CN8, CN9 and CN10 are female on top side and male on bottom side
of the STM32 Nucleo-144 board.
designed for ARDUINO
®
Caution:The I/Os of the STM32 microcontroller are 3.3 V compatible, while ARDUINO® Uno V3 is
5 V compatible.
Tabl e 11 shows the STM32 pin assignments on the ST Zio connectors for the NUCLEO-
L496ZG, NUCLEO-L496ZG-P, NUCLEO-L4A6ZG, NUCLEO-L4P5ZG, NUCLEO-L4R5ZI
and NUCLEO-L4R5ZI-P.
They include support for ARDUINO® Uno V3. Most shields
Uno V3 can fit to the STM32 Nucleo-144 board.
UM2179 Rev 937/48
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Hardware layout and configurationUM2179
Table 11. ST Zio connectors pin assignments
PinPin nameSignal nameSTM32 pinFunctionRemark
Left connectors
1NCNC
-
-
3IOREFIOREF3.3 V Ref
5RESETRESETNRSTRESET
7+3.3 V+3.3 V
3.3 V
input/output
9+5 V+5 V5 V output
11GNDGND
-
ground
13GNDGND
CN8
15V
IN
V
IN
Power input
2D43SDMMC_D0PC8
4D44
SDMMC_D1/
I2S_A_CKIN
6D45SDMMC_D2PC10
PC9
SDMMC/I2S_A
8D46SDMMC_D3PC11
10D47SDMMC_CKPC12
12D48SDMMC_CMDPD2
Arduino
support
-
CN9
14D49I/OPF3
I/O
16D50I/OPF5
1A0ADCPA3ADC12_IN8
3A1ADCPC0ADC123_IN1
5A2ADCPC3ADC123_IN4
7A3ADCPC1ADC123_IN2
9A4
11A5
(1)
(1)
ADCPC4ADC12_IN13
ADCPC5ADC12_IN14
13D72COMP1_INPPB2COMP
15D71COMP2_INP
PB6
17D70I2C_B_SMBAPF2
I2C_2
19D69I2C_B_SCLPF1
21D68I2C_B_SDAPF0
23GNDGND-ground
25D67CAN_RXPD0
CAN_1
27D66CAN_TXPD1
29D65I/OPG0I/O
2D51USART_B_SCLKPD7USART_2
Arduino
support
-
38/48UM2179 Rev 9
Page 39
UM2179Hardware layout and configuration
Table 11. ST Zio connectors pin assignments (continued)
PinPin nameSignal nameSTM32 pinFunctionRemark
4D52USART_B_RXPD6
CN9
CN7
6D53USART_B_TXPD5
USART_2
8D54USART_B_RTSPD4
10D55USART_B_CTSPD3
12GNDGND-ground
14D56SAI_A_MCLK
PE2
16D57SAI_A_FSPE4
SAI_1_A
18D58SAI_A_SCKPE5
20D59SAI_A_SDPE6
22D60SAI_B_SDPE3
24D61SAI_B_SCKPF8
SAI_1_B
26D62SAI_B_MCLKPF7
28D63SAI_B_FSPF9
30D64I/OPG1I/O
Right connectors
1D16I2S_A_MCKPC6
3D17I2S_A_SDPB15
SAI_2_A
5D18I2S_A_CKPB13
7D19I2S_A_WSPB12
9D20I2S_B_WSPA4
11D21I2S_B_MCKPB4
13D22
15D23
I2S_B_SD/
SPI_B_MOSI
I2S_B_CK/
SPI_B_SCK
PB5
PB3
SAI_1_B/
(2)
SPI3
17D24SPI_B_NSSPA4
19D25SPI_B_MISOPB4
-
-
2D15I2C_A_SCLPB8I2C1_SCL
4D14I2C_A_SDAPB9I2C1_SDA
6AREFAREF
VREF+
(3)
-
8GNDGNDground
10D13SPI_A_SCKPA5SPI1_SCK
12D12SPI_A_MISOPA6SPI1_MISO
14D11
SPI_A_MOSI/
TIM_E_PWM1
PA7
SPI1_MOSI/
TIM17_CH1
UM2179 Rev 939/48
Arduino
support
47
Page 40
Hardware layout and configurationUM2179
Table 11. ST Zio connectors pin assignments (continued)
PinPin nameSignal nameSTM32 pinFunctionRemark
CN7
CN10
16D10
SPI_A_CS/
TIM_B_PWM3
PD14
SPI1_CS/
TIM4_CH3
20D8I/OPF12-
1AVDDAVDD
3AGNDAGNDAnalog ground
-
Analog VDD
5GNDGNDground
7A6ADC_A_INPB1ADC12_IN16
9A7ADC_B_INPC2ADC123_IN3
11A8ADC_C_INPA1ADC12_IN6
13D26QSPI_CSPA2
15D27QSPI_CLKPB10
(4)
(4)
QSPI_BK1
QSPI_CLK
17GNDGND-ground
PE14
(4)
(4)
(4)
(4)
QSPI_BK1
19D28QSPI_BK1_IO3PE15
21D29QSPI_BK1_IO1PB0
23D30QSPI_BK1_IO0PE12
25D31QSPI_BK1_IO2
27GNDGND-ground
29D32TIMER_C_PWM1PA0
31D33TIMER_D_PWM1PB0
(4)
(4)
TIM2_CH1
TIM3_CH3
33D34TIMER_B_ETRPE0TIM4_ETR
Arduino
support18D9TIMER_B_PWM2PD15TIM4_CH4
-
2D7I/OPF13-
4D6TIMER_A_PWM1PE9TIM1_CH1
6D5TIMER_A_PWM2PE11TIM1_CH2
8D4I/OPF14-
10D3TIMER_A_PWM3PE13TIM1_CH3
12D2I/OPF15-
14D1USART_A_TXPD8
16D0USART_A_RXPD9
18D42TIMER_A_PWM1NPE8TIM1_CH1N
20D41TIMER_A_ETRPE7TIM1_ETR
22GNDGND-ground
24D40TIMER_A_PWM2NPE10TIM1_CH2N
26D39TIMER_A_PWM3NPE12
40/48UM2179 Rev 9
Arduino
support
USART3
-
(4)
TIM1_CH3N
Page 41
UM2179Hardware layout and configuration
Table 11. ST Zio connectors pin assignments (continued)
PinPin nameSignal nameSTM32 pinFunctionRemark
28D38I/OPE14
30D37TIMER_A_BKIN1PE15
CN10
32D36TIMER_C_PWM2PB10
34D35TIMER_C_PWM3PB11
1. To be compatible with the previous versions of the ARDUINO® Uno V3 board, A4/A5 do not support I2C.
2. I2S_B group has the same port as SAI_B group, but they have a different pin map.
3. V
4. QSPI signals (PA2, PB10, PE15, PB0, PE12 and PE14) are shared with timer signals on CN10.
5. PB11 is not available on ‘-P’ suffixed boards.
is not connected to CN7 by default.
REF+
(4)
(4)
(4)
(5)
I/O
TIM1_BKIN1
-
TIM2_CH3
TIM2_CH4
5.16 ST morpho connector
The ST morpho connector consists in male pin header footprints CN11 and CN12 (not
soldered by default). They can be used to connect the STM32 Nucleo-144 board to an
extension board or a prototype/wrapping board placed on top of the STM32 Nucleo-144
board. All signals and power pins of the STM32 are available on the ST morpho connector.
This connector can also be probed by an oscilloscope, logical analyzer or voltmeter.
Tabl e 12 shows the pin assignments for the STM32 on the ST morpho connector.
CN11 odd pinsCN11 even pinsCN12 odd pinsCN12 even pins
PinPin namePinPin namePinPin namePinPin name
1PC102PC111PC92PC8
3PC124PD23PB84PC6
5V
7
9PF610 - 9GND10PD8
11PF712IOREF11PA512PA12
13PA13
15PA14
17PA1518+5 V17PB618PB11
19GND20GND19PC720GND
Table 12. ST morpho connector pin assignments
DD
PH3-
BOOT0
(1)
(4)
(4)
6E5V5PB96PC5
8GND7V
14RESET13PA614PA11
16+3.3 V15PA716PB12
(2)
8
REF+
U5V
(3)
21PB722GND21PA922PB2
23PC1324V
IN
23PA824PB1
25PC1426-25PB1026PB15
27PC1528PA027PB428PB14
29PH030PA129PB530PB13
UM2179 Rev 941/48
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Hardware layout and configurationUM2179
Table 12. ST morpho connector pin assignments (continued)
CN11 odd pinsCN11 even pinsCN12 odd pinsCN12 even pins
PinPin namePinPin namePinPin namePinPin name
31PH132PA431PB332AGND
33V
BAT
34PB033PA1034PC4
35PC236PC135PA236PF5
37PC338PC037PA338PF4
39PD440PD339GND40PE8
41PD542PG241PD1342PF10
43PD644PG343PD1244PE7
45PD746PE245PD1146PD14
47PE348PE447PE1048PD15
49GND50PE549PE1250PF14
51PF152PF251PE1452PE9
53PF054PF853PE1554GND
55PD156PF955PE1356PE11
57PD058PG157PF1358PF3
59PG060GND59PF1260PF15
61PE162PE661PG1462PF11
63PG964PG15
(5)
63GND64PE0
65PG1266PG1065PD1066PG8
67-68PG1367 PG7 68 PG5
69PD970PG1169PG470PG6
1. Default state of BOOT0 is 0. It can be set to 1 when a jumper is plugged on the pins 5-7 of CN11.
2. V
3. U5V is the +5V power signal, coming from the ST-LINK/V2-1 USB connector. It rises before the +5V signal
4. PA13 and PA14 are shared with SWD signals connected to ST-LINK/V2-1. If ST-LINK part is not cut, it is
5. PB11 and PG15 are not available on the ‘-P’ suffixed boards.
is not connected to CN12 by default.
REF+
of the board.
not recommended to use them as I/O pins.
5.17 Bootloader limitation
5.17.1 Bootloader operation
Boot from system Flash memory runs bootloader code stored in the system Flash memory
protected against writing and erasing. This allows in-system programming (ISP) with
flashing of the STM32 user Flash memory. It also allows writing data into the RAM. The data
is written via the USART, SPI, I
42/48UM2179 Rev 9
2
C, USB or CAN communication interface.
Page 43
UM2179Hardware layout and configuration
5.17.2 Bootloader identification
The bootloader version is identified by reading the bootloader ID at address 0x1FFF 6FFE:
•the bootloader ID is 0x91 for bootloader version V9.1.
•the bootloader ID is 0x92 for bootloader version V9.2.
5.17.3 Bootloader limitation
The limitation existing in bootloader V9.1 causes user Flash memory data to get randomly
corrupted when written via the bootloader SPI interface.
As a result, during bootloader SPI Write Flash operation, some random 64-bits (2 doublewords) may be left blank at 0xFF.
5.17.4 Affected parts
The STM32L496ZGT6, STM32L496ZGT6P, and STM32L4R5ZIT6 parts respectively
soldered on the NUCLEO-L496ZG, NUCLEO-L496ZG-P, and NUCLEO-L4R5ZI main
boards are marked with a date code corresponding to their manufacturing dates.
The STM32L496ZGT6, STM32L496ZGT6P, and STM32L4R5ZIT6 parts with a date code
prior or equal to week 37 of 2017 are fitted with bootloader V9.1. They are affected by the
limitation described in
Section 5.17.5.
Section 5.17.3 and require one of the workarounds proposed in
The parts with a date code equal to week 38 of 2017 or later contain bootloader V9.2. They
are not affected by the limitation.
The STM32L4P5ZGT6 soldered on the NUCLEO-L4P5ZG main board is fitted with
bootloader V9.0.
To locate the visual date code information on the STM32L496ZGT6, STM32L496ZGT6P, or
STM32L4R5ZIT6 package, refer to the Package Information section in the data sheet
available at www.st.com. The date code related portion of the package marking is in the
Y
WW format, where Y is the last digit of the year and WW is the week number. For
example, a part manufactured in week 38 of 2017 bears the 7
5.17.5 Workarounds
Three workarounds are proposed to overcome the limitation existing with bootloader V9.1.
Workaround 1
Add a delay between sending a Write command and its ACK request. The delay duration
must be the duration of the 256-byte Flash-write time.
Workaround 2
Read back after each write operation (256 bytes or end of user code flashing) and, in case
of error, perform the write operation again.
Workaround 3
38 date code.
Using the bootloader, load a patch code in RAM to write in Flash memory through the same
Write Memory write protocol as the bootloader This patch is provided by
STMicroelectronics. The patch code is available for download from the www.st.com website
with a readme.txt file containing the instructions of use.
UM2179 Rev 943/48
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Page 44
Board revision history and limitationsUM2179
Appendix A Board revision history and limitations
Table 13. Board revision history and limitations
BoardVersionRevision detailsKnown limitations
A4/A5 on ARDUINO
MB1312A-04Initial version
MB1312 (SMPS)A-03
Initial version for
NUCLEO-L496ZG-P
connector CN9 cannot be used as
2
C function.
I
A4/A5 on ARDUINO
connector CN9 cannot be used as
2
C function.
I
®
Uno V3
®
Uno V3
44/48UM2179 Rev 9
Page 45
UM2179Federal Communications Commission (FCC) and Industry Canada (IC) Compliance
Appendix B Federal Communications Commission (FCC)
and Industry Canada (IC) Compliance
This kit is designed to allow:
•(1) Product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished
product and
•(2) Software developers to write software applications for use with the end product.
This kit is not a finished product and when assembled may not be resold or otherwise
marketed unless all required FCC equipment authorizations are first obtained.
Operation is subject to the condition that this product not cause harmful interference to
licensed radio stations and that this product accept harmful interference. Unless the
assembled kit is designed to operate under part 15, part 18 or part 95 of 47 CFR,
Chapter I (“FCC Rules”), the operator of the kit must operate under the authority of an
FCC license holder or must secure an experimental authorization under part 5 of this
chapter.
Expanded document scope to the NUCLEO-L4A6ZG product:
– Updated Introduction
– Updated Table 1: Ordering information and Table 11:
NUCLEO-L496ZG, NUCLEO-L496ZG-P, NUCLEO-L4R5ZI
and NUCLEO-L4A6ZG pin assignments
– Added Figure 13: NUCLEO-L4A6ZG
Expanded document scope to the NUCLEO-L4R5ZI-P product:
– Updated Introduction
– Updated Section 6.5.4: SMPS power supply
– Updated Table 1: Ordering information and Table 11:
NUCLEO-L496ZG, NUCLEO-L496ZG-P, NUCLEO-L4R5ZI,
NUCLEO-L4R5ZI-P and NUCLEO-L4A6ZG pin assignments
– Added Figure 15: NUCLEO-L4R5ZI-P
46/48UM2179 Rev 9
Page 47
UM2179Revision history
Table 14. Document revision history (continued)
DateRevisionChanges
Added a caution about the power sequence not being
respected when using 1V8 MCU_VDD in Section 5.5.4: SMPS
power supply.
17-Sep-20198
26-Nov-20199
Reorganized the beginning of the document from Introduction
to Section 4: Conventions . Updated the document title.
Updated Section 1: Features, Table 1: Ordering information,
and Table 2: Codification explanation.
Expanded document scope to the NUCLEO-L4P5ZG product:
– Updated Introduction
– Updated Table 1: Ordering information and Table 11: ST Zio
Section 5.5.2: External power supply inputs, Section 5.11:
LPUART1 communication, and Section 5.13: Solder bridges
and jumpers.
UM2179 Rev 947/48
47
Page 48
UM2179
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