L6928
Fi
HIGH EFFICIENCY MONOLITHIC SYNCHRONOUS
STEP DOWN REGULATOR
1 FEATURES
■ 2V TO 5.5V BATTERY INPUT RANGE
■ HIGH EFFICIENCY: UP TO 95%
■ INTERNAL SYNCHRONOUS SWITCH
■ NO EXTERNAL SCHOTTKY REQUIRED
■ EXTREMELY LOW QUIESCENT CURRENT
■ 1µA MAX SHUTDOWN SUPPLY CURRENT
■ 800mA MAX OUTPUT CURRENT
■
ADJUSTABLE OUTPUT VOLTAGE FROM 0.6V
■ LOW DROP-OUT OPERATION: UP TO100%
DUTY CYCLE
■ SELECTABLE LOW NOISE/LOW
CONSUMPTION MODE AT LIGHT LOAD
■ POWER GOOD SIGNAL
■ ±1% OUTPUT VOLTAGE ACCURACY
■ CURRENT-MODE CONTROL
■ 1.4MHz SWITCHING FREQUENCY
■ EXTERNALLY SYNCHRONIZABLE FROM
1MHz TO 2MHz
■ OVP
■ SHORT CIRCUIT PROTECTION
2 APPLICATIONS
■ BATTERY-POWERED EQUIPMENTS
■ PORTABLE INSTRUMENTS
■ CELLULAR PHONES
■ PDAs AND HAND HELD TERMINALS
■ DSC
■ GPS
gure 1. Packages
MSOP8
VFQFPN8
Table 1. Order Codes
Part Number Package
L6928D MSOP8 in Tube
L6928D013TR MSOP8 in Tape & Reel
L6928Q1 VFQFPN8 in Tube
L6928Q1TR VFQFPN8 in Tape & Reel
3 DESCRIPTION
The device is dc-dc monolithic regulator specifically
designed to provide extremely high efficiency.
L6928 supply voltage can be as low as 2V allowing
its use in single Li-ion cell supplied applications. Output voltage can be selected by an external divider
down to 0.6V. Duty Cycle can saturate to 100% allowing low drop-out operation. The device is based
on a 1.4MHz fixed-frequency, current mode-architecture. Low Consumption Mode operation can be selected at light load conditions, allowing switching
losses to be reduced. L6928 is externally synchronizable with a clock which makes it useful in noise-sensitive applications. Other features like Powergood,
Overvoltage protection, Shortcircuit protection and
Thermal Shutdown (150°C) are also present.
Figure 2. Application Test Circuit
November 2005
V
=2V to 5.5V
IN
C1
10µF
6.3V
SYNC LX
V
CC
RUN
D01IN1528
5
7
6
1
24
COMP GND
C2
220pF
8
3
L 4.7µH
PGOOD
VFB
R3
500K
R2
200K
R1
100K
=1.8V
V
OUT
C4
10µF
6.3V
Rev. 3
1/10
L6928
Table 2. Absolute Maximum Ratings
Symbol Parameter Value Unit
V
V
V
V
V
V
V
Ptot Power dissipation at Tamb=70°C0.45W
Tj Junction operating temperature range for MSOP8 package -40 to 150 °C
Tstg Storage temperature range -65 to 150 °C
LX Pin Maximum Withstanding Voltage Range Test Condition: CDF-
Other pins ±2000 V
Figure 3. Pin Connection
Input voltage -0.3 to 6 V
6
Output switching voltage -1 to V
5
Shutdown -0.3 to V
1
Feedback voltage -0.3 to V
3
Error amplifier output voltage -0.3 to V
2
PGOOD -0.3 to V
8
Synchronization mode selector -0.3 to V
7
CC
±1000 V
AEC-Q100-002- “Human Body Model” Acceptance Criteria:
“Normal Performance’
CC
CC
CC
CC
CC
V
V
V
V
V
V
RUN
COMP
VFB
GND
1
2
3
4LX
D01IN1239AMOD
PGOOD8
SYNC
7
V
6
5
CC
Table 3. Thermal Data
Symbol Parameter Value Unit
R
th j-amb
Thermal Resistance Junction to Ambient for MSOP8 Max. 180 °C/W
Table 4. Pin Functions
N Name Description
1 RUN Shutdown input. When connected to a low level (lower than 0.4V) the device stops working.
2 COMP Error amplifier output. A compensation network has to be connected to this pin. Usually a
3 VFB Error amplifier inverting input. The output voltage can be adjusted from 0.6V up to the input
4 GND Ground.
5 LX Switch output node. This pin is internally connected to the drain of the internal switches.
6 VCC Input voltage. The start up input voltage is 2.2V (typ) while the operating input voltage range is
7 SYNC Operating mode selector input. When high (higher than 1.3V) the Low Consumption Mode is
8 PGOOD Power good comparator output. It is an open drain output. A pull-up resistor should be
When high (higher than 1.3V) the device is enabled.
220pF capacitor is enough to guarantee the loop stability.
voltage by connecting this pin to an external resistor divider.
from 2V to 5.5V. An internal UVLO circuit realizes a 100mV (typ.) hysteresis.
selected. When low (lower than 0.5V) the Low Noise Mode is selected. If connected with an
appropriate external synchronization signal (from 1MHz up to 2MHz) the internal
synchronization circuit is activated and the device works at the same switching frequency.
connected between PGOOD and VOUT (or VCC depending on the requirements). The pin is
forced low when the output voltage is lower than 90% of the regulated output voltage and goes
high when the output voltage is greater than 90% of the regulated output voltage. If not used the
pin can be left floating.
2/10
L6928
Table 5. Electrical Characteristics
= 25°C, VCC = 3.6V unless otherwise specified); (*) Specification Referred to Tj from -40 to +125°C
(T
j
Symbol Parameter Test Condition Min Typ Max Unit
V
cc
V
cc ON
V
cc OFF
V
cc hys
R
p
R
n
I
lim
V
out
f
osc
f
sync
DC CHARACTERISTICS
I
q
I
sh
I
lx
ERROR AMPLIFIER CHARACTERISTICS
V
fb
I
fb
RUN
V
run_H
V
run_L
I
run
SYNC/MODE FUNCTION
V
sync_H
V
sync_L
PGOOD SECTION
V
PGOOD
∆V
PGOOD
V
Pgood(low)
I
LK-PGOOD
PROTECTIONS
HOVP Hard overvoltage threshold V
Note: 1. Guaranteed by design
2. Specification over the -40 to +125°C T
Operating input voltage After Turn on * 2 5.5 V
Turn On threshold 2.2 V
Turn Off threshold 2 V
Hysteresis 100 mV
High side Ron V
= 3.6V, I
cc
=100mA 240 300 mΩ
lx
* 400
Low side Ron V
= 3.6V, I
cc
=100mA 215 300 mΩ
lx
* 400
Peak current limit Vcc = 3.6V 1 1.2 1.5 A
*0.85 1.65
Valley current limit V
= 3.6V 1 1.4 1.7 A
cc
* 0.9 1.85
Output voltage range V
fb
Vcc V
Oscillator frequency 1.4 MHz
Sync mode clock
Quiescent current (low
noise mode)
Quiescent current (low
cunsumption mode)
(1)
V
= 0V, no load,
sync
V
> 0.6V
FB
V
= Vcc, no load,
sync
VFB > 0.6V
Shutdown current RUN to GND, V
LX leakage current
(1)
RUN to GND, V
V
= 5.5V
cc
RUN to GND, V
V
= 5.5V
cc
*2550µA
= 5.5V 0.2 µA
cc
= 5.5V,
LX
= 0V,
LX
12MHz
230 µA
1 µA
1 µA
Voltage feedback 0.593 0.600 0.607 V
(1)
Feedback input current
VFB = 0.6V 25 nA
RUN threshold high 1.3 V
RUN threshold low 0.4 V
RUN input current
(1)
25 nA
Sync mode threshold high 1.3 V
Sync mode threshold low 0.5 V
Power Good Threshold V
Power Good Hysteresis V
OUT
OUT
= V
= V
fb
fb
90 %Vout
4%Vout
Power Good Low Voltage Run to GND 0.4 V
Power Good Leakage
Current
(1)
V
temperature range are assured by design, characterization and statistical correlation.
j
= 3.6V 50 nA
PGOOD
OUT
= V
fb
10 %Vout
(2)
.
3/10
L6928
4 OPERATION DESCRIPTION
The main loop uses slope compensated PWM current mode architecture. Each cycle the high side MOSFET
is turned on, triggered by the oscillator, so that the current flowing through it (the same as the inductor current)
increases. When this current reaches the threshold (set by the output of the error amplifier E/A), the peak current
limit comparator PEAK_CL turns off the high side MOSFET and turns on the low side one until the next clock
cycle begins or the current flowing through it goes down to zero (ZERO CROSSING comparator). The peak inductor current required to trigger PEAK_CL depends on the slope compensation signal and on the output of the
error amplifier.
In particular, the error amplifier output depends on the VFB pin voltage. When the output current increases, the
output capacitor is discharged and so the VFB pin decreases. This produces increase of the error amplifier output, so allowing a higher value for the peak inductor current. For the same reason, when due to a load transient
the output current decreases, the error amplifier output goes low, so reducing the peak inductor current to meet
the new load requirements.
The slope compensation signal allows the loop stability also in high duty cycle conditions (see related section)
Figure 4. Device Block Diagram
RUN
RUN
RUN
COMP
COMP
COMP
COMP
FB
FB
FB
FB
NOISE/
NOISE/
NOISE/
NOISE/
CONSUMPTION
CONSUMPTION
CONSUMPTION
CONSUMPTION
V
V
V
V
REF
REF
REF
REF
0.6V
0.6V
0.6V
0.6V
SYNC
SYNC
SYNC
SYNC
LOW
LOW
LOW
LOW
E/A
E/A
E/A
E/A
OVP
OVP
OVP
OVP
OSCILLATOR
OSCILLATOR
OSCILLATOR
OSCILLATOR
LOOP
LOOP
LOOP
LOOP
CONTROL
CONTROL
CONTROL
CONTROL
RUN
PEAK
PEAK
PEAK
PEAK
CL
CL
CL
CL
GND
GND
GND
GND
SENSE
SENSE
SENSE
SENSE
P
P
P
P
MOS
MOS
MOS
MOS
SLOPE
SLOPE
SLOPE
SLOPE
GND
GND
GND
GND
DRIVER
DRIVER
DRIVER
DRIVER
VCC
VCC
VCC
VCC
POWER
POWER
POWER
POWER
P
P
P
P
MOS
MOS
MOS
MOS
LX
LX
LX
LX
ZERO
ZERO
ZERO
ZERO
CROSSING
CROSSING
CROSSING
CROSSING
GND
GND
GND
GND
VALLEY
VALLEY
VALLEY
VALLEY
CL
CL
CL
CL
Vcc
Vcc
Vcc
Vcc
SENSE
SENSE
SENSE
SENSE
N
N
N
N
MOS
MOS
MOS
MOS
Vcc
Vcc
Vcc
Vcc
GND
GND
GND
GND
POWER
POWER
POWER
POWER
N
N
N
N
MOS
MOS
MOS
MOS
P
P
P
P
GOOD
GOOD
GOOD
GOOD
P
P
P
P
GOOD
GOOD
GOOD
0.9V
0.9V
0.9V
0.9V
GOOD
V
V
V
V
REF
REF
REF
REF
4.1 Modes of Operation
Depending on the SYNC pin value the device can operate in low consumption or low noise mode. If the SYNC
pin is high (higher than 1.3V) the low consumption mode is selected while the low noise mode is selected if the
SYNC pin is low (lower than 0.5V).
4.1.1 Low Consumption Mode
In this mode of operation, at light load, the device operates discontinuously based on the COMP pin voltage, in
order to keep the efficiency very high also in these conditions. While the device is not switching the load discharges the output capacitor and the output voltage goes down. When the feedback voltage goes lower than
the internal reference, the COMP pin voltage increases and when an internal threshold is reached, the device
starts to switch. In these conditions the peak current limit is set approximately in the range of 200mA-400mA,
depending on the slope compensation (see related section).
Once the device starts to switch the output capacitor is recharged. The feedback pin increases and, when it
reaches a value slightly higher than the reference voltage, the output of the error amplifier goes down until a
clamp is activated. At this point, the device stops to switch. In this phase, most of the internal circuitries are off,
so reducing the device consumption down to a typical value of 25
µ
A.
4/10
L6928
4.1.2 Low Noise Mode
If for noise reasons, the very low frequencies of the low consumption mode are undesirable, the low noise mode
can be selected. In low noise mode, the efficiency is a little bit lower compared with the low consumption mode
in very light load conditions but for medium-high load currents the efficiency values are very similar.
Basically, the device switches with its internal free running frequency of 1.4MHz. Obviously, in very light load
conditions, the device could skip some cycles in order to keep the output voltage in regulation.
4.1.3 Synchronization
The device can also be synchronized with an external signal from 1MHz up to 2MHz.
In this case the low noise mode is automatically selected. The device will eventually skip some cycles in very
light load conditions.
The internal synchronization circuit is inhibited in shortcircuit and overvoltage conditions in order to keep the
protections effective (see relative sections).
4.2 Short Circuit Protection
During the device operation, the inductor current increases during the high side turn on phase and decrease
during the high side turn off phase based on the following equations:
VINV
–()
∆I
ON
---------------------------------- -
OUT
T
⋅=
L
ON
V
()
OUT
OFF
-------------------
OUT
T
⋅=
OFF
L
can be very close to zero. In this case ∆ION increases
∆I
In strong overcurrent or shortcircuit conditions the V
and
∆
I
decreases. When the inductor peak current reaches the current limit, the high side mosfet turns off
OFF
and so the T
Anyway, if V
T
the current decays very slowly.
OFF
is reduced down to the minimum value (250ns typ.) in order to reduce as much as possible ∆ION.
ON
is low enough it can be that the inductor peak current further increases because during the
OUT
Due to this reason a second protection that fixes the maximum inductor valley current has been introduced. This
protection doesn't allow the high side MOSFET to turn on if the current flowing through the inductor is higher
that a specified threshold (valley current limit). Basically the T
is increased as much as required to bring the
OFF
inductor current down to this threshold.
So, the maximum peak current in worst case conditions will be:
V
IN
-------- -
I
PEAKIVALLEY
Where IPEAK is the valley current limit (1.4A typ.) and T
⋅+=
L
ON_MIN
T
ON_MIN
is the minimum TON of the high side MOSFET.
4.3 Slope Compensation
In current mode architectures, when the duty cycle of the application is higher than approximately 50%, a pulseby-pulse instability (the so called sub harmonic oscillation) can occur.
To allow loop stability also in these conditions a slope compensation is present. This is realized by reducing the
current flowing through the inductor necessary to trigger the COMP comparator (with a fixed value for the COMP
pin voltage).
With a given duty cycle higher than 50%, the stability problem is particularly present with an higher input voltage
(due to the increased current ripple across the inductor), so the slope compensation effect increases as the input
voltage increases.
From an application point of view, the final effect is that the peak current limit depends both on the duty cycle (if
higher than approximately 40%) and on the input voltage.
5/10
L6928
4.4 Loop Stability
Since the device is realized with a current mode architecture, the loop stability is usually not a big issue. For
most of the application a 220pF connected between the COMP pin and ground is enough to guarantee the stability. In case very low ESR capacitors are used for the output filter, such as multilayer ceramic capacitors, the
zero introduced by the capacitor itself can shift at very high frequency and the transient loop response could be
affected. Adding a series resistor to the 220pF capacitor can solve this problem.
The right value for the resistor (in the range of 50K) can be determined by checking the load transient response
of the device. Basically, the output voltage has to be checked at the scope after the load steps required by the
application. In case of stability problems, the output voltage could oscillates before to reach the regulated value
after a load step.
5 ADDITIONAL FEATURES AND PROTECTIONS
5.1 DROPOUT Operation
The Li-Ion battery voltage ranges from approximately 3V and 4.1V-4.2V (depending on the anode material). In
case the regulated output voltage is from 2.5V and 3.3V, it can be that, close to the end of the battery life, the
battery voltage goes down to the regulated one. In this case the device stops to switch, working at 100% of duty
cycle, so minimizing the dropout voltage and the device losses.
5.2 PGOOD (Power Good Output)
A power good output signal is available. The VFB pin is internally connected to a comparator with a threshold
set at 90% of the of reference voltage (0.6V). Since the output voltage is connected to the VFB pin by a resistor
divider, when the output voltage goes lower than the regulated value, the VFB pin voltage goes lower than 90%
of the internal reference value. The internal comparator is triggered and the PGOOD pin is pulled down.
The pin is an open drain output and so, a pull up resistor should be connected to him.
If the feature is not required, the pin can be left floating.
5.3 ADJUSTABLE OUTPUT VOLTAGE
The output voltage can be adjusted by an external resistor divider from a minimum value of 0.6V up to the input
voltage. The output voltage value is given by:
V
= 0.6 · (1 + R2/R1)
OUT
5.4 OVP (Overvoltage Protection)
The device has an internal overvoltage protection circuit to protect the load.
If the voltage at the feedback pin goes higher than an internal threshold set 10% (typ) higher than the reference
voltage, the low side power mosfet is turned on until the feedback voltage goes lower than the reference one.
During the overvoltage circuit intervention, the zero crossing comparator is disabled so that the device is also
able to sink current.
5.5 THERMAL SHUTDOWN
The device has also a thermal shutdown protection activated when the junction temperature reaches 150°C. In
this case both the high side MOSFET and the low side one are turned off. Once the junction temperature goes
back lower than 95°C, the device restarts the normal operation.
6/10
L6928
6 Package Information
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect. The category of second Level Interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 5. MSOP8 Mechanical Data & Package Dimensions
DIM.
A 1.10 0.043
A1 0.050 0.150 0.002 0.006
A2 0.750 0.850 0.950 0.03 0 .033 0.037
b 0.250 0.400 0.010 0.016
c 0.130 0.230 0.005 0.009
D (1) 2.900 3.000 3.100 0.114 0.118 0.122
E 4.650 4.900 5.150 0.183 0.193 0.20
E1 (1) 2.900 3.000 3.100 0.114 0.118 0.122
e 0.650 0.026
L 0.400 0.550 0.700 0.016 0.022 0.028
L1 0.950 0.037
k 0˚ (min.) 6˚ (max.)
aaa 0.100 0.004
Note: 1. D and F does n ot include mol d flash or prot rusions.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
Mold flash or potrusions sha ll not exceed 0.15m m
(.006inch) per side.
OUTLINE AND
MECHANICAL DATA
MSOP8
(Body 3mm)
7/10
L6928
Figure 6. VFQFPN8 Mechanical Data & Package Dimensions
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 0.80 0.90 1.00 0.0315 0.0354 0.0394
A1 0.02 0.05 0.0008 0.0020
A2 0.70 0.0276
A3 0.20 0.0079
b 0.18 0.23 0.30 0.0071 0.0091 0.0118
D 3.00 0.1181
D2 2.23 2.38 2.48 0.0878 0.0937 0.0976
E 3.00 0.1181
E2 1.49 1.64 1.74 0.0587 0.0646 0.0685
e 0.50 0.0197
L 0.30 0.40 0.50 0.0118 0.0157 0.0197
ddd 0.08 0.0031
OUTLINE AND
MECHANICAL DATA
VFQFPN8 (3x3x1.0 8mm)
Very thin Fine pitch Quad Packages No lead
8/10
7426334 B
Table 6. Revision History
Date Revision Description of Changes
October 2004 1 First Issue.
February 2005 2 Changed from Product Preview to Final datasheet.
L6928
November 2005 3 Updated Table 5. Electrical characteristics.
Added VFQFPN8 package and new part numbers.
9/10
L6928
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
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10/10
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