STMicroelectronics L6598 Technical data

L6598
Fi
HIGH VOLTAGE RESONANT CONTROLLER

1 FEATURES

HIGH VOLTAGE RAIL UP TO 600V
dV/dt IMMUNITY ±50V/ns IN FULL
TEMPERATURE RANGE
DRIVER CURRENT CAPABILITY:
SWITCHING TIMES 80/40ns RISE/FALL WITH
1nF LOAD
CMOS SHUT DOWN INPUT
UNDER VOLTAGE LOCK OUT
SOFT START FREQUENCY SHIFTING
TIMING
SENSE OP AMP FOR CLOSED LOOP
CONTROL OR PROTECTION FEATURES
HIGH ACCURACY CURRENT CONTROLLED
OSCILLATOR
INTEGRATED BOOTSTRAP DIODE
CLAMPING ON Vs
SO16, DIP16 PACKAGES

2 DESCRIPTION

The device is manufactured with the BCD OFF LINE
gure 1. Packages
DIP-16
SO-16N

Table 1. Order Codes

Part Number Package
L6598 DIP-16
L6598D SO-16N
L6598D013TR Tape & Reel
technology, able to ensure voltage ratings up to 600V, making it perfectly suited for AC/DC Adapters and wherever a Resonant Topology can be benefi­cial. The device is intended to drive two P ower MOS, in the classical Half Bridge Topology. A dedicated Timing Section allows the designer to set Soft Start Time, Soft Start and Minimum Frequency. An Error Amplifier, together with the two Enable inputs, are made available. In addition, the integrated Bootstrap Diode and the Zener Clamping on low voltage sup­ply, reduces to a minimum the external parts needed in the applications.

Figure 2. Block Diagram

OP AMP
Ifmin
Ifstart
VCO
+
-
V
REF
V
REF
OPOUT
OPIN-
OPIN+
Rfmin
Rfstart
Cf
June 2004
5
6 7
4
2
3
CONTROL
LOGIC
V
S
12
UV
DETECTION
DEAD
TIME
Iss
BOOTSTRAP
1
Css
DRIVER
DRIVING
LOGIC
HVG
DRIVER
LEVEL
SHIFTER
LVG DRIVER
+
-
+
-
Vthe1
Vthe2
D98IN887A
16
15
14
Vs
11
10
8
9
V
HVG
OUT
LVG
GND
EN1
EN2
BOOT
H.V.
C
BOOT
LOAD
1/17
L6598

Figure 3. Pin Connection

Css
Rfstart
Cf
Rfmin
OPOUT
OPIN-
OPIN+
1 2 3 4 5 6 7 GND
15 14 13 12 11 10
VBOOT16 HVG OUT N.C. V
S
LVG
EN1 8 EN29
D98IN888

Table 2. Thermal Data

Symbol Parameter SO16N DIP16 Unit
R
th j-amb
Thermal Resistance Junction to Ambient 120 80 °C/W

Table 3. Pin Function

N. Name Function
1CSSSoft Start Timing Capacitor 2R 3CfOscillator Frequency Setting - see also R 4R 5OP 6OP 7OP 8 EN1 Half Bridge Latch ed En able
9 EN2 Half Bridge Unlatched Enable 10 GND Ground 11 LVG Low Side Driver Output 12 V 13 N.C. Not Connected 14 OUT High Side Driver Reference 15 HVG High Side Driver Output 16 V
Soft Start Frequency Setting - Low Impedance Voltage Source - See also C
fstart
, R
fmin
fstart
Minimum Oscillation Frequency Setting - Low Impedance Voltage Source - See also C
fmin
Sense OP AMP Output - Low Impedance
out
Sense Op Amp Inverting Input - High Impedance
on-
Sense Op Amp Non Inverting Input - High Impedance
on+
Supply Volatge with Internal Zener Clamp
s
Bootstrapped Supply Voltage
boot
f
f
2/17

Table 4. Absolute Maximum Ratings

Symbol Parameter Value Unit
L6598
V
dV
dV
EN1
I
EN1
I
S
V
LVG
V
OUT
V
HVG
V
BOOT
BOOT/dt
OUT/dt
V
ir
V
ic
, V , I
V
opc
V
opd
V
opo
T
stg
Supply Current at Vcl (*) 25 mA Low Side Output 14.6 V High Side Reference -1 to V High Side Output -1 to V
-18 V
BOOT
BOOT
Floating Supply Voltage 618 V VBOOT pin Slew Rate (repetitive) ±50 V/ns OUT pin Slew Rate (repetitive) ±50 V/ns Forced Input Voltage (pins Rfmin, Rfstart) -0.3 to 5 V Forced Input Volatge (pins Css, Cf) -0.3 to 5 V Enable Input Voltage -0.3 to 5 V
EN2
Enable Input Current ±3 mA
EN2
Sense Op Amp Common Mode Range -0.3 to 5 V Sense Op Amp Differential Mode Range -5 to 5 V Sense Op Amp Output Voltage (forced) 4.6 V Storage Temperature -40 to +150 °C
V
T
T
amb
(*) The device is provided of an internal Clamping Zener between GND and the Vs pin, It must not be supplied by a low impedance voltage
source.
Note : ESD immunity for pins 14, 15 and 16 is guaranteed up to 900 (Human Body Model).
Junction Temperature -40 to +150 °C
j
Ambient Temperature -40 to +1 25 °C

Table 5. Recommended Operating Conditions

Symbol Parameter Value Unit
V
S
V
out
V
boot
f
max
(*) If the condition Vboot - Vout < 18 is guaranteed, Vo ut can range from -3 to 580V.
Supply Voltage 10 to V
(*) High Side Reference -1 to Vboot-V
(*) Floating Supply Rail 500 V
Maximum Switching Frequency 400 kHz
cl
cl
V V
3/17
L6598
Table 6. Electrical Characteristcs
= 12V; V
(V
S
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit SUPPLY VOLTAGE
V
suvp
V
suvn
V
suvh
V
cl
I
su
I
q
HIGH VOLTAGE SECTION
I
bootleak
I
outleak
R
don
HIGH/LOW SIDE DRIVERS
I
hvgso
I
hvgsi
I
lvgso
I
lvgsi
t
rise
t
15,11 Low/High Side Output Rise
fall
OSCILLATOR
DC 14 Output Duty Cycle 48 50 52 %
f
min
f
start
V
t
2, 4 Voltage to Current Converters
ref
d
TIMING SECTION
k
ss
SENSE OP AMP
6, 7 Input Bias Current 0.1 µA
io
ic
V
R
I
I
out+
V
l
IB
out
out-
BOOT
- V
OUT
= 12V; T
amb
= 25°C)
12 VS Turn On Threshold 10 10.7 11.4 V
VS Turn Off Threshold 7.3 8 8.7 V Supply Voltage Under Voltage
2.7 V
hysteresis Supply Voltage Clamping 14.6 15.6 16.6 V Start Up Current Vs < V Quiescent Current, fout =
Vs > V
suvn suvp
23mA
250 µA
60kHz, no load
16 BOOT pin Leakage Current V 14 OUT pin Leakage Current V
= 580V 5 µA
BOOT
= 562V 5 µA
OUT
16 Bootstrap Driver On Resistance 100 150 300
15 High Side Driver Source Current V
High Side Driver Sink Current V
11 Low Side Driver Source Current V
Low Side Driver Sink Current V
HVG-VOUT HVG-VBOOT LVG-GND LVG - VS
C
load
= 0 170 250 mA
= 0 300 450 mA
= 0 170 250 mA
= 0 300 450 mA
= 1nF 80 120 ns
Time
C
= 1nF 40 80 ns
load
Minimum Output Oscilla tio n
Cf = 470pF; R
= 50k 58.2 60 61.8 kHz
fmin
Frequency Soft Start Ou tpu t Osc illa tio n
Frequency
Cf = 470pF; R R
= 47k
fstart
fmin
= 50k;
114 120 126 kHz
1.922.1V
Threshold
14 Dead Time between Low and
0.2 0.27 0.35 µs
High Side Conduction
1 Soft Start Timing consta nt Css = 330nF 0.115 0.15 0.185 s/µF
Input Offset Voltage -10 10 mV
5 Output Re sis tan ce 200 300
Source Output Current V Sink Output Current V
6,7 OP AMP input common mode
= 4.5V 1 mA
out
= 0.2V 1 mA
out
-0.2 3 V
range
4/17
L6598
9
Table 6. Electrical Characteristcs (continued) (V
= 12V; V
S
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
GBW Sense Op Amp Gain Band
G
dc
COMPARATORS
V
the1
V
the2
t
pulse
(*) Guaranted by design

Figure 4. EN2 Timing Diagrams

BOOT
- V
OUT
= 12V; T
amb
= 25°C)
0.5 1 MHz
Width Product (*) DC Open Loop Gain 60 80 dB
8 Enabling Comparator Threshold 0.56 0.6 0.64 V 9 Enabling Comparator Threshold 1.05 1.2 1.35 V
8,9 Minimum Pulse lenght 200 ns
V
S
f
OUT
f
start
f
min
EN2
V
Css

Figure 5. EN1 Timing Diagrams

HVG
LVG
EN1
EN2
T
SS
T
SS
D98IN88
D98IN890
5/17
L6598

Figure 6. Oscillator/Output Timing Diagram

C
f
HVG
LVG
D98IN897

3 BLOCK’S DIAGRAM DESCRIPTION

3.1 High/Low Side driving section

An High and Low Side driving Section provide the proper driving to the external Power MOS or IGBT. An high sink/source driving current (450 /250 mA typ) ensure fast switc hing times also when size 4 Power MOS are used. The internal logic ensures a minimum dead time to avoid cross-conduction of the power devices.

3.2 Timing and Oscillator Section

The device is provided of a soft start function. It consists in a period of time, TSS, in which the switching frequen­cy shifts from f
start
to f
. This feature is explained in the following description (ref. fig.7 and fig.8).
min

Figure 7. Soft Start and frequency shifting block

Iss
IfminIfstart
Iosc
gm OSC
Css
6/17
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