technology, able to ensure voltage ratings up to
600V, making it perfectly suited for AC/DC Adapters
and wherever a Resonant Topology can be beneficial. The device is intended to drive two P ower MOS,
in the classical Half Bridge Topology. A dedicated
Timing Section allows the designer to set Soft Start
Time, Soft Start and Minimum Frequency. An Error
Amplifier, together with the two Enable inputs, are
made available. In addition, the integrated Bootstrap
Diode and the Zener Clamping on low voltage supply, reduces to a minimum the external parts needed
in the applications.
Figure 2. Block Diagram
OP AMP
Ifmin
Ifstart
VCO
+
-
V
REF
V
REF
OPOUT
OPIN-
OPIN+
Rfmin
Rfstart
Cf
June 2004
5
6
7
4
2
3
CONTROL
LOGIC
V
S
12
UV
DETECTION
DEAD
TIME
Iss
BOOTSTRAP
1
Css
DRIVER
DRIVING
LOGIC
HVG
DRIVER
LEVEL
SHIFTER
LVG DRIVER
+
-
+
-
Vthe1
Vthe2
D98IN887A
16
15
14
Vs
11
10
8
9
V
HVG
OUT
LVG
GND
EN1
EN2
BOOT
H.V.
C
BOOT
LOAD
1/17
L6598
Figure 3. Pin Connection
Css
Rfstart
Cf
Rfmin
OPOUT
OPIN-
OPIN+
1
2
3
4
5
6
7GND
15
14
13
12
11
10
VBOOT16
HVG
OUT
N.C.
V
S
LVG
EN18EN29
D98IN888
Table 2. Thermal Data
SymbolParameterSO16NDIP16Unit
R
th j-amb
Thermal Resistance Junction to Ambient12080°C/W
Table 3. Pin Function
N.NameFunction
1CSSSoft Start Timing Capacitor
2R
3CfOscillator Frequency Setting - see also R
4R
5OP
6OP
7OP
8EN1Half Bridge Latch ed En able
9EN2Half Bridge Unlatched Enable
10GNDGround
11LVGLow Side Driver Output
12V
13N.C.Not Connected
14OUTHigh Side Driver Reference
15HVGHigh Side Driver Output
16V
Soft Start Frequency Setting - Low Impedance Voltage Source - See also C
fstart
, R
fmin
fstart
Minimum Oscillation Frequency Setting - Low Impedance Voltage Source - See also C
fmin
Sense OP AMP Output - Low Impedance
out
Sense Op Amp Inverting Input - High Impedance
on-
Sense Op Amp Non Inverting Input - High Impedance
on+
Supply Volatge with Internal Zener Clamp
s
Bootstrapped Supply Voltage
boot
f
f
2/17
Table 4. Absolute Maximum Ratings
SymbolParameterValueUnit
L6598
V
dV
dV
EN1
I
EN1
I
S
V
LVG
V
OUT
V
HVG
V
BOOT
BOOT/dt
OUT/dt
V
ir
V
ic
, V
, I
V
opc
V
opd
V
opo
T
stg
Supply Current at Vcl (*)25 mA
Low Side Output14.6V
High Side Reference-1 to V
High Side Output-1 to V
-18V
BOOT
BOOT
Floating Supply Voltage618V
VBOOT pin Slew Rate (repetitive)±50V/ns
OUT pin Slew Rate (repetitive)±50V/ns
Forced Input Voltage (pins Rfmin, Rfstart)-0.3 to 5V
Forced Input Volatge (pins Css, Cf)-0.3 to 5V
Enable Input Voltage-0.3 to 5V
EN2
Enable Input Current±3mA
EN2
Sense Op Amp Common Mode Range-0.3 to 5V
Sense Op Amp Differential Mode Range-5 to 5V
Sense Op Amp Output Voltage (forced)4.6V
Storage Temperature-40 to +150°C
V
T
T
amb
(*) The device is provided of an internal Clamping Zener between GND and the Vs pin, It must not be supplied by a low impedance voltage
source.
Note : ESD immunity for pins 14, 15 and 16 is guaranteed up to 900 (Human Body Model).
Junction Temperature-40 to +150°C
j
Ambient Temperature-40 to +1 25°C
Table 5. Recommended Operating Conditions
SymbolParameterValueUnit
V
S
V
out
V
boot
f
max
(*) If the condition Vboot - Vout < 18 is guaranteed, Vo ut can range from -3 to 580V.
Supply Voltage10 to V
(*)High Side Reference-1 to Vboot-V
(*)Floating Supply Rail500V
Maximum Switching Frequency400kHz
cl
cl
V
V
3/17
L6598
Table 6. Electrical Characteristcs
= 12V; V
(V
S
SymbolPinParameterTest ConditionMin. Typ.Max.Unit
SUPPLY VOLTAGE
V
suvp
V
suvn
V
suvh
V
cl
I
su
I
q
HIGH VOLTAGE SECTION
I
bootleak
I
outleak
R
don
HIGH/LOW SIDE DRIVERS
I
hvgso
I
hvgsi
I
lvgso
I
lvgsi
t
rise
t
15,11 Low/High Side Output Rise
fall
OSCILLATOR
DC14Output Duty Cycle485052%
f
min
f
start
V
t
2, 4Voltage to Current Converters
ref
d
TIMING SECTION
k
ss
SENSE OP AMP
6, 7Input Bias Current0.1µA
io
ic
V
R
I
I
out+
V
l
IB
out
out-
BOOT
- V
OUT
= 12V; T
amb
= 25°C)
12VS Turn On Threshold1010.711.4V
VS Turn Off Threshold7.388.7V
Supply Voltage Under Voltage
2.7V
hysteresis
Supply Voltage Clamping14.615.616.6V
Start Up CurrentVs < V
Quiescent Current, fout =
An High and Low Side driving Section provide the proper driving to the external Power MOS or IGBT. An high
sink/source driving current (450 /250 mA typ) ensure fast switc hing times also when size 4 Power MOS are used.
The internal logic ensures a minimum dead time to avoid cross-conduction of the power devices.
3.2 Timing and Oscillator Section
The device is provided of a soft start function. It consists in a period of time, TSS, in which the switching frequency shifts from f
start
to f
. This feature is explained in the following description (ref. fig.7 and fig.8).
min
Figure 7. Soft Start and frequency shifting block
Iss
IfminIfstart
Iosc
gmOSC
Css
6/17
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