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VND5004A-E
Datasheet (ST)
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Datasheet VND5004A-E, VND5004ASP30-E Datasheet (ST)

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Features
VND5004A-E
VND5004ASP30-E
Double 4mΩ high side driver with analog current sense
for automotive applications
Max transient supply voltage V
Operating voltage range V
Max On-State resistance (per ch.) R
Current limitation (typ) I
Off state supply current I
1. Typical value with all loads connected
CC
CC
ON
LIMH
S
41V
4.5 to 27V
4 mΩ
100A
(1)
2 µA
PQFN - 12x12 Power lead-less
MultiPowerSO-30
Application
■ General
power limitation – Very low stand-by current – 3.0V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
European directive
■ Diagnostic functions
– Proportional load current sense – Current sense disable – Thermal shutdown indication
■ Protection
– Undervoltage shut-down – Overvoltage clamp – Load current limitation – Thermal shut down – Self limiting of fast thermal transients – Protection against loss of ground and loss of V
CC
– Reverse battery protection with self switch
on of the PowerMOS
(see Application
schematic on page 18)
– Electrostatic discharge protection

Table 1. Devices summary

Package
PQFN-12x12 Power lead-less - VND5004ATR-E VND5004A-E
MultiPowerSO-30 VND5004ASP30-E VND5004ASP30TR-E -
Tube Tape and Reel Tray
■ All types of resistive, inductive and capacitive
loads
■ Suitable for power management applications
Description
The VND5004ATR-E and VND5004ASP30-E are devices made using STMicroelectronics VIPower technology. They are intended for driving resistive or inductive loads with one side connected to ground. Active V dump protection circuit protect the devices against transients on the Vcc pin (see ISO7637 transient compatibility table). These devices integrate an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is high impedance. Output current limitation protects the devices in overload condition. In case of long duration overload, the devicesa limit the dissipated power to a safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as a fault condition disappears.
Order codes
pin voltage clamp and load
CC
December 2007 Rev 5 1/34
www.st.com
34
Contents VND5004A-E / VND5004ASP30-E
Contents
1 Block diagram and pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 PQFN - 12x12 Power lead-less thermal data . . . . . . . . . . . . . . . . . . . . . . 23
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2 MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3 PQFN - 12x12 Power lead-less mechanical data . . . . . . . . . . . . . . . . . . . 28
5.4 MultiPowerSO-30 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 PQFN - 12x12 Power lead-less packing information . . . . . . . . . . . . . . . . 31
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
VND5004A-E / VND5004ASP30-E List of tables
List of tables
Table 1. Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Thermal parameters for MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 14. Thermal parameters for PQFN - 12x12 Power lead-less . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 15. MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 16. PQFN - 12x12 Power lead-less mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3/34
List of figures VND5004A-E / VND5004ASP30-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (not in scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. On state resistance vs. T Figure 14. On state resistance vs. V
Figure 15. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. I
LIMH
vs. T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. MultiPowerSO-30 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 20
Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON) . . 21
Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 . . . . . . . . . . . . . . . . 21
Figure 28. 12x12 Power lead-less package PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 23
Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction ambient single pulse
(one channel ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Figure 31. Thermal fitting model of a double channel HSD in PQFN - 12x12 Power lead-less . . . . . 24
Figure 32. MultiPowerSO-30 outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. PQFN - 12x12 Power lead-less outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 34. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 35. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix “TR”). . . . . . . . . . . . . . . . . 32
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4/34
VND5004A-E / VND5004ASP30-E Block diagram and pin configurations

1 Block diagram and pin configurations

Figure 1. Block diagram

V
CC
V
CC
clamp
GND
Reverse battery protection
INPUT1
INPUT2
CS_DIS

Table 2. Pin functions

Name Function
VCC Battery connection
OUTPUT1,2 Power output
GND Ground connection
Under voltage
LOGIC
Pwr
Pwr
LIM
LIM
DRIVER
Overtemp.
DRIVER
Overtemp.
PwCLAMP
I
I
OUT1
CS_DIS
PwCLAMP
I
I
OUT2
CS_DIS
LIM
LIM
OUTPUT1
K
K
CURRENT SENSE1
OUTPUT2
CURRENT SENSE2
INPUT1,2
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
CURRENT SENSE1,2 Analog current sense pin, delivers a current proportional to the load current
CS_DIS Active high CMOS compatible pin, to disable the current sense pins
5/34
Block diagram and pin configurations VND5004A-E / VND5004ASP30-E

Figure 2. Configuration diagram (not in scale)

PQFN -12x12 Power
less
lead -
(bottom view)
FOR TEST ONLY
CURRENT SENSE 2 CURRENT SENSE 1
FOR TEST ONLY
CS_DIS
INPUT 2 INPUT 1
V
CC
NC
NC NC
GND
NC
NC
V
CC
12
11
10
9 8
7
13 14
6 5
4 3 2
1
1
V
Heat Slug1
15 16
CC
1 NC 2 NC 3 NC
15
16
30
4 GND 5 CS_DIS 6 CURRENT SENSE 2 7 CURRENT SENSE 1 8 INPUT 2 9 INPUT 1 10 NC 11 NC 12 NC 13 FOR TEST ONLY 14 V
CC
15 OUTPUT 1 16 OUTPUT 2
V
CC
OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 NC
OUTPUT 1 OUTPUT 1
OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 V
CC
MultiPowerSO-30
(top view)

Table 3. Suggested connections for unused and n.c. pins

Connection /
Pin
Floating N.R.
To ground
1. Not recommended.
6/34
Current
Sense
(1)
Through 1kΩ
resistor
N.C. Output Input CS_DIS
XX X X X
X N.R.
Through 10kΩ
resistor
Through 10kΩ
resistor
For test
only
N.R.
VND5004A-E / VND5004ASP30-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
V
CC
I
CSD
I
V
IN1,2
IN1,2
V
CSD
CS_DIS
INPUT1,2

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
V
V
CCPK
-V
I
OUT
- I
I
CSD
V
CSENSE
E
V
V
DC supply voltage 27 V
CC
Transient supply voltage (T<400ms, R
Reverse DC supply voltage 16 V
CC
DC output current Internally limited A
Reverse DC output current 70 A
OUT
I
DC input current -1 to 10 mA
IN
DC current sense disable input current -1 to 10 mA
Current sense maximum voltage (Vcc>0V)
Maximum switching energy (single pulse)
MAX
(L=0.3mH; R
Electrostatic discharge (Human Body Model: R=1.5kΩ;
ESD
C=100pF)
Charge device model (CDM-AEC-Q100-011) 750 V
ESD
=0Ω; V
L
=13.5V; T
bat
GND
jstart
I
OUTPUT1,2
CURRENT SENSE1,2
I
GND
>0.5Ω) 41 V
load
OUT1,2
I
SENSE1,2
V
SENSE1,2
V
OUT1,2
Vcc-41
+Vcc
=150ºC; I
OUT
= I
limL
(Typ.) )
342 mJ
2000 V
V V
7/34
Electrical specifications VND5004A-E / VND5004ASP30-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
T
Junction operating temperature -40 to 150 °C
j
T
Storage temperature -55 to 150 °C
STG

2.2 Thermal data

Table 5. Thermal data

Value
Symbol Parameter
MultiPowerSO-30 12x12 PLLP
Unit
R
thj-case
R
thj-amb
1. PCB FR4 area 58mmX58mm , PCB thickness 2mm, Cu thickness 35 µm, minimum pad layout.
2. PCB FR4 area 78mmX78mm , PCB thickness 2mm, Cu thickness 35 µm, minimum pad layout.
Thermal resistance junction-case (MAX) (with one channel ON)
0.35 0.35 °C/W
Thermal resistance junction-ambient (MAX) 58
(1)
39
(2)
°C/W
8/34
VND5004A-E / VND5004ASP30-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<24V, -40°C<Tj<150 °C, unless otherwise stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
R
ON REV
V
I
L(off)
1. For each channel.
2. PowerMOS leakage included.
Table 7. Switching (VCC=13V; Tj=25°C)
Operating supply
CC
voltage
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shut-down hysteresis
I
=15A; Tj=25°C
OUT
On-state resistance
ON
R
dson
condition
clampVCC
I
Supply current
S
Off-state output current
in reverse battery
clamp voltage ICC=20 mA; I
(1)
(1)
=15A; Tj=150°C
I
OUT
=15A; VCC=5V; Tj=25°C
I
OUT
=-13V; I
V
CC
Off state; V VIN=V
On state; V
VIN=V V
IN=VOUT
OUT
OUT1,2
=13V; Tj=25°C;
CC
OUT=VSENSE=VCSD
=13V; VIN=5V; I
CC
=0V; VCC=13V; Tj=25°C
OUT
=0V; VCC=13V; Tj=125°C
4.5 13 27 V
0.5 V
4
mΩ
8
mΩ
6
mΩ
=-15A; Tj=25°C 4 mΩ
=0A 414652 V
(2)
3.5
(2)
5
6µAmA
5
µA
=0V
OUT
2
=0A
000.01 3
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time RL=0.87Ω (see Figure 5.)25µs
Turn-on delay time RL=0.87Ω (see Figure 5.)35µs
See
/dt)onTurn-on voltage slope RL=0.87Ω
(dV
OUT
Figure
16.
See
(dV
OUT
/dt)
Turn-off voltage slope RL=0.87Ω
off
Figure
18.
W
W
ON
OFF
Switching energy losses during t
won
Switching energy losses during t
woff
RL=0.87Ω (see Figure 5.)5.4mJ
RL=0.87Ω (see Figure 5.)2.3mJ
V/µs
V/µs
9/34
Electrical specifications VND5004A-E / VND5004ASP30-E

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL1,2
I
IL1,2
V
IH1,2
I
IH1,2
V
I(hyst)1,2
V
ICL1,2
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 9. Protection and diagnostics

Input low level voltage 0.9 V
Low level input current VIN=0.9V 1 µA
Input high level voltage 2.1 V
High level input current VIN=2.1V 10 µA
Input hysteresis voltage
Input clamp voltage
IIN=1mA IIN=-1mA
CS_DIS low level voltage
Low level CS_DIS current
=0.9V 1 µA
V
CSD
CS_DIS high level voltage
High level CS_DIS current
V
=2.1V 10 µA
CSD
CS_DIS hysteresis voltage
I
=1mA
CS_DIS clamp voltage
CSD
I
CSD
=-1mA
(1)
0.25 V
5.5
7V
-0.7
0.9 V
2.1 V
0.25 V
5.5
7V
-0.7
V
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
Short circuit current
V
CC
5V<V
=13V
CC
<24V
70 100 140
140
Short circuit current
I
limL
during thermal
=13V; TR<Tj<T
V
CC
TSD
40 A
cycling
T
T
T
V
DEMAG
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
Shutdown
TSD
temperature
Reset temperature TRS+1 TRS+5 °C
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis
HYST
(T
Turn-off output voltage clamp
diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
TSD-TR
)
=2A; VIN=0; L=6mH VCC-27 VCC-30 VCC-33 V
I
OUT
150 175 200 °C
135 °C
7°C
A A
10/34
VND5004A-E / VND5004ASP30-E Electrical specifications

Table 10. Current sense (8V<VCC<16V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
K
I
SENSE0
V
SENSE
V
SENSEH
I
SENSEH
I
1
OUT/ISENSE
I
2
OUT/ISENSE
Analog sense current
Max analog sense output voltage
Analog sense output voltage in overtemperature condition
Analog sense output current in overtemperature condition
=15A; V
OUT
Tj=-40°C
=25°C...150°C
T
j
I
=30A; V
OUT
=-40°C
T
j
=25°C...150°C
T
j
=0A; V
I
OUT
=5V; VIN=0V; Tj=-40°C to 150°C
V
CSD
V
=0V; VIN=5V; Tj=-40°C to 150°C00
CSD
I
=45A; V
OUT
=13V; R
V
CC
Vcc=13V; V
SENSE
SENSE
SENSE
=4V; V
=4V; V
=0V;
CSD
CSD
=0V;
=0V;
11530 12730
13430 14500
16000 16000
16150 16150
19340 19270
17880 17880
5
400µAµA
=0V; R
CSD
=3.9kΩ 9V
SENSE
=5V 8 mA
SENSE
=3.9kΩ 5V
SENSE
t
DSENSE1H
t
DSENSE1L
t
DSENSE2H
t
DSENSE2L
Delay response time from falling edge of CS_DIS pin
Delay response time from rising edge of CS_DIS pin
Delay response time from rising edge of INPUT pin
Delay response time from falling edge of INPUT pin
V I (see Figure 4.)
V I (see Figure 4.)
V I (see Figure 4.)
V I (see Figure 4.)
<4V, 5A<Iout<30A
SENSE
=90% of I
SENSE
<4V, 5A<Iout<30A
SENSE
=10% of I
SENSE
<4V, 5A<Iout<30A
SENSE
=90% of I
SENSE
<4V, 5A<Iout<30A
SENSE
=10% of I
SENSE
SENSE max
SENSE max
SENSE max
SENSE max

Figure 4. Current sense delay characteristics

INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
t
DSENSE1L
t
DSENSE1H
50 100 µs
520µs
270 600 µs
100 250 µs
t
DSENSE2L
11/34
Electrical specifications VND5004A-E / VND5004ASP30-E

Table 11. Truth table

(1)
Conditions INPUTn OUTPUTn
SENSEn (V
(see Figure 3.)
CSD
=0V)
Normal operation
Overtemperature
Undervoltage
Short circuit to GND
sc ≤ 10 mΩ)
(R
Short circuit to V
CC
L
H
L
H
L
H
L H H
L H
L H
Nominal
L L
V
SENSEH
L L
L L L
0 if Tj < T
V
SENSEH
H H
< Nominal
Negative output voltage clamp L L 0
1. If V
is high, the SENSE output is at a high impedance. Its potential depends on leakage currents and
CSD
the external circuit.

Figure 5. Switching characteristics

V
OUT
dV
OUT
/dt
(on)
t
Won
80%
t
r
10%
t
Woff
90%
t
f
dV
OUT
/dt
(off)
t
0
0
0 0
0
TSD
if Tj > T
0
TSD
INPUT
t
d(on)
12/34
t
d(off)
t
VND5004A-E / VND5004ASP30-E Electrical specifications

Table 12. Electrical transient requirements

ISO 7637-2:
2004(E)
Test pulse
Test levels
III IV
(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and Impedance
1 -75 V -100 V
2a +37 V +50 V
5000
pulses
5000
pulses
0.5 s 5 s 2 ms, 10 Ω
0.2 s 5 s 50 µs, 2 Ω
3a -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
3b +75 V +100 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
4 -6 V -7 V 1 pulse 100 ms, 0.01
(2)
5b
ISO 7637-2:
+65 V +87 V 1 pulse 400 ms, 2 Ω
Test level results
(1)
2004(E)
Tes t puls e
III IV
1C C
2a C C
3a C C
3b C C
4C C
(2) (3)
5b
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 4.:
Absolute maximum ratings.
CC
Class Contents
Ω
C All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
13/34
Electrical specifications VND5004A-E / VND5004ASP30-E

Figure 6. Waveforms

NORMAL OPERATION
INPUTn
CS_DIS
LOAD CURRENTn
SENSE CURRENTn
UNDERVOLTAGE
V
V
CC
INPUTn
CS_DIS
LOAD CURRENTn
SENSE CURRENTn
V
USD
USDhyst
INPUTn
CS_DIS
LOAD VOLTAGEn
LOAD CURRENTn
SENSE CURRENTn
T
j
T
R
INPUTn
CS_DIS
LOAD CURRENTn
SENSE CURRENTn
T
TSD
T
RS
current
limitation
OUTPUT SHORT TO V
<Nominal
OVERLOAD OPERATION
power limitation
CC
<Nominal
I
LIMH
I
LIML
V
SENSEH
thermal cycling
SHORTED LOAD NORMAL LOAD
14/34
VND5004A-E / VND5004ASP30-E Electrical specifications

2.4 Electrical characteristics curves

Figure 7. Off state output current Figure 8. High level input current
Ilo ff (u A )
6
5.4
4.8
4.2
3.6
3
2.4
1.8
1.2
0.6
0
-50 -25 0 25 50 75 100 125 150 175
Off State Vcc=13V
Vin=Vout=0V
Tc (°C )
Iih (uA )
5
4.5
4
3.5
3
2.5
2
1.5
0.5
0
Vi n=2. 1V
1
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )

Figure 9. Input clamp voltage Figure 10. Input low level

Vicl (V)
7
6.75
6.5
6.25
6
5.75
5.5
5.25
5
Ii n =1m A
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
Vil (V)
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )

Figure 11. Input high level Figure 12. Input hysteresis voltage

Vih (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
Vihyst (V)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
15/34
Electrical specifications VND5004A-E / VND5004ASP30-E
Figure 13. On state resistance vs. T
Ron (mOhm)
6
5.4
4.8
4.2
3.6
3
2.4
1.8
Io u t =1 5 A Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
Figure 14. On state resistance vs. V
case
Ron (mOhm)
6
5.4
4.8
4.2
3.6
3
2.4
1.8
0 4 8 12 16 20 24 28
Vcc
Tc=150°C
Tc=125°C
Tc=25°C
Tc=-40°C

Figure 15. Undervoltage shutdown Figure 16. Turn-On voltage slope

Vusd (V)
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
(dV out/dt)on (V /ms)
500
450
400
350
300
250
200
150
100
50
0
Vcc=13V
RI=0.87Ohm
-50 -25 0 25 50 75 100 12 5 150 175
Tc (°C )
CC
Figure 17. I
Ili mh (A )
150
140
130
120
110
100
90
80
70
60
50
-50 -25 0 25 50 75 100 12 5 150 175
LIMH
Vc c=13V
vs. T
Tc (°C )
case
16/34

Figure 18. Turn-Off voltage slope

(dV out/dt)off (V /ms )
500
450
400
350
300
250
200
150
100
50
Vcc=13V
RI=0.87Ohm
0
-50 -25 0 25 50 75 100 12 5 150 175
Tc (°C )
VND5004A-E / VND5004ASP30-E Electrical specifications

Figure 19. CS_DIS high level voltage Figure 20. CS_DIS clamp voltage

Vcsdh (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )

Figure 21. CS_DIS low level voltage

Vcsdl (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
Vcsdcl (V)
8
7.5
7
6.5
6
5.5
5
4.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
17/34
Application information VND5004A-E / VND5004ASP30-E

3 Application information

Figure 22. Application schematic

+5V
R
prot
µC
R
prot
R
prot
R
SENSE
C
ext

3.1 MCU I/Os protection

When negative transients are present on the VCC line, the control pins will be pulled negative to approximately -1.5V.
ST suggests the insertion of resistors (R latching up.
CS_DIS
INPUT
CURRENT SENSE
45V
prot
V
CC
20V
D
ld
OUTPUT
GND
) in the lines to prevent the µC I/Os pins from
The values of these resistors provide a compromise between the leakage current of the µC, the current required by the HSD I/Os (input levels compatibility) and the latch-up limit of the µC I/Os.
-V
CCpeak/Ilatchup
≤ R
prot
≤ (V
OHµC-VIH
) / I
IHmax
Calculation example:
For V
75Ω ≤ R
Recommended values: R
CCpeak
prot
≤ 240kΩ.
= - 1.5V and I
latchup
=10kΩ, C
prot
≥ 20mA; V
EXT

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the V
max rating. The same applies if the device will be subject to transients on the VCC
CCPK
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
18/34
OHµC
=
10nF
≥ 4.5V
VND5004A-E / VND5004ASP30-E Application information

3.3 Maximum demagnetization energy (VCC = 13.5V)

Figure 23. Maximum turn off current versus inductance

100
A
B
C
10
I (A)
1
1 10 100L (mH)
VIN, I
A: T
B: T
C: T
L
= 150°C single pulse
jstart
= 100°C repetitive pulse
jstart
= 125°C repetitive pulse
jstart
Note: Values are generated with R
In case of repetitive pulses, T must not exceed the temperature specified above for curves A and B.
Demagnetization Demagnetization Demagnetization
= 0 Ω.
L
(at beginning of each demagnetization) of every pulse
jstart
t
19/34
Package and PC board thermal data VND5004A-E / VND5004ASP30-E

4 Package and PC board thermal data

4.1 MultiPowerSO-30 thermal data

Figure 24. MultiPowerSO-30 PC board

Note: Layout condition of R
area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm (front and back side), Copper areas: from minimum pad lay-out to 16cm
Figure 25.
RTHj_amb(°C /W)
R
thj-amb
60
55
50
45
40
35
012345
and Zth measurements (PCB: Double layer, Thermal Vias, FR4
th
2
).
Vs. PCB copper area in open box free air condition (one channel ON)
PC B C u heatsink area (cm^2)
20/34
VND5004A-E / VND5004ASP30-E Package and PC board thermal data
Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one
channel ON)
ZT H (°C/W)
1000
100
Footprint
4 cm
10
1
0.1
0.01
0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s)

Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30

2
(a)
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
21/34
Package and PC board thermal data VND5004A-E / VND5004ASP30-E
Equation 1: pulse calculation formula
Z
THδ
where
R
δ tpT⁄=
TH
δ Z
THtp
1 δ–()+⋅=

Table 13. Thermal parameters for MultiPowerSO-30

Area/island (cm2)Footprint4
R1 (°C/W) 0.05
R2 (°C/W) 0.3
R3 (°C/W) 0.5
R4 (°C/W) 1.3
R5 (°C/W) 14
R6 (°C/W) 44.7 23.7
R7 (°C/W) 0.05
R8 (°C/W) 0.3
C1 (W.s/°C) 0.005
C2 (W.s/°C) 0.008
C3 (W.s/°C) 0.01
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.6
C6 (W.s/°C) 5 11
C7 (W.s/°C) 0.005
C8 (W.s/°C) 0.008
22/34
VND5004A-E / VND5004ASP30-E Package and PC board thermal data

4.2 PQFN - 12x12 Power lead-less thermal data

Figure 28. 12x12 Power lead-less package PC board

Note: Layout condition of R
area= 78mm x 78mm, PCB thickness=2mm, Cu thickness=35µm (front and back side), Copper areas: minimum pad lay-out).
Figure 29. R
thj-amb
ON)
50
45
40
35
30
25
and Zth measurements (PCB: Double layer, Thermal Vias, FR4
th
Vs. PCB copper area in open box free air condition (one channel
20
0 5 10 15 20
PCB Cu heatsink area (cm^2)
23/34
Package and PC board thermal data VND5004A-E / VND5004ASP30-E
Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction
ambient single pulse (one channel ON)
100
Footprint
2
4 cm
2
8 cm
2
10
°C/W
1
16 cm
0,1
0,001 0,01 0,1 1 10 100 1000time (s)
Figure 31.
Thermal fitting model of a double channel HSD in PQFN - 12x12 Power lead-
(b)
less
b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
24/34
VND5004A-E / VND5004ASP30-E Package and PC board thermal data
Equation 2: pulse calculation formula
Z
THδ

Table 14. Thermal parameters for PQFN - 12x12 Power lead-less

where
R
δ tpT⁄=
TH
δ Z
THtp
1 δ–()+⋅=
Area/island (cm2)Footprint 4 8 16
R1 (°C/W) 0.3
R2 (°C/W) 0.15
R3 (°C/W) 4.2
R4 (°C/W) 9.6 9.4 9.2 9
R5 (°C/W) 15.1 10.5 8.5 5.5
R6 (°C/W) 16.7 12 9 6
R7 (°C/W) 0.3
R8 (°C/W) 0.15
C1 (W.s/°C) 0.021
C2 (W.s/°C) 0.015
C3 (W.s/°C) 0.2
C4 (W.s/°C) 1.9 2.2 2.32 2.45
C5 (W.s/°C) 2.45 7.3 13.7 20
C6 (W.s/°C) 11.85 22 25 30
C7 (W.s/°C) 0.021
C8 (W.s/°C) 0.015
25/34
Package and packing information VND5004A-E / VND5004ASP30-E

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in ECOPACK packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.

5.2 MultiPowerSO-30 mechanical data

Figure 32. MultiPowerSO-30 outline

®
26/34
VND5004A-E / VND5004ASP30-E Package and packing information

Table 15. MultiPowerSO-30 mechanical data

Millimeters
Symbol
Min. Typ. Max.
A 2.35
A2 1.85 2.25
A3 0 0.1
B 0.42 0.58
C 0.23 0.32
D 17.1 17.2 17.3
E 18.85 19.15
E115.91616.1
“e” 1
F6 14.3
F7 5.45
F8 0.73
L 0.8 1.15
N10 Deg
S 0 Deg 7 Deg
27/34
Package and packing information VND5004A-E / VND5004ASP30-E

5.3 PQFN - 12x12 Power lead-less mechanical data

Figure 33. PQFN - 12x12 Power lead-less outline

28/34
VND5004A-E / VND5004ASP30-E Package and packing information

Table 16. PQFN - 12x12 Power lead-less mechanical data

Symbol
Min. Typ. Max.
A2 2.2
A1 0 0.05
b 0.35 0.47
C0.50
D 11.90 12.10
Dh1 4.65 4.95
Dh2 10.45 10.65
Dh3 4.80 5
Dh4 4.80 5
E 11.90 12.10
Eh1 2.15 2.45
Millimeters
Eh2 5.15 5.45
Eh3 1.70 2
e1 0.90
e2 3.45
e3 1.10
f0.50
f1 0.60
L 0.75 0.95
L1 1.65 1.90
L2 0.76 0.78
M 11.10 11.30
N 11.10 11.30
v0.1
w0.05
y0.05
y1 0.1
29/34
Package and packing information VND5004A-E / VND5004ASP30-E

5.4 MultiPowerSO-30 packing information

The devices can be packed in tube or tape and reel shipments (see the Devices summary
on page 1 for packaging quantities).

Figure 34. MultiPowerSO-30 tube shipment (no suffix)

Tube dimension
Dimension mm
A
C
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.13)

Figure 35. MultiPowerSO-30 tape and reel shipment (suffix “TR”)

Reel dimension
Dimension mm
Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± 0.2) 13 D (min) 20.2 G (+ 2 / -0) 32 N (min) 100 T (max) 38.4
29 435 532
3.82
23.6
0.8
30/34
To p
cover
tape
Tape dimensions
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986
Description Dimension mm
Tape width W 32 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 24 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 2 Hole Position F (± 0.1) 14.2 Compartment Depth K (max) 2.2
End
500 mm min
Empty components pockets
User direction of feed
Start
No componentsNo components Components
500 mm min
VND5004A-E / VND5004ASP30-E Package and packing information

5.5 PQFN - 12x12 Power lead-less packing information

The devices can be packed in tray or tape and reel shipments (see the Devices summary on
page 1 for packaging quantities).

Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix)

Tray information
Parameter
Base Q.ty 189 Bulk Q.ty 945
31/34
Package and packing information VND5004A-E / VND5004ASP30-E

Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix “TR”)

Tape dimensions
Dimension mm
A0 ± 0.1
B0 ± 0.1
K0 ± 0.1
F ± 0.1
E ± 0.1
W ± 0.3
P2 ± 0.1
P0 ± 0.1
P1 ± 0.1
T ± 0.05 0.30
D1.50
D1 (min) 1.50
Reel dimensions
Dimension mm
Base Q.ty 1500 Bulk Q.ty 1500 A (max) 330 B (min) 1.5 C (± 0.2) 13 D (min) 20.2 G (+ 2 / -0) 32 N (min) 100 T (max) 38.4
12.30
12.30
2.15
11.50
1.75
24
2
4
16
32/34
VND5004A-E / VND5004ASP30-E Revision history

6 Revision history

Table 17. Document revision history

Date Revision Changes
15-Sep-2003 1 Initial release.
21-Jun-2004 2 MultiPowerSO-30 package insertion.
22-Mar-2006 3 Major general update
Document converted into new ST corporate template. Contents and lists of tables and figures added.
02-Jul-2007 4
10-Dec-2007 5 Table 12: Electrical transient requirements - added note 3.
Section 3.3: Maximum demagnetization energy (VCC = 13.5V)
added.
Section 5: Package and packing information updated
33/34
VND5004A-E / VND5004ASP30-E
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