STMicroelectronics VIPower™ M0 technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shutdown, linear current limitation and
overvoltage clamp protect the chip in harsh
environments.
are monolithic devices made using
3
1
TO-251 (IPAK)
SO-8D
2
PAK
2
1
3
1
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.Device summary
PackageTubeTube (lead free)Tape and reelTape and reel (lead free)
1. When mounted on a standard single-sided FR4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all DRAIN
pins. Horizontal mounting and no artificial air flow.
(1)
65
(1)
102 52
2
PAK
(1)
Unit
°C/W
2.3 Electrical characteristics
-40 < Tj < 150 °C unless otherwise specified.
Table 4.Electrical characteristics
Symbol Parameter Test Conditions Min Typ Max Unit
Off
V
CLAMP
V
CLTH
V
INTH
I
ISS
V
INCL
Drain-source clamp voltage V
Drain-source clamp threshold
voltage
Input threshold voltage VDS=VIN; ID=1 mA 0.5 2.5 V
Supply current from input pin V
Input-source clamp voltage
=0 V; ID=7 A 40 45 55 V
IN
=0 V; ID=2 mA 36 V
V
IN
=0 V; VIN=5 V 100 150 µA
DS
IIN=1 mA
IIN=-1 mA
6
-1.0
6.8 8
-0.3
V
I
DSS
Zero input voltage drain current
(V
=0 V)
IN
VDS=13 V; VIN=0 V; Tj=25 °C
V
DS
On
V
R
DS(on)
Static drain-source on resistance
in
V
in
Dynamic (Tj=25°C, unless otherwise specified)
(1)
g
fs
C
Forward transconductanceVDD = 13 V ID = 7 A18S
Output capacitanceVDS = 13 V f = 1 MHz VIN = 0 V400pF
VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04Protection features
3 Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from
DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current
I
(typ. 100 µA) flows into the input pin in order to supply the internal circuitry.
ISS
The device integrates:
● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
●Linear current limiter circuit: limits the drain current I
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold T
●Over temperature and short circuit protection: these are based on sensing the chip
jsh
.
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
●Status feedback: in the case of an over temperature fault condition (T
device tries to sink a diagnostic current Igf through the input pin in order to indicate fault
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current I
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current I
ISS
.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit.
1. Layout condition of R
Cu thickness=35 µm, Copper areas: 0.14 cm2, 0.6 cm2, 1.6 cm2).
Figure 38. SO-8 R
and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness=2 mm,
th
thj-amb
(1)
vs PCB copper area in open box free air condition
20/31Doc ID 7393 Rev 8
VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04Package thermal data
4.3 D2PAK thermal data
Figure 39. D2PAK PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness=2 mm,
Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Added Table 1: Device summary on page 1.
Updated Section 5: Package information on page 24
Added part number VNS14NV04.
Added SO-8 package:
– Updated Table 1: Device summary
– Updated Table 2: Absolute maximum rating
– Updated Table 3: Thermal data
– Updated Chapter 4: Package thermal data
– Updated Chapter 5: Package information
30/31Doc ID 7393 Rev 8
VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04
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