Datasheet VIPER27 Datasheet (ST)

Features

■ 800 V avalanche rugged power section

■ PWM operation with frequency jittering for low

EMI

■ Operating frequency:

– 60 kHz for L type
– 115 kHz for H type

■ Standby power < 50 mW at 265 Vac

■ Limiting current with adjustable set point

■ Adjustable and accurate overvoltage

protection

■ On-board soft-start

■ Safe auto-restart after a fault condition

■ Hysteretic thermal shutdown

Application

■ Auxiliary power supply for consumer and home

equipments

■ ATX auxiliary power supply

■ Low / medium power AC-DC adapters

■ SMPS for set-top boxes, DVD players and

recorders, white goods

VIPER27

Off-line high voltage converters

SO16 narrow

Description

The device is an off-line converter with an 800 V
rugged power section, a PWM control, two levels
of over-current protection, overvoltage and
overload protections, hysteretic thermal
protection, soft-start and safe auto-restart after
any fault condition removal. Burst mode operation
and device very low consumption help to meet the
standby energy saving regulations.

Advance frequency jittering reduces EMI filter
cost. Brown-out function protects the switch mode
power supply when the rectified input voltage
level is below the normal minimum level specified
for the system. The high voltage start-up circuit is
embedded in the device.

Figure 1. Typical topology

+

DC input high voltage
wide range

-

DIP-7

+

DC Output voltage

-

DRAIN

DRAIN

GND

VIPER27

VDD

CONT

BR

FB

Table 1. Device summary

Order codes Package Packaging

VIPER27LN / VIPER27HN DIP-7

Tu be

VIPER27HD / VIPER27LD

SO16 narrow

VIPER27HDTR / VIPER27LDTR Tape and reel

July 2010 Doc ID 15133 Rev 5 1/31

www.st.com

31

Contents VIPER27

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Typical circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7 Operation descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.1 Power section and gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.2 High voltage startup generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.3 Power-up and soft-start up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.4 Power down operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.5 Auto restart operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.6 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.7 Current mode conversion with adjustable current limit set point . . . . . . . 18

7.8 Overvoltage protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.9 About CONT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.10 Feed-back and overload protection (OLP) . . . . . . . . . . . . . . . . . . . . . . . . 20

7.11 Burst-mode operation at no load or very light load . . . . . . . . . . . . . . . . . . 23

7.12 Brown-out protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.13 2nd level over current protection and hiccup mode . . . . . . . . . . . . . . . . . 25

8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31 Doc ID 15133 Rev 5

VIPER27 Block diagram

1 Block diagram

Figure 2. Block diagram

BR

VDD

VDD

Vcc

DRAIN

CONT

15uA

OVP

LOGIC

OVP

+

-

V

BRth

SOFT

START

.

6uA

OCP

BLOCK

Vin_OK

FB

2 Typical power

Table 2. Typical power

Internal Supply bus

&

Reference Voltages

-

OCP

+

PWM

+

-

+

-

Ref

BURST-MODE

LOGIC

2nd OCP

LOGIC

BURST

SUPPLY

& UVLO

UVLO

LEB

BURST

OSCILLATOR

TUR N -ON

LOGIC

OVP

OTPOLP

HV_ON

S

R1

I

DDch

THE RMA L

SHUTDOWN

OTP

Q

R2

Rsense

GND

230 V

Part number

Adapter

(1)

AC

Open frame

(2)

VIPER27 18 W 20 W 10 W 12 W

1. Typical continuous power in non ventilated enclosed adapter measured at 50 °C ambient.

2. Maximum practical continuous power in an open frame design at 50

°C ambient, with adequate heat sinking.

Doc ID 15133 Rev 5 3/31

Adapter

85-265 V

(1)

AC

Open frame

(2)

Pin settings VIPER27

3 Pin settings

Figure 3. Connection diagram (top view)

Note: The copper area for heat dissipation has to be designed under the DRAIN pins.

Table 3. Pin description

Pin n.

Name Function

DIP7 SO16N

1 1...2 GND

-4N.A.

25VDD

This pin represents the device ground and the source of the power
section.

Not available for user. It can be connected to GND (pins 1-2) or left not
connected.

Supply voltage of the control section. This pin also provides the charging
current of the external capacitor during start-up time.

Control pin. The following functions can be selected:

1. current limit set point adjustment. The internal set default value of the
cycle-by-cycle current limit can be reduced by connecting to ground an

3 6 CONT

external resistor.

2. output voltage monitoring. A voltage exceeding V

Table 8 on page 7

) shuts the IC down reducing the device consumption.

threshold (see

OVP

This function is strobed and digitally filtered for high noise immunity.

Control input for duty cycle control. Internal current generator provides

47FB

bias current for loop regulation. A voltage below the threshold V
activates the burst-mode operation. A level close to the threshold V

FBbm

FBlin

means that we are approaching the cycle-by-cycle over-current set point.

Brownout protection input with hysteresis. A voltage below the threshold
V

shuts down (not latch) the device and lowers the power

58BR

BRth

consumption. Device operation restarts as the voltage exceeds the
threshold V

BRth

+ V

. It can be connected to ground when not used.

BRhyst

High voltage drain pin. The built-in high voltage switched start-up bias

7,8 13...16 DRAIN

current is drawn from this pin too.
Pins connected to the metal frame to facilitate heat dissipation.

4/31 Doc ID 15133 Rev 5

VIPER27 Electrical data

4 Electrical data

4.1 Maximum ratings

Table 4. Absolute maximum ratings

Val ue

Symbol Parameter

Min Max

Unit

V

DRAIN

E

I

DRAIN

V

CONT

V

V

V

Drain-to-source (ground) voltage 800 V

Repetitive avalanche energy

AV

(limited by T

Repetitive avalanche current

I

AR

(limited by T

Pulse drain current (limited by TJ = 150 °C) 3 A

Control input pin voltage (with I

Feed-back voltage -0.3 5.5 V

FB

Brown-out input pin voltage (with IBR = 0.5 mA) -0.3 Self limited V

BR

Supply voltage (IDD = 25 mA) -0.3 Self limited V

DD

I

Input current 25 mA

DD

Power dissipation at TA < 40 °C (DIP-7) 1

P

TOT

Power dissipation at TA < 60 °C (SO16N) 1.5

T

Operating junction temperature range -40 150 °C

J

T

Storage temperature -55 150 °C

STG

4.2 Thermal data

Table 5. Thermal data

= 150 °C)

J

= 150 °C)

J

1.5 A

= 1 mA) -0.3 Self limited V

CONT

5mJ

W

Max value

Symbol Parameter

Unit

SO16N DIP7

R

R

R

1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq in) of Cu (35 µm thick)

Thermal resistance junction pin

thJP

(Dissipated power = 1 W)

Thermal resistance junction ambient

thJA

(Dissipated power = 1 W)

Thermal resistance junction ambient

thJA

(Dissipated power = 1 W)

25 35 °C/W

60 100 °C/W

(1)

50 80 °C/W

Doc ID 15133 Rev 5 5/31

Electrical data VIPER27

4.3 Electrical characteristics

(TJ = -25 to 125 °C, VDD = 14 V

Table 6. Power section

Symbol Parameter Test condition Min Typ Max Unit

V

BVDSS

I

OFF

R

DS(on)

Break-down voltage

OFF state drain current

Drain-source on state
resistance

(a)

; unless otherwise specified)

I

= 1 mA, VFB = GND

DRAIN

T

= 25 °C

J

V

V

I
T

I

= max rating,

DRAIN

= GND

FB

= 0.4 A, VFB = 3 V, VBR = GND,

DRAIN

= 25 °C

J

= 0.4 A, VFB = 3 V, VBR = GND,

DRAIN

TJ = 125 °C

800 V

60 μA

7 Ω

14 Ω

C

OSS

Table 7. Supply section

Effective (energy related)
output capacitance

V

DRAIN

= 0 to 640 V 40 pF

Symbol Parameter Test condition Min Typ Max Unit

Vol tag e

V

DRAIN

I

DDch

V

DD

V

DDclampVDD

V

DDon

V

DDoff

V

DD(RESTART)

Drain-source start voltage 60 80 100 V

_START

Start up charging current

V

V

V

V

= 120 V, VBR = GND, VFB = GND,

DRAIN

= 4 V

DD

= 120 V, VBR = GND, VFB = GND,

DRAIN

= 4 V after fault.

DD

-2 -3 -4 mA

-0.4 -0.6 -0.8 mA

Operating voltage range After turn-on 8.5 23.5 V

clamp voltage IDD = 20 mA 23.5 V

VDD start up threshold

VDD under voltage
shutdown threshold

VDD restart voltage
threshold

V

DRAIN

V

DRAIN

= 120 V, VBR = GND, VFB = GND

= 120 V, VBR = GND, VFB = GND 4 4.5 5 V

13 14 15 V

7.5 8 8.5 V

Current

I

DD0

I

DD1

I

DD_FAULT

I

DD_OFF

Operating supply current,
not switching

Operating supply current,
switching

Operating supply current,
with protection tripping

Operating supply current
with V

a. Adjust VDD above V

DD

< V

DD_OFF

DDon

VFB = GND, FSW = 0 kHz, VBR = GND,

= 10 V

V

DD

V

V

= 120 V, FSW = 60 kHz 2.5 mA

DRAIN

= 120 V, FSW = 115 kHz 3.5 mA

DRAIN

VDD = 7 V 270 μA

start-up threshold before settings to 14 V.

6/31 Doc ID 15133 Rev 5

0.9 mA

400 μA

VIPER27 Electrical data

Table 8. Controller section

Symbol Parameter Test condition Min Typ Max Unit

Feed-back pin

V

FBolp

V

FBlin

V

FBbm

V

FBbmhys

I

FB

R

FB(DYN)

H

Over load shutdown threshold 4.5 4.8 5.2 V

Linear dynamics upper limit 3.2 3.5 3.7 V

Burst mode threshold Voltage falling 0.6 V

Burst mode hysteresis Voltage rising 100 mV

= 0.3 V -150 -200 -280 μA

V

Feed-back sourced current

FB

3.3 V < VFB < 4.8 V -3 μA

Dynamic resistance V

ΔVFB / ΔI

FB

D

< 3.3 V 14 21 kΩ

FB

26V/A

CONT pin

VCONT_l Low level clamp voltage I

= -100 µA 0.5 V

CONT

Current limitation

V

= 4 V,

I

Dlim

t

SS

T

ON_MIN

Max drain current limitation

Soft-start time 8.5 ms

Minimum turn ON time 220 400 480 ns

FB

I

CONT

T

= 25 °C

J

= -10 µA

0.66 0.7 0.74 A

td Propagation delay 100 ns

t

LEB

I

D_BM

Leading edge blanking 300 ns

Peak drain current during burst mode VFB = 0.6 V 160 mA

Oscillator section

F

OSC

VIPER27H 103 115 127 kHz

FD Modulation depth

FM Modulation frequency 250 Hz

VIPER27L

D

MAX

Maximum duty cycle 70 80 %

Over current protection (2

I

DMAX

Overvoltage protection

V

OVP

T

STROBE

Second over current threshold 1 A

Overvoltage protection threshold 2.7 3 3.3 V

Overvoltage protection strobe time 2.2 us

nd

OCP)

= operating voltage range,

V
V

DD

FB

= 1 V

54 60 66 kHz

VIPER27L ±4 kHz

VIPER27H ±8 kHz

Doc ID 15133 Rev 5 7/31

Electrical data VIPER27

Table 8. Controller section (continued)

Symbol Parameter Test condition Min Typ Max Unit

Brown out protection

V

BRth

V

BRhyst

I

BRhyst

V

BRclamp

V

DIS

Brown out threshold Voltage falling 0.41 0.45 0.49 V

Voltage hysteresis above V

Current hysteresis 7 12 μA

Clamp voltage IBR = 250 µA 3 V

Brown out disable voltage 50 150 mV

Thermal shutdown

T

T

SD

HYST

Thermal shutdown temperature 150 160 °C

Thermal shutdown hysteresis 30 °C

BRth

Voltage rising 50 mV

8/31 Doc ID 15133 Rev 5

VIPER27 Electrical data

Figure 4. Minimum turn-on time test circuit

V

DRAIN

GND

14 V

3.5 V

VDD

CONT

FB

DRAIN

DRAIN

50 Ω

BR

30 V

90 %

10 %

I

DLIM

I

DRAIN

T

ONmin

Time

Time

Figure 5. Brown out threshold test circuit

V

BRth+VBRhyst

V

BRth

V

I

BRhyst

DIS

BR

I

BR

I

DRAIN

Time

Time

14 V

GND

VDD

CONT

FB

DRAIN

DRAIN

I

BRhyst

BR

V

10 kΩ

30 V

2 V

Figure 6. OVP threshold test circuit

Note: Adjust VDD above V

14 V

GND

DRAIN

VDD

DRAIN

CONT

FB

BR

10 kΩ

30 V

2 V

start-up threshold before settings to 14 V

DDon

Time

V

CONT

V

OVP

V

DRAIN

Time

Time

Doc ID 15133 Rev 5 9/31

Typical electrical characteristics VIPER27

5 Typical electrical characteristics

Figure 7. Current limit vs TJ Figure 8. Switching frequency vs T

J

Figure 9. Drain start voltage vs T

Figure 11. Brown out threshold vs T

J

J

Figure 10. HFB vs T

J

Figure 12. Brown out hysteresis vs T

J

10/31 Doc ID 15133 Rev 5

VIPER27 Typical electrical characteristics

Figure 13. Brown out hysteresis current

vs T

J

Figure 14. Operating supply current

(no switching) vs T

J

Figure 15. Operating supply current

(switching) vs T

J

Figure 17. Power MOSFET on-resistance

vs T

J

Figure 16. current limit vs R

LIM

Figure 18. Power MOSFET break down

voltage vs T

J

Doc ID 15133 Rev 5 11/31

Typical electrical characteristics VIPER27

Figure 19. Thermal shutdown

V

DD

V

DDon

V

DDoff

V

DD(RESTART)

T

SD

I

DRAIN

T

J

T

SD

- T

HYST

Normal operation

Shut down after over temperature

Normal operation

time

time

time

12/31 Doc ID 15133 Rev 5

VIPER27 Typical circuit

6 Typical circuit

Figure 20. Min-features flyback application

VoutD3

AC IN

AC IN

BR

V

Vcc

DD

C1

C2

R2

D2

DRAIN

BR

C3

CONT

CONTROL

FB

C4 R6

GND

SOURCE

Figure 21. Full-features flyback application

R1

C5

D1

GND

R3

OPTO

R5

R4

C6

U2

D3

Vout

AC IN

AC IN

BR

C1

Rh

Rl

Rovp

Vcc

V

DD

C2

Daux

R2

BR

C3

CONT

Rlim

CONTROL

FB

SOURCE

C4

D2

DRAIN

GND

R1

C5

D1

GND

R3

OPTO

R5

C6

R4

U2

R6

Doc ID 15133 Rev 5 13/31

Operation descriptions VIPER27

7 Operation descriptions

VIPER27 is a high-performance low-voltage PWM controller chip with an 800 V, avalanche

rugged Power section.

The controller includes: the oscillator with jittering feature, the start up circuits with soft-start
feature, the PWM logic, the current limit circuit with adjustable set point, the second over
current circuit, the burst mode management, the brown-out circuit, the UVLO circuit, the
auto-restart circuit and the thermal protection circuit.

The current limit set-point is set by the CONT pin. The burst mode operation guaranties high
performance in the stand-by mode and helps in the energy saving norm accomplishment.

All the fault protections are built in auto restart mode with very low repetition rate to prevent
IC's over heating.

7.1 Power section and gate driver

The power section is implemented with an avalanche ruggedness N-channel MOSFET,
which guarantees safe operation within the specified energy rating as well as high dv/dt
capability. The power section has a B
at 25 °C.

of 800 V min. and a typical R

VDSS

DS(on)

of 7 Ω

The integrated SenseFET structure allows a virtually loss-less current sensing.

The gate driver is designed to supply a controlled gate current during both turn-on and turn­off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down
circuit holds the gate low in order to ensure that the power section cannot be turned on
accidentally.

7.2 High voltage startup generator

The HV current generator is supplied through the DRAIN pin and it is enabled only if the
input bulk capacitor voltage is higher than V
the HV current generator is ON, the I
capacitor on the V
reduced to 0.6 mA, in order to have a slow duty cycle during the restart phase.

pin. In case of auto restart mode after a fault event, the I

DD

DRAIN_START

current (3 mA typical value) is delivered to the

DDch

threshold, 80 VDC typically. When

DDch

current is

14/31 Doc ID 15133 Rev 5

VIPER27 Operation descriptions

7.3 Power-up and soft-start up

If the input voltage rises up till the device start threshold, V
begins to grow due to the I
high voltage start up circuit. If the V

page 6

See

) the power MOSFET starts switching and the HV current generator is turned OFF.

Figure 23 on page 16

current (see

DDch

.

Table 7 on page 6

voltage reaches V

DD

DRAIN_START

) coming from the internal

threshold (see

DDon

The IC is powered by the energy stored in the capacitor on the VDD pin, C

, the VDD voltage

Tab le 7 o n

, until when

VDD

the self-supply circuit (typically an auxiliary winding of the transformer and a steering diode)
develops a voltage high enough to sustain the operation.

C

capacitor must be sized enough to avoid fast discharge and keep the needed voltage

VDD

value higher than V

threshold. In fact, a too low capacitance value could terminate the

DDoff

switching operation before the controller receives any energy from the auxiliary winding.

The following formula can be used for the V

capacitor calculation:

DD

Equation 1

I

×

DDchtSSaux

----------- ------------- ------------- ---=

V

–

DDonVDDoff

The t

C

VDD

is the time needed for the steady state of the auxiliary voltage. This time is

SSaux

estimated by applicator according to the output stage configurations (transformer, output
capacitances, etc.).

During the converter start up time, the drain current limitation is progressively increased to
the maximum value. In this way the stress on the secondary diode is considerably reduced.
It also helps to prevent transformer saturation. The soft-start time lasts 8.5 ms and the
feature is implemented for every attempt of start up converter or after a fault.

Figure 22. I

current during start-up and burst mode

DD

V

DD

V

DDon

V

DDoff

V

FB

V

FBolp

V

FBlin

V

FBbm

V

DRAIN

I

DD

I

DD1

I

DD0

I

(-3 mA)

DDch

START- UP

NORMAL MODE

BURST MODE

t

V

t

t

t

NORMAL M ODE

FBbmhys

Doc ID 15133 Rev 5 15/31

Operation descriptions VIPER27

Figure 23. Timing diagram: normal power-up and power-down sequences

V

V

DRAIN_START

IN

VIN< V

DRAIN_START

HV startup is no more ac tivated

V

DD

V

DDon

V

DDoff

V

DD(RESTART)

V

DRAIN

I

DD

I

(3mA)

DDch

Power-on

Normal operation

Figure 24. Soft-start: timing diagram

I

DRAIN

I

Dlim

V

FB

V

FBolp

V

FBlin

regulation is lost here

Power-off

t

time

time

time

time

V

OUT

t

( SOFT START- UP )

SS

16/31 Doc ID 15133 Rev 5

DELAY (OLP )

t

t

STEADY STATE

VIPER27 Operation descriptions

7.4 Power down operation

At converter power down, the system loses regulation as soon as the input voltage is so low
that the peak current limitation is reached. The V
the V

threshold (see

DDoff

Table 7 on page 6

) the power MOSFET is switched OFF, the

energy transfers to the IC interrupted and consequently the V

Figure 23 on page 16

. Later, if the VIN is lower than V

voltage drops and when it falls below

DD

voltages decreases,

DD

(see

DRAIN_START

Table 7 on page 6

),
the start up sequence is inhibited and the power down completed. This feature is useful to
prevent converter’s restart attempts and ensures monotonic output voltage decay during the
system power down.

7.5 Auto restart operation

If after a converter power down, the VIN is higher than V
is not inhibited and will be activated only when the V
V

DD(RESTART)

generator restarts the V
V

DD(RESTART)

threshold (see

Table 7 on page 6

capacitor charging only when the VDD voltage drops below

DD

). This means that the HV start up current

. The scenario above described is for instance a power down because of a

DRAIN_START,

voltage drops down the

DD

fault condition. After a fault condition, the charging current, I

DDch

the start up sequence

, is 0.6 mA (typ.) instead of
the 3 mA (typ.) of a normal start up converter phase. This feature together with the low
V

DD(RESTART)

threshold ensures that, after a fault, the restart attempts of the IC has a very
long repetition rate and the converter works safely with extremely low power throughput.
The

Figure 25

shows the IC behavioral after a short circuit event.

Figure 25. Timing diagram: behavior after short circuit

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7.6 Oscillator

The switching frequency is internally fixed to 60 kHz or 115 kHz. In both case the switching
frequency is modulated by approximately ±4 kHz (60 kHz version) or ±8 kHz
(115 kHz version) at 250 Hz (typical) rate, so that the resulting spread-spectrum action
distributes the energy of each harmonic of the switching frequency over a number of side­band harmonics having the same energy on the whole but smaller amplitudes.

W

W

Doc ID 15133 Rev 5 17/31

Operation descriptions VIPER27

7.7 Current mode conversion with adjustable current limit set point

The device is a current mode converter: the drain current is sensed and converted in voltage
that is applied to the non inverting pin of the PWM comparator. This voltage is compared
with the one on the feed-back pin through a voltage divider on cycle by cycle basis.

The

VIPER27 has a default current limit value, I

the electrical specification, by the R

page 11

.

LIM

resistor connected to the CONT see

, that the designer can adjust according

Dlim

Figure 16 on

The CONT pin has a minimum current sunk needed to activate the I
R

or with high R

LIM

Table 8 on page 7

(i.e. 100 kΩ) the current limit is fixed to the default value (see I

LIM

).

7.8 Overvoltage protection (OVP)

The VIPER27 has integrated the logic for the monitor of the output voltage using as input
signal the voltage V
the voltage from the auxiliary winding tracks the output voltage, through the turn ratio

N

AUX

--------------

N

SEC

The CONT pin has to be connected to the auxiliary winding through the diode D
resistors R
the voltage V

on page 7

and R

OVP

CONT

) the overvoltage protection will stop the power MOSFET and the converter enters

the auto-restart mode.

In order to bypass the noise immediately after the turn off of the power MOSFET, the voltage
V

is sampled inside a short window after the time T

CONT

the

Figure 26 on page 19

digital signal and increments the internal counter. The same counter is reset every time the
signal OVP is not triggered in one oscillator cycle.

Referring to the

Figure 21

during the OFF time of the power MOSFET. This is the time when

CONT

as shows the

LIM

Figure 27 on page 20

exceeds, four consecutive times, the reference voltage V

. The sampled signal, if higher than V

, the resistors divider ratio k

When, during the OFF time,

STROBE

OVP

, see

OVP

will be given by:

adjustment: without

Dlim

OVP

(see

OVP

Table 8 on page 7

,

Dlim

and the

Ta bl e 8

and

, trigger the internal OVP

Equation 2

k

OVP

------------- ------------ ------------- ------------- ------------- ------------ ------------- ----------=

N

AUX

--------------

N

SEC

Equation 3

18/31 Doc ID 15133 Rev 5

k

V

OUTOVPVDSEC

------------- ------------- --------=

OVP

R

LIMROVP

V

OVP

+()V

R

LIM

+

–⋅

DAUX

VIPER27 Operation descriptions

Where:

● V

● V

● N

● N

● V

● V

● R

Than, fixed R

is the OVP threshold (see

OVP

OUT OVP

AUX

SEC

DSEC

DAUX

OVP

is the converter output voltage value to activate the OVP set by designer

is the auxiliary winding turns

is the secondary winding turns

is the secondary diode forward voltage

is the auxiliary diode forward voltage

together R

according to the desired I

LIM,

make the output voltage divider

LIM

Table 8 on page 7

Dlim

, the R

)

can be calculating by:

OVP

Equation 4

1k

–

OVP

R

OVP

------------ -----------

R

×=

LIM

k

OVP

The resistor values will be such that the current sourced and sunk by the CONT pin be
within the rated capability of the internal clamp.

Figure 26. OVP timing diagram

V

V

DS

DS

V

AUX

0

0

V

CONT

V

OVP

0.5 µs

0.5 µs

2 µs

STROBE

STROBE

OVP

OVP

COUNTER

COUNTER

RESET

RESET

COUNTER

COUNTER

STATUS

STATUS

FAULT

FAULT

2 µs

0 0 0

0 0 0

0 →11 →22 →0

0 →11 →22 →0

0

0

22 →3

0 →11

0 →11

22 →3

→

→

t

t

t

t

t

t

t

t

t

t

3

3

→

→

ERULIAF POOL KCABDEEFECNABRUTSID YRAROPMETNOITAREPO LAMRON

ERULIAF POOL KCABDEEFECNABRUTSID YRAROPMETNOITAREPO LAMRON

t

4

4

t

t

t

t

Doc ID 15133 Rev 5 19/31

Operation descriptions VIPER27

7.9 About CONT pin

Referring to the

Figure 27

, through the CONT pin, the below features can be implemented:

1. Current limit set point

2. Over voltage protection on the converter output voltage

The

Table 9 on page 20

referring to the

Figure 27

, lists the external components needed to

activate one or plus of the CONT pin functions.

Figure 27. CONT pin configuration

OVP

LOGIC

OVP

SOFT

START

LIM

(1)

OCP

BLOCK

Daux

Auxiliary
winding

R

OV P

CONT

R

LIM

Table 9. CONT pin configurations

Function / component R

From R

SENSE

R

OVP

-

+

OCP

to GATE driver

D

AUX

I

1. R

reduction See

Dlim

OVP ≥

I

reduction + OVP See

Dlim

has to be fixed before of R

LIM

OVP

Figure 16

80 k

Figure 16

7.10 Feed-back and overload protection (OLP)

The VIPER27 is a current mode converter: the feedback pin controls the PWM operation,
controls the burst mode and actives the overload protection.

Figure 29

With the feedback pin voltage between
current is sensed and converted in voltage that is applied to the non inverting pin of the
PWM comparator. See

This voltage is compared with the one on the feedback pin through a voltage divider on
cycle by cycle basis. When these two voltages are equal, the PWM logic orders the switch
off of the power MOSFET. The drain current is always limited to I

In case of overload the feedback pin increases in reaction to this event and when it goes
higher than
the OCP comparator, see

show the internal current mode structure.

V

and V

FBbm

Figure 2 on page 3

V

, the PWM comparator is disabled and the drain current is limited to I

FBlin

Figure 2 on page 3

.

.

Ω See

See

Figure 28 on page 22

, (see

FBlin

Table 8 on page 7

No No

Equation 4

Equation 4

) the drain

value.

Dlim

Ye s

Ye s

and

Dlim

by

20/31 Doc ID 15133 Rev 5

VIPER27 Operation descriptions

When the feedback pin voltage reaches the threshold V
starts to charge the feedback capacitor (C

V

threshold, the converter is turned off and the start up phase is activated with reduced

FBolp

value of I

to 0.6 mA, see

DDch

Table 7 on page 6

) and when the feedback voltage reaches the

FB

.

During the first start up phase of the converter, after the soft-start up time, t
voltage could force the feedback pin voltage to rise up to the

an internal current generator

FBlin

, the output

V

threshold that switches

FBolp

SS

off the converter itself.

To avoid this event, the appropriate feedback network has to be selected according to the
output load. More the network feedback fixes the compensation loop stability. The

on page 22

The time from the over load detection (V
(V

FB

= V

and

Figure 29

) can be set by CFB value (see

FBolp

show the two different feedback networks.

FB

= V

) to the device shutdown

FBlin

Figure 28 on page 22

and

Figure 29

Figure 28

), using the

formula:

Equation 5

V

–

FBolpVFBlin

C

×=

FB

------------- ------------- ------------ - -

3μA

In the

Figure 28

T

OLP delay–

, the capacitor connected to FB pin (CFB) is part of the compensation circuit

as well as it needs to activate the over load protection (see equation 5).

After the start up time, t

, during which the feedback voltage is fixed at V

SS

, the output

FBlin

capacitor could not be at its nominal value and the controller interprets this situation as an
over load condition. In this case, the OLP delay helps to avoid an incorrect device shut down
during the start up phase.

Owing to the above considerations, the OLP delay time must be long enough to by-pass the
initial output voltage transient and check the over load condition only when the output
voltage is in steady state. The output transient time depends from the value of the output
capacitor and from the load.

When the value of the C

capacitor calculated for the loop stability is too low and cannot

FB

ensure enough OLP delay, an alternative compensation network can be used and it is
showed in

Using this alternative compensation network, two poles (f
introduced by the capacitors C

The capacitor C

Figure 29 on page 22

FB

introduces a pole (f

FB

.

and C

, f

and the resistor R

FB1

) at higher frequency than fZB and f

PFB

PFB

) and one zero (f

PFB1

.

FB1

PFB1

) are

ZFB

. This pole
is usually used to compensate the high frequency zero due to the ESR (equivalent series
resistor) of the output capacitance of the fly-back converter.

The mathematical expressions of these poles and zero frequency, considering the scheme
in

Figure 29

are reported by the equations below:

Equation 6

f

=

ZFB

1

RC2

⋅⋅π⋅

1FB1FB

Doc ID 15133 Rev 5 21/31

Operation descriptions VIPER27

Equation 7

RR

+

f

PFB

=

()

1FB)DYN(FB

RRC2

⋅⋅⋅π⋅

1FB)DYN(FBFB

Equation 8

1

()

RRC2

+⋅⋅π⋅

)DYN(FB1FB1FB

results much higher than CFB.

FB1

FB1

The R

The C
The

FB(DYN)

FB1

Equation 5

is the dynamic resistance seen by the FB pin.

capacitor fixes the OLP delay and usually C

can be still used to calculate the OLP delay time but C

considered instead of C

f

=

1PFB

. Using the alternative compensation network, the designer can

FB

satisfy, in all case, the loop stability and the enough OLP delay time alike.

Figure 28. FB pin configuration

From sense FET

Cfb

PWM

CONTROL

BURST-MODE

REFERENCES

OLP comparator

4.8V

PWM

+

-

BURST-MODE

LOGIC

+

-

To PWM Logic

BURST

To disable logic

has to be

Figure 29. FB pin configuration

Rfb1

Cfb1

22/31 Doc ID 15133 Rev 5

Cfb

PWM

CONTROL

BURST-MODE
REFERENCES

OLP comparator

4.8V

From sense FET

PWM

+

-

BURST-MODE

LOGIC

+

-

To PWM Logic

BURST

To disable logic

VIPER27 Operation descriptions

7.11 Burst-mode operation at no load or very light load

When the load decrease the feedback loop reacts lowering the feedback pin voltage. If it
falls down the burst mode threshold, V
switched on. After the MOSFET stops, as a result of the feedback reaction to the energy
delivery stop, the feedback pin voltage increases and exceeding the level, V
V

FBbmhys

reported on

, the power MOSFET starts switching again. The burst mode thresholds are

Ta bl e 8

and

Figure 30

shows this behavior. Systems alternates period of time
where power MOSFET is switching to period of time where power MOSFET is not switching;
this device working mode is the burst mode. The power delivered to output during switching
periods exceeds the load power demands; the excess of power is balanced from not
switching period where no power is processed. The advantage of burst mode operation is
an average switching frequency much lower then the normal operation working frequency,
up to some hundred of hertz, minimizing all frequency related losses. During the burst-mode
the drain current peak is clamped to the level, I

Figure 30. Burst mode timing diagram, light load management

V

FB

V

FBbm

, the power MOSFET is not more allowed to be

FBbm

FBbm

, reported on

D_BM

Ta bl e 8

.

100

+

50 mV

50 mV

hyster.

hyster.

I

DRAIN

Normal - mode

Normal - mode Normal - mode

7.12 Brown-out protection

Brown-out protection is a not-latched shutdown function activated when a condition of mains
under voltage is detected. The Brown-out comparator is internally referenced to V
threshold, see
is below this internal reference. Under this condition the power MOSFET is turned off. Until
the Brown out condition is present, the V

and the UVLO thresholds, as shown in the timing diagram of

V

DDon

voltage hysteresis is present to improve the noise immunity.

The switching operation is restarted as the voltage on the pin is above the reference plus the
before said voltage hysteresis. See

The Brown-out comparator is provided also with a current hysteresis, I
has to set the rectified input voltage above which the power MOSFET starts switching after
brown out event, V
switched off, V
be set separately.

Table 8 on page 7

INon

. Thanks to the I

INoff

t

t

t

BRth

t

Burst-mode

Burst-mode Burst-mode

Normal - mode

Normal - mode Normal - mode

, and disables the PWM if the voltage applied at the BR pin

voltage continuously oscillates between the

DD

Figure 31 on page 24

Figure 5 on page 9

.

. The designer

BRhyst

, and the rectified input voltage below which the power MOSFET is

, see

BRhyst

Table 8 on page 7

, these two thresholds can

. A

Doc ID 15133 Rev 5 23/31

Operation descriptions VIPER27

Figure 31. Brown-out protection: BR external setting and timing diagram

V
V

V

INon
INoff

IN

V

BR

V

V

I

BRhyst

V

V

V

DRAIN

V

BRth

in_OK

I

BR

V

DD

DDon

DDo

OUT

Figure 31

and RL:

H

, the following relationships

V

DD

V

DIS

BRth

and the V

Vcc

+

-

+

-

AC_OK D is able

V

in_OK

levels, with reference to

INoff

V

IN

Rh

BR

I

Rl

BRhyst

Fixed the V

V

INon

can be established for the calculation of the resistors R

t

t

t

t

t

t

t

t

t

t

t

t

t

t

Equation 9

V

R ×

BRhyst

L

I

BRhyst

+−=

VVV

−−

BRhystINoffINon

VV

−

BRthINoff

V

BRth

I

BRhyst

Equation 10

R

=

H

I

For a proper operation of this function, V
minimum mains and V

less than the minimum voltage on the input bulk capacitor at

IN off

minimum mains and maximum load.

The BR pin is a high impedance input connected to high value resistors, thus it is prone to
pick up noise, which might alter the OFF threshold when the converter operates or gives
origin to undesired switch-off of the device during ESD tests.

It is possible to bypass the pin to ground with a small film capacitor (e.g. 1-10 nF) to prevent
any malfunctioning of this kind.

If the brown-out function is not used the BR pin has to be connected to GND, ensuring that
the voltage is lower than the minimum of V
enable the brown-out function the BR pin voltage has to be higher than the maximum of

threshold (150 mV, see

V

DIS

24/31 Doc ID 15133 Rev 5

Ta bl e 8

BRhyst

).

VVV

−−

BRhystINoffINon

×

must be less than the peak voltage at

IN on

threshold (50 mV, see

DIS

R

L

V

R

BRhyst

+

L

I

BRhyst

Ta bl e 8

). In order to

VIPER27 Operation descriptions

7.13 2nd level over current protection and hiccup mode

The VIPER27 is protected against short circuit of the secondary rectifier, short circuit on the
secondary winding or a hard-saturation of fly-back transformer. Such as anomalous

, see

condition is invoked when the drain current exceed the threshold I

page 7

.

DMAX

To distinguish a real malfunction from a disturbance (e.g. induced during ESD tests) a
“warning state” is entered after the first signal trip. If in the subsequent switching cycle the
signal is not tripped, a temporary disturbance is assumed and the protection logic will be
reset in its idle state; otherwise if the I

threshold is exceeded for two consecutive

DMAX

switching cycles a real malfunction is assumed and the power MOSFET is turned OFF.

The shutdown condition is latched as long as the device is supplied. While it is disabled, no
energy is transferred from the auxiliary winding; hence the voltage on the V
decays till the V

under voltage threshold (V

DD

The start up HV current generator is still off, until V
V

DD(RESTART)

and the converter switching restarts if the V

. After this condition the VDD capacitor is charged again by 600 µA current,

DDon

), which clears the latch.

DDoff

voltage goes below its restart voltage,

DD

occurs. If the fault condition is not removed
the device enters in auto-restart mode. This behavioral results in a low-frequency
intermittent operation (Hiccup-mode operation), with very low stress on the power circuit.
See the timing diagram of

Figure 32

.

Tab le 8 o n

capacitor

DD

Figure 32. Hiccup-mode OCP: timing diagram

V

Vcc

V

DD

DD

V

DD

on

V

off

DD

(RESTART)

I

DRAIN

I

DMAX

V

DRAIN

Secondary diode is shorted here

Secondary diode is shorted here

t

t

t

t

t

t

Doc ID 15133 Rev 5 25/31

Package mechanical data VIPER27

8 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

Table 10. DIP-7 mechanical data

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

mm

Dim.

Min. Typ. Max.

A 5.33

A1 0.38

A2 2.92 3.30 4.95

b 0.36 0.46 0.56

b2 1.14 1.52 1.78

c 0.20 0.25 0.36

D 9.02 9.27 10.16

E 7.62 7.87 8.26

E1 6.10 6.35 7.11

e 2.54

eA 7.62

eB 10.92

L 2.92 3.30 3.81

M 2.508

N 0.40 0.50 0.60

N1 0.60

O 0.548

26/31 Doc ID 15133 Rev 5

VIPER27 Package mechanical data

Figure 33. Package dimensions

Doc ID 15133 Rev 5 27/31

Package mechanical data VIPER27

Table 11. SO16 narrow mechanical data

mm

Dim.

Min. Typ. Max.

A 1.75

A1 0.1 0.25

A2 1.25

b 0.31 0.51

c 0.17 0.25

D 9.8 9.9 10

E 5.8 6 6.2

E1 3.8 3.9 4

e 1.27

h 0.25 0.5

L 0.4 1.27

k 0 8

ccc 0.1

28/31 Doc ID 15133 Rev 5

VIPER27 Package mechanical data

Figure 34. SO16 narrow mechanical data

Doc ID 15133 Rev 5 29/31

Revision history VIPER27

9 Revision history

Table 12. Document revision history

Date Revision Changes

16-Jan-2009 1 Initial release

20-Jul-2009 2 Added SO16 narrow package.

22-Oct-2009 3 Updated

Table 5 on page 5

.

16-Jun-2010 4 Updated

30-Jul-2010 5 Updated

Figure 3 on page 4

Figure 11, Figure 12

and

Table 3 on page 4

and

Figure 13

.

.

30/31 Doc ID 15133 Rev 5

VIPER27

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Doc ID 15133 Rev 5 31/31