– differential gain: 0.03%
– differential phase: 0.07°
– gain flatness: 6 MHz, 0.1 dB max. at 10 db
gain
TSH95
High-speed low-power quad operational
amplifier with dual standby position
D
SO16
(Plastic micropackage)
Pin connections (top view)
Applications
■ Video buffers
■ A/D converter drivers
Description
The TSH95 is a low-power, high-frequency quad
operational amplifier designated for high-quality
video processing. The device offers an excellent
speed consumption ratio with 4.5 mA per
amplifier for a 150 MHz bandwidth.
A high slew rate and low noise also make it
suitable for high-quality audio applications.
The TSH95 offers two separate complementary
STANDBY pins: STANDBY 1 acting on operators
1 and 2, and STANDBY 2 acting on operators 3
and 4.
These pins reduce the consumption of the
corresponding operators and put the output in a
high impedance state.
Output 1
Inverting Input 1
Non-inverting Input 1
V
Non-inverting Input 2
Inverting Input 2
Output 2
Standby 1
1
2
-
+
3
+
4
CC
5
+
-
6
7
8
+
+
16
15
-
14
13
12
11
10
Output 4
Inverting Input 4
Non-inverting Input 4
-
V
CC
Non-inverting Input 3
Inverting Input 3
Output 3
Standby 2
9
August 2009Doc ID 5243 Rev 21/19
www.st.com
19
Schematic diagramTSH95
1 Schematic diagram
Figure 1.Schematic diagram
+
V
CC
non inverting
input
inverting
input
stdby
stdby
Internal
V
ref
stdby
output
C
c
stdby
-
V
CC
2/19Doc ID 5243 Rev 2
TSH95Absolute maximum ratings and operating conditions
2 Absolute maximum ratings and operating conditions
Table 1.Absolute maximum ratings
SymbolParameterValueUnit
(3)
(1)
(6)
(2)
(5)
(4)
CC
+
+0.3 V.
14V
±5V
-0.3 to 12V
1.5
2
kV
kV
200
V
V
T
T
Supply voltage
CC
V
Differential input voltage
id
Input voltage
V
i
Operating free-air temperature range -40 to +125°C
oper
Storage temperature range-65 to +150°C
stg
CDM: charged device model
ESD
HBM: human body model
MM: machine model
1. All voltages values, except differential voltage, are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltages must never exceed V
4. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating
Table 2.Operating conditions
SymbolParameterValueUnit
V
Supply voltage7 to 12V
CC
Common mode input voltage rangeV
V
ic
CC
-
+2 to V
+
-1V
CC
Doc ID 5243 Rev 23/19
Electrical characteristicsTSH95
3 Electrical characteristics
Table 3.VCC+ = 5 V, VCC- = -5 V, pin 8 connected to 0 V, pin 9 connected to VCC+, T
amb
= 25° C
(unless otherwise specified)
SymbolParameterMin.Typ.Max.Unit
V
I
CMR
SVR
Avd
Input offset voltage Vic = Vo = 0 V
io
I
io
I
ib
≤ T
T
min.
amb
≤ T
max.
Input offset current
≤ T
T
min.
amb
≤ T
max.
Input bias current
≤ T
T
min.
amb
≤ T
max.
Supply current (per amplifier, no load)
CC
T
min.
≤ T
amb
≤ T
max.
Common-mode rejection ratio V
≤ T
T
min.
amb
≤ T
max.
Supply voltage rejection ratio V
T
≤ T
amb
≤ T
max.
min.
Large signal voltage gain R
T
≤ T
amb
≤ T
max.
min.
CC
= 10 kΩ, Vo = ±2.5 V
L
High level output voltage Vid = 1 V
V
OH
T
≤ T
≤ T
min.
amb
R
max.
Low level output voltage Vid = 11 V
V
OL
≤ T
≤ T
T
min.
amb
R
max.
Output short circuit current Vid = ±1 V
I
o
T
≤ T
≤ T
min.
GBP
SR
Gain bandwidth product
= 100, RL = 600 Ω, CL = 15 pF, f = 7.5 MHz90150
A
VCL
Transition frequency90MHz
f
T
Slew rate
V
= -2 to +2 V, RL = 600 Ω, CL = 15 pF62110
in
e
Equivalent input voltage noise Rs = 50 Ω, f = 1 kHz4.2nV/√ Hz
n
φmPhase margin A
V
O1/VO2
Channel separation f = 1 MHz to 10 MHz65dB
amb
Source
max.
= +135Degrees
VM
GfGain flatness f = DC to 6 MHz, A
THDTotal harmonic distortion f = 1 kHz, V
12
515
4.56
= -3 V to +4 V, Vo = 0 V
ic
80
100
70
= ±5 V to ±3 V
60
75
50
57
70
54
RL = 600 Ω
= 150 Ω
R
L
= 150 Ω
L
= 600 Ω
R
L
RL = 150 Ω
= 150 Ω
L
Source
Sink
3
2.5
2.4
20
20
3.5
3
-3.5
-2.8
36
40mA
15
Sink
= 10 dB0.1dB
VCL
= ±2.5 V, RL = 600 Ω0.01%
o
15
4
6
5
20
8
-3
-2.5
-2.4
mV
μA
μA
mA
dB
dB
dB
V
V
MHz
V/μs
4/19Doc ID 5243 Rev 2
TSH95Electrical characteristics
Table 3.VCC+ = 5 V, VCC- = -5 V, pin 8 connected to 0 V, pin 9 connected to VCC+, T
To put the device in standby, a logic level must be applied on the standby MOS input. Since
ground is a virtual level for the device, the threshold voltage has been referred to V
V
-1.6 V typical.
CC+
CC+
at
In standby mode, the output goes into high impedance in 200 ns. Note that all maximum
ratings must still be followed in this mode. This mode leads to a swing limitation while using
the device in a signal multiplexing configuration with followers; the differential input voltage
must not exceed ±5 V, limiting the input swing to 2.5 Vpp.
6/19Doc ID 5243 Rev 2
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