C bus driving:
– Standby
– Independent front/rear soft play/mute
– Selectable gain 26dB /12dB (for low noise
line output function)
– High efficiency enable/disable
2
–I
C bus digital diagnostics (including DC
and AC load detection)
(2%/10%)
warning
TDA7563A
with built-in diagnostics feature
PowerSO36
(Slug up)
Flexiwatt27 (Vertical)
Description
The TDA7563A is a new BCD technology Quad
Bridge type of car radio amplifier in Flexiwatt27 &
PowerSO36 packages specially intended for car
radio applications.
Thanks to the DMOS output stage the TDA7563A
has a very low distortion allowing a clear powerful
sound. Among the features, its superior efficiency
performance coming from the internal exclusive
structure, makes it the most suitable device to
simplify the thermal management in high power sets.
The dissipated output power under average
listening condition is in fact reduced up to 50%
when compared to the level provided by
conventional class AB solutions.
This device is equipped with a full diagnostics
array that communicates the status of each
speaker through the I
TDA7563ABlock, pins connection and application diagrams
1 Block, pins connection and application diagrams
Figure 1.Block diagram
CLK
DATA
VCC1
VCC2
ST-BY/MUTE
IN RF
I2CBUS
Mute1
Mute2
Thermal
Protection
& Dump
Reference
Clip
Detector
F
CD_OUT
OUT RF+
IN RR
IN LF
IN LR
SVR
R
F
R
AC_GND
Figure 2.Application circuit
C8
0.1μF
V(4V .. V
I2C BUS
IN RF
IN RR
IN LF
IN LR
)
CC
DATA
CLK
C1 0.22μF
C2 0.22μF
C3 0.22μF
C4 0.22μF
S-GND
RR
RF
PW_GND
C7
2200μF
2
26
23
16
15
12
13
14
C5
1μF
Vcc1
17115
C6
10μF
Short Circuit
Protection &
Diagnostic
Short Circuit
Protection &
Diagnostic
Short Circuit
Protection &
Diagnostic
Short Circuit
Protection &
Diagnostic
LF LR
Vcc2
721
18
19
20
22
25
24
10
1, 27
47K
CD OUT
OUT RF-
OUT RR+
OUT RR-
OUT LF+
OUT LF-
OUT LR+
OUT LR-
TAB
+
+
+
9
8
+
6
3
4
-
TAB
S_GND
OUT RF
OUT RR
OUT LF
OUT LR
V
D00AU1231A
5/35
Block, pins connection and application diagramsTDA7563A
6
0
Figure 3.Pin connections - Flexiwatt27 (Top view)
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TAB
DATA
PW_GND RR
OUT RR-
CK
OUT RR+
V
OUT RF-
PW_GND RF
OUT RF+
AC GND
IN RF
IN RR
S_GND
IN LR
IN LF
SVR
OUT LF+
PW_GND LF
OUT LF-
V
OUT LR+
CD-OUT
OUT LR-
PW_GND LR
STBY
TAB
Flexiwatt 27 (horizontal/SMD)
CC2
CC1
D00AU141
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Flexiwatt 27 (vertical)
TAB
DATA
PW_GND RR
OUT RR-
CK
OUT RR+
V
CC2
OUT RF-
PW_GND RF
OUT RF+
AC GND
IN RF
IN RR
S_GND
IN LR
IN LF
SVR
OUT LF+
PW_GND LF
OUT LF-
V
CC1
OUT LR+
CD-OUT
OUT LR-
PW_GND LR
STBY
TAB
D00AU123
Figure 4.Pin connections - PowerSO36 (Top view)
VCC
OUT3-
N.C.
N.C.
PWGND
OUT3+
ACGND
IN3
IN4
SGND1027
IN2
IN1
SVR1324
OUT1+
PWGND
N.C.
OUT1-
VCC
36
35
34
33
32
31
30
29
28
26
25
23
22
21
20
19
D04AU1547A
1
2
3
4
5
6
7
8
9
TAB
CK
N.C.
OUT4+
N.C.
PWGND
VCC
DATA
OUT4-
OUT2-
11
12
STBY
VCC
PWGND
14
15
16
17
18
N.C.
OUT2+
N.C.
N.C.
CD
6/35
TDA7563AElectrical specifications
2 Electrical specifications
2.1 Absolute maximum ratings
Table 1.Absolute maximum ratings
SymbolParameterValueUnit
T
V
V
V
V
peak
V
CK
DATA
I
O
I
O
P
stg
op
tot
Operating supply voltage18V
DC supply voltage28V
S
Peak supply voltage (for t = 50ms)50V
CK pin voltage6V
Data pin voltage6V
Output peak current (not repetitive t = 100ms)8A
Output peak current (repetitive f > 10Hz)6A
Power dissipation T
= 70°C85W
case
, TjStorage and junction temperature-55 to 150°C
2.2 Thermal data
Table 2.Thermal data
SymbolParameterPowerSO36Flexiwatt 27Unit
R
th j-case
Thermal resistance junction to caseMax11°C/W
2.3 Electrical characteristics
Table 3.Electrical characteristics
SymbolParameterTest conditionMin. Typ.Max.Unit
Power amplifier
V
S
I
d
P
O
(Refer to the test circuit, VS = 14.4V; f=1kHz; RL=4Ω; T
= 25°C unless otherwise specified)
amb
Supply voltage range818V
Total quiescent drain current170300mA
Output power
Max. power (V
wave input (2Vrms))
THD = 10%
THD = 1%
= 2Ω; EIAJ (VS = 13.7V)
R
L
RL = 2Ω; THD 10%
= 2Ω; THD 1%
R
L
= 2Ω; max power
R
L
= 15.2V, square
S
25
20
55
40
32
60
50W
28
22
68
50
40
75
7/35
W
W
W
W
W
W
Electrical specificationsTDA7563A
Table 3.Electrical characteristics (continued)
(Refer to the test circuit, VS = 14.4V; f=1kHz; RL=4Ω; T
SymbolParameterTest conditionMin. Typ.Max.Unit
= 25°C unless otherwise specified)
amb
THDTotal harmonic distortion
= 1 to 10W; STD MODE
P
O
HE MODE; PO = 1.5W
HE MODE; P
= 1-10W, f = 10kHz; STD mode0.150.5%
P
O
= 8W
O
0.015
0.01
0.1
0.1
0.1
0.5
RL = 2Ω; HE MODE; Po = 3W0.020.5%
= 12dB; STD mode
G
Cross talkf = 1kHz to 10kHz, Rg = 600Ω5060dB
C
T
R
G
ΔG
G
ΔG
E
E
Input impedance60100130KΩ
IN
Voltage gain 1 (default)252627dB
V1
Voltage gain match 1-11dB
V1
Voltage gain 2111213dB
V2
Voltage gain match 2-11 dB
V2
Output noise voltage 1
IN1
Output noise voltage 2
IN2
SVRSupply voltage rejection
V
= 0.1 to 5 V
V
O
RMS
Rg = 600Ω;
filter 20 Hz to 22 kHz
Rg = 600Ω; GV = 12dB
filter 20 Hz to 22 kHz
f = 100Hz to 10kHz; V
= 600Ω
R
g
= 1Vpk;
r
0.0150.1%
35µV
11µV
5070dB
BWPower bandwidth100kHz
A
I
A
V
V
T
T
V
V
CMRRInput CMRRV
V
I
CD
CD
Standby attenuation90110dB
SB
Standby currentV
SB
Mute attenuation80100dB
M
Offset voltageMute & Play-60060mV
OS
Min. supply mute threshold77.58V
AM
Turn on delayD2/D1 (IB1) 0 to 1520ms
ON
Turn off delayD2/D1 (IB1) 1 to 0520ms
OFF
Standby/mute pin for standby01.5V
SBY
Standby/mute pin for mute3.55V
MU
Standby/mute pin for operating7V
OP
V
Standby/mute pin current
MU
Clip det. high leakage currentCD off / VCD = 6V05μA
LK
Clip det. saturation voltageCD on; ICD = 1mA300mV
SAT
V
= 0110µA
standby
= 1Vpk-pk; Rg = 0 Ω55dB
CM
standby/mute
standby/mute
= 8.5V2040μA
< 1.5V05μA
S
%
%
%
V
8/35
TDA7563AElectrical specifications
Table 3.Electrical characteristics (continued)
(Refer to the test circuit, VS = 14.4V; f=1kHz; RL=4Ω; T
SymbolParameterTest conditionMin. Typ.Max.Unit
= 25°C unless otherwise specified)
amb
CD
Clip det. THD level
THD
D0 (IB1) = 0123%
Turn on diagnostics 1 (Power amplifier mode)
Short to GND det. (below this
D0 (IB1) = 151015%
Pgnd
limit, the output is considered in
1.2V
short circuit to GND)
Short to Vs det. (above this
Pvs
limit, the output is considered in
Vs -1.2V
short circuit to VS)
Power amplifier in standby
1.8Vs -1.8V
Pnop
Normal operation thresholds.
(within these limits, the output
is considered without faults).
LscShorted load det.0.5Ω
LopOpen load det.130Ω
LnopNormal load det.1.570Ω
Turn on diagnosticS 2 (Line driver mode)
Short to GND det. (below this
Pgnd
limit, the output is considered in
Power amplifier in standby1.2V
short circuit to GND)
Short to Vs det. (above this
Pvs
limit, the output is considered in
Vs -1.2V
short circuit to VS)
Normal operation thresholds.
Pnop
(within these limits, the output
1.8Vs -1.8V
is considered without faults).
LscShorted load det.1.5Ω
LopOpen load det.400Ω
LnopNormal load det.4.5200Ω
Permanent diagnostics 2 (Power amplifier mode or line driver mode)
Short to GND det. (below this
Pgnd
limit, the output is considered in
short circuit to GND)
Power amplifier in mute or play,
one or more short circuits
protection activated
Pvs
Short to Vs det. (above this
limit, the output is considered in
short circuit to Vs)
Normal operation thresholds.
Pnop
(within these limits, the output
is considered without faults).
Power amplifier mode0.5Ω
L
Shorted load det.
SC
Line driver mode1.5Ω
9/35
1.2V
Vs -1.2V
1.8Vs -1.8V
Electrical specificationsTDA7563A
)
(V)
Po (W)
THD (%)
Table 3.Electrical characteristics (continued)
(Refer to the test circuit, VS = 14.4V; f=1kHz; RL=4Ω; T
SymbolParameterTest conditionMin. Typ.Max.Unit
= 25°C unless otherwise specified)
amb
V
I
2
C bus interface
I
S
V
V
Offset detection
O
Normal load current detection
I
NL
Open load current detection250mA
OL
Clock frequency400kHz
CL
Input low voltage1.5V
IL
Input high voltage2.3V
IH
Power amplifier in play, STD mode
AC input signals = 0
VO < (VS-5)pk
±1.5±2±2.5V
500mA
2.4 Electrical characteristics curves
Figure 5.Quiescent current vs. supply voltageFigure 6.Output power vs. supply voltage (4Ω)
Id (mA)
250
230
210
190
170
150
130
110
Vin = 0
NO LOADS
90
70
8 1012141618
Vs (V)
Po (W)
70
65
60
55
50
45
40
35
30
25
20
15
10
RL = 4 Ohm
f = 1 KHz
5
89101112131415161718
Vs (V
Po-max
THD = 10 %
THD = 1 %
Figure 7.Output power vs. supply voltage (2Ω) Figure 8.Distortion vs. output power (4Ω, STD)
Po (W)
100
90
80
70
60
50
40
30
20
10
RL = 2 Ohm
f = 1 KHz
8910111213141516
Vs
Po-max
THD = 10 %
THD = 1 %
10/35
10
STANDARD M ODE
= 14.4 V
V
S
R
= 4Ω
L
1
f = 10 KHz
0.1
0.01
0.001
0.1110100
f = 1 KHz
AC00251
TDA7563AElectrical specifications
Po (W)
THD (%)
f = 10 KHz
Po (W)
THD (%)
STANDARD MODE
V
S
= 14.4 V
R
L
= 2
Ω
f = 10 KHz
f (Hz)
THD (%)
f (Hz)
THD (%)
f (Hz)
CROSSTALK (dB)
f (Hz)
SVR (dB)
Figure 9.Distortion vs. output power (4Ω, HI-
EFF)
10
HI - EFF MODE
= 14.4 V
V
S
= 4
R
Ω
L
1
0.1
0.01
0.001
0.1110100
f = 1 KHz
Figure 10. Distortion vs. output power (2Ω,
STD)
AC00252
10
1
0.1
0.01
0.001
0.1110100
f = 1 KHz
Figure 11. Distortion vs. frequency (4Ω)Figure 12. Distortion vs. frequency (2Ω)
10
STANDARD M ODE
V
R
1
Po = 4 W
= 14.4 V
S
Ω
= 4
L
AC00254
10
STANDARD M ODE
V
R
1
Po = 8 W
= 14.4 V
S
Ω
= 2
L
AC00253
AC00255
0.1
0.01
0.001
10100100010000100000
0.1
0.01
0.001
10100100010000100000
Figure 13. Crosstalk vs. frequencyFigure 14. Supply voltage rejection vs.
frequency
AC00256
-20
-30
STANDARD M ODE
Ω
= 4
R
L
P
= 4 W
o
-40
Rg = 600
Ω
-50
-60
-70
-80
-90
-100
10100100010000100000
-20
STD & HE MODE
-30
-40
Ω
R
= 600
g
Vrip ple = 1 Vrm s
-50
-60
-70
-80
-90
-100
10100100010000100000
AC00257
11/35
Electrical specificationsTDA7563A
(W)
)
(W)
(W)
Figure 15. Power dissipation and efficiency vs.
output power (4Ω, STD, SINE)
Ptot (W)
90
STANDARD MODE
80
Vs = 14.4 V
RL = 4 x 4 Ohm
70
f = 1 KHz SINE
60
50
40
30
20
10
0
0 2 4 6 8 1012141618202224262830
Po
n
Ptot
n (%)
90
80
70
60
50
40
30
20
10
0
Figure 17. Power dissipation vs. average
output power (audio program
simulation, 4Ω)
Ptot (W)
45
40
Vs = 14 V
RL = 4 x 4 Ohm
35
GAUSSIAN NOISE
30
25
20
15
10
5
0
012345
Po
CLIP
START
STD MODE
AC00258
HI-EFF MODE
Figure 16. Power dissipation and efficiency vs.
output power (4Ω, HI-EFF, SINE)
Ptot (W)
90
80
70
60
50
40
30
20
10
0
0.1110
HI-EFF MODE
Vs = 14.4 V
RL = 4 x 4 Ohm
f = 1 KHz SINE
Po (W
Ptot
n
n (%)
90
80
70
60
50
40
30
20
10
0
Figure 18. Power dissipation vs. average
output power (audio program
simulation, 2Ω)
Ptot (W)
90
80
Vs = 14 V
RL = 4 x 2 Ohm
70
GAUSSIAN NOISE
60
50
40
30
20
10
0
0123456789
Po
CLIP
START
STD MODE
HI-EFF MODE
AC00259
12/35
TDA7563ADiagnostics functional description
3 Diagnostics functional description
3.1 Turn-on diagnostic
It is activated at the turn-on (standby out) under I2C bus request. Detectable output faults
are:
–SHORT TO GND
–SHORT TO Vs
–SHORT ACROSS THE SPEAKER
–OPEN SPEAKER
To verify if any of the above misconnections are in place, a subsonic (inaudible) current
pulse (Figure 19) is internally generated, sent through the speaker(s) and sunk back.The
Turn On diagnostic status is internally stored until a successive diagnostic pulse is
requested (after a I
If the "standby out" and "diagnostic enable" commands are both given through a single
programming step, the pulse takes place first (power stage still in standby mode, low,
outputs = high impedance).
Afterwards, when the amplifier is biased, the PERMANENT diagnostic takes place. The
previous Turn On state is kept until a short appears at the outputs.
2
C reading).
Figure 19. Turn-on diagnostic: working principle
Vs~5V
Isource
CH+
CH-
Isink
I (mA)
Isource
Isink
~100mS
Measure time
t (ms)
Figure 20 and 21 show SVR and OUTPUT waveforms at the turn-on (standby out) with and
without TURN-ON DIAGNOSTIC.
13/35
Diagnostics functional descriptionTDA7563A
Figure 20. SVR and output behavior (case 1: without turn-on diagnostic)
Vsvr
Out
Permanent diagnostic
acquisition time (100mS Typ)
Bias (power amp turn-on)
I2CB DATA
Diagnostic Enable
(Permanent)
FAULT
event
Permanent Diagnostics data (output)
permitted time
Read Data
Figure 21. SVR and output pin behavior (case 2: with turn-on diagnostic)
Vsvr
Out
Diagnostic Enable
Turn-on diagnostic
acquisition time (100mS Typ)
(Turn-on)
Bias (power amp turn-on)
permitted time
Turn-on Diagnostics data (output)
permitted time
Read Data
Diagnostic Enable
(Permanent)
Permanent diagnostic
acquisition time (100mS Typ)
FAULT
event
Permanent Diagnostics d ata (output)
permitted time
t
t
I2CB DATA
The information related to the outputs status is read and memorized at the end of the
current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the
process. As for SHORT TO GND / V
the fault-detection thresholds remain unchanged from
S
26 dB to 12 dB gain setting. They are as follows:TDA7563A
Figure 22. Thresholds for short to GND/V
S.C. to GNDxS.C. to Vs
0V1.8VVS-1.8VV
14/35
1.2VVS-1.2V
S
xNormal Operation
D01AU1253
S
TDA7563ADiagnostics functional description
Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies
from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's
impedance or high impedance). The values in case of 26 dB gain are as follows:
Figure 23. Thresholds for short across the speaker/open speaker
S.C. across Load xOpen Load
0V1.5Ω
0.5Ω
If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the
same thresholds will change as follows:
Figure 24. Thresholds for line-drivers
S.C. across Load xOpen Load
0Ω4.5Ω200Ωinfinite
1.5Ω400Ω
3.2 Permanent diagnostics
Detectable conventional faults are:
–Short to GND
–Short to Vs
–Short across the speaker
The following additional features are provided:
–Output offset detection
70Ω
xNormal Operation
130Ω
D01AU1254
xNormal Operation
D01AU1252
Infinite
The TDA7563A has 2 operating statuses:
1.RESTART mode. The diagnostic is not enabled. Each audio channel operates
independently from each other. If any of the a.m. faults occurs, only the channel(s)
interested is shut down. A check of the output status is made every 1 ms (Figure 25).
Restart takes place when the overload is removed.
2. DIAGNOSTIC mode. It is enabled via I
2
C bus and self activates if an output overload
(such to cause the intervention of the short-circuit protection) occurs to the speakers
outputs. Once activated, the diagnostics procedure develops as follows (Figure 26):
–To avoid momentary re-circulation spikes from giving erroneous diagnostics, a
check of the output status is made after 1ms: if normal situation (no overloads) is
detected, the diagnostic is not performed and the channel returns back active.
–Instead, if an overload is detected during the check after 1 ms, then a diagnostic
cycle having a duration of about 100 ms is started.
–After a diagnostic cycle, the audio channel interested by the fault is switched to
RESTART mode. The relevant data are stored inside the device and can be read
by the microprocessor. When one cycle has terminated, the next one is activated
15/35
Diagnostics functional descriptionTDA7563A
by an I2C reading. This is to ensure continuous diagnostics throughout the carradio operating time.
–To check the status of the device a sampling system is needed. The timing is
chosen at microprocessor level (over half a second is recommended).
Figure 25. Restart timing without diagnostic enable (permanent) - Each 1ms time, a
sampling of the fault is done
Out
1-2mS
1mS1mS1mS
1mS
Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
Short circuit removed
Figure 26. Restart timing with diagnostic enable (permanent)
1-2mS100/200mS1mS1mS
Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
t
t
Short circuit removed
16/35
TDA7563AOutput DC offset detection
4 Output DC offset detection
Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a
consequence of initially defective or aged and worn-out input capacitors feeding a DC
component to the inputs, so putting the speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop"
command):
–START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1
–STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature
is disabled if any overloads leading to activation of the short-circuit protection occurs in the
process.
4.1 AC diagnostic
It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more
in general, presence of capacitively (AC) coupled loads.
This diagnostic is based on the notion that the overall speaker's impedance (woofer +
parallel tweeter) will tend to increase towards high frequencies if the tweeter gets
disconnected, because the remaining speaker (woofer) would be out of its operating range
(high impedance). The diagnostic decision is made according to peak output current
thresholds, as follows:
Iout > 500mApk = NORMAL STATUS
Iout < 250mApk = OPEN TWEETER
To correctly implement this feature, it is necessary to briefly provide a signal tone (with the
amplifier in "play") whose frequency and magnitude are such to determine an output current
higher than 500mApk with in normal conditions and lower than 250mApk should the parallel
tweeter be missing.
The test has to last for a minimum number of 3 sine cycles starting from the activation of the
AC diagnostic function IB2<D2>) up to the I
confirm presence of tweeter, it is necessary to find at least 3 current pulses over 500mA
over all the measuring period, else an "open tweeter" message will be issued.
The frequency / magnitude setting of the test tone depends on the impedance
characteristics of each specific speaker being used, with or without the tweeter connected
(to be calculated case by case). High-frequency tones (> 10 kHz) or even ultrasonic signals
are recommended for their negligible acoustic impact and also to maximize the impedance
module's ratio between with tweeter-on and tweeter-off.
Figure 27 shows the Load Impedance as a function of the peak output voltage and the
relevant diagnostic fields.
This feature is disabled if any overloads leading to activation of the short-circuit protection
occurs in the process.
2
C reading of the results (measuring period). To
17/35
Output DC offset detectionTDA7563A
Figure 27. Current detection: Load impedance |Z| vs. output peak voltage
Load |z| (Ohm)
50
Low current detection area
30
20
10
D5 = 1 of the DBx byres
(Open load)
Iout (peak) <250mA
Iout (peak) >500mA
5
3
2
1
12345678
4.2 Multiple faults
When more misconnections are simultaneously in place at the audio outputs, it is
guaranteed that at least one of them is initially read out. The others are notified after
successive cycles of I
This is true for both kinds of diagnostic (Turn on and Permanent).
The table below shows all the couples of double-fault possible. It should be taken into
account that a short circuit with the 4 ohm speaker unconnected is considered as double
fault.
Table 4.Double fault table for turn on diagnostic
S. GND (so)S. GND (sk)S. VsS. Across L.Open L.
S. GND (so)S. GNDS. GNDS. Vs + S. GNDS. GNDS. GND
High current detection area
(Normal load)
D5 = 0 of the DBx bytes
Vout (Peak)
2
C reading and faults removal, provided that the diagnostic is enabled.
S. GND (sk)/S. GNDS. VsS. GNDOpen L. (*)
S. Vs//S. VsS. VsS. Vs
S. Across L.///S. Across L.N.A.
Open L.////Open L. (*)
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2
outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More
precisely, in Channels LF and RR, so = CH+, sk = CH-; in Channels LR and RF, so = CH-, sk
= CH+.
In Permanent Diagnostic the table is the same, with only a difference concerning Open
Load(*), which is not among the recognizable faults. Should an Open Load be present
during the device's normal working, it would be detected at a subsequent Turn on Diagnostic
cycle (i.e. at the successive Car Radio Turn on).
18/35
TDA7563AOutput DC offset detection
4.3 Faults availability
All the results coming from I2C bus, by read operations, are the consequence of
measurements inside a defined period of time. If the fault is stable throughout the whole
period, it will be sent out.
To guarantee always resident functions, every kind of diagnostic cycles (Turn on,
Permanent, Offset) will be reactivate after any I
reads the I
2
C, a new cycle will be able to start, but the read data will come from the previous
2
C reading operation. So, when the micro
diag. cycle (i.e. The device is in Turn On state, with a short to Gnd, then the short is
removed and micro reads I
result of the previous cycle. If another I
the short). In general to observe a change in Diagnostic bytes, two I
2
C. The short to Gnd is still present in bytes, because it is the
2
C reading operation occurs, the bytes do not show
2
C reading operations
are necessary.
19/35
Thermal protectionTDA7563A
5 Thermal protection
Thermal protection is implemented through thermal foldback (Figure 28).
Thermal foldback begins limiting the audio input to the amplifier stage as the junction
temperatures rise above the normal operating range. This effectively limits the output power
capability of the device thus reducing the temperature to acceptable levels without totally
interrupting the operation of the device.
The output power will decrease to the point at which thermal equilibrium is reached.
Thermal equilibrium will be reached when the reduction in output power reduces the
dissipated power such that the die temperature falls below the thermal foldback threshold.
Should the device cool, the audio level will increase until a new thermal equilibrium is
reached or the amplifier reaches full power. Thermal foldback will reduce the audio output
level in a linear manner.
Three Thermal warning are available through the I
Figure 28. Thermal foldback diagram
TH. WARN.
Vout
TH. WARN.
ON
TH. WARN.
ON
ON
2
C bus data.
Vout
CD out
125°
155°
TH. SH.
START
(with same input
> T
SD
140°
< T
SD
signal)
TH. SH.
END
°C)
Tj (
Tj ( °C)
Tj ( °C)
20/35
TDA7563AFast muting
6 Fast muting
The muting time can be shortened to less than 1.5ms by setting (IB2) D5 = 1. This option
can be useful in transient battery situations (i.e. during car engine cranking) to quickly
turnoff the amplifier for avoiding any audible effects caused by noise/transients being
injected by preamp stages. The bit must be set back to “0” shortly after the mute transition.
21/35
I2C busTDA7563A
7 I2C bus
7.1 I2C programming/reading sequences
A correct turn on/off sequence respectful of the diagnostic timings and producing no audible
noises could be as follows (after battery connection):
TURN-ON: PIN2 > 7V --- 10ms --- (STANDBY OUT + DIAG ENABLE) --- 500 ms (min) --MUTING OUT
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STANDBY IN) --- 10ms --- PIN2 = 0
Car Radio Installation: PIN2 > 7V --- 10ms DIAG ENABLE (write) --- 200 ms --- I2C read
(repeat until All faults disappear).
OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I
2
I
C reading until high-offset message disappears).
7.2 I2C bus interface
2
C reading (repeat
Data transmission from microprocessor to the TDA7563A and vice versa takes place
through the 2 wires I
resistors to positive supply voltage must be connected).
2
C BUS interface, consisting of the two lines SDA and SCL (pull-up
7.3 Data validity
As shown by Figure 29, the data on the SDA line must be stable during the high period of
the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL
line is LOW.
7.4 Start and stop conditions
As shown by Figure 30 a start condition is a HIGH to LOW transition of the SDA line while
SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
7.5 Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
22/35
TDA7563AI2C bus
7.6 Acknowledge
The transmitter
pulse (see Figure 31). The receiver
line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock
pulse.
(*) Transmitter
–master (µP) when it writes an address to the TDA7563A
–slave (TDA7563A) when the µP reads a data byte from TDA7563A
(**) Receiver
–slave (TDA7563A) when the µP writes an address to the TDA7563A
–master (µP) when it reads a data byte from TDA7563A
(*)
puts a resistive HIGH level on the SDA line during the acknowledge clock
(**)
the acknowledges has to pull-down (LOW) the SDA
Figure 29. Data validity on the I
SDA
SCL
STABLE, DATA
Figure 30. Timing diagram on the I
SCL
SDA
START
2
DATA LINE
VALID
C bus
2
C bus
CHANGE
DATA
ALLOWED
D99AU1032
Figure 31. Timing acknowledge clock pulse
SCL
SDA
START
1
MSB
23789
D99AU1033
D99AU1031
2
I
STOP
ACKNOWLEDGMENT
FROM RECEIVER
CBUS
23/35
Software specificationsTDA7563A
8 Software specifications
All the functions of the TDA7563A are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from μP to
TDA7563A) or read instruction (from TDA7563A to µP).
Table 5.Chip address:
D7D0
1101100XD8 Hex
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel RR
D1
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel RR
D0
No short to GND (D1 = 0)
Short to GND (D1 = 1)
= 120°C
J
28/35
TDA7563AExamples of bytes sequence
9 Examples of bytes sequence
1 - Turn-On diagnostic - Write operation
StartAddress byte with D0 = 0ACKIB1 with D6 = 1ACKIB2ACKSTOP
2 - Turn-On diagnostic - Read operation
StartAddress byte with D0 = 1ACKDB1 ACKDB2ACKDB3ACKDB4ACKSTOP
●The delay from 1 to 2 can be selected by software, starting from 1ms
3a - Turn-On of the power amplifier with 26dB gain, mute on, diagnostic defeat, CD = 2%.
StartAddress byte with D0 = 0ACKIB1 ACKIB2ACKSTOP
X0000000XXX1XX11
3b - Turn-Off of the power amplifier
StartAddress byte with D0 = 0ACKIB1 ACKIB2ACKSTOP
X0XXXXXXXXX0XXXX
4 - Offset detection procedure enable
StartAddress byte with D0 = 0ACKIB1 ACKIB2ACKSTOP
XX1XX11XXXX1XXXX
5 - Offset detection procedure stop and reading operation (the results are valid only for the offset
detection bits (D2 of the bytes DB1, DB2, DB3, DB4).
StartAddress byte with D0 = 1ACKDB1 ACKDB2ACKDB3ACKDB4ACKSTOP
●The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by
input capacitor with anomalous leakage current or humidity between pins.
●The delay from 4 to 5 can be selected by software, starting from 1ms
29/35
Package informationTDA7563A
10 Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK®
packages. ECOPACK
®
packages are lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 32. PowerSO36 (slug up) mechanical data and package dimensions
(1): dam-bar protusion not included; (2): molding protus ion included
mminch
MIN. TYP. MAX. MIN. TYP. MAX.
OUTLINE AND
MECHANICAL DATA
Flexiwatt27
(Horizontal)
7399738 A
33/35
Revision historyTDA7563A
11 Revision history
Table 12.Document revision history
DateRevisionChanges
07-Feb-20081Initial release.
34/35
TDA7563A
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