ST TDA7468 User Manual

TDA7468
Fi
TWO BANDS DIGITALLY CONTROLLED
AUDIO PROCESSOR WITH BASS ALC SURROUND

1 FEATURES

INPUT MULTIPLEXER
– 4 STEREO INPUTS – SELECTABLE INPUT GAIN FOR OPTIMAL
ADAPTATION TO DIFFERENT SOURCES
– TWO INDEPENDENT SPEAKER CONTROL
IN 1.0dB STEPS FOR BALANCE FACILITY
– INDEPENDENT MUTE FUNCTION
ALL FUNCTION ARE PROGRAMMABLE VIASERIAL BUSEXTERNALLY ADJUSTABLE SURROUND

2 DESCRIPTION

The TDA7468D is a volume tone (bass and treble) balance (Left/Right) processor for quality audio

Figure 2. PIN CONNECTION (Top view)

gure 1. Package
SO28

Table 1. Order Codes

Part Number Package
TDA7468D SO28
TDA7468D13TR Tape & Reel
applications in Hi-Fi systems.
Selectable input gain is provided. Control of all the functions is accomplished by serial bus.
The AC signal setting is obtained by resistor net­works and switches combined with operational amplifiers.
Thanks to the used BIPOLAR/CMOS Technology, Low Distortion, Low Noise and DC stepping are obtained
April 2010
V
1
S
MIC
IN1_L
IN2_L
IN3_L IN3_R
IN4_L
MUX_L
IS_L
TREBLE_L
BASSI_L
BASSO_L
OUT_L
DGND
SCL
2
3
4
5
6
7
8
9
10
11
12
13
14
D99AU1057
28
27
26
25
24
22
21
20
19
18
17
16
15
GND
CREF
IN1_R
IN2_R
IN4_R23
MUX_R
IS_R
TREBLE_R
BASSI_R
BASSO_R
OUT_R
ALC
SDA
Rev. 4
1/23
TDA7468

Figure 3. BLOCK DIAGRAM

18
BASSO-R
192021
BASSI-R
TREBLE-R
gm
63dB att.
OUT-R
17
-24 att. /8dB step
BASS
/2dB step
-14 to +14dB
TREBLE
/2dB step
-14 to +14dB
/1dB step
+ 6dB gain
+
DGND
SCL
SDA
131215
14
C BUS DECODER + LATCHES
2
I
+
OUT-L
-24 att.
BASS
-14 to +14dB
TREBLE
-14 to +14dB
63dB att.
+
/8dB step
/2dB step
/2dB step
/1dB step
+ 6dB gain
S
1
SUPPLY V
REF
V
gm
GND CREFTREBLE-LMUX-L IS-L
BASSO-LBASSI-L
IS-R
22
MUX-R
23
IN-R4
50K
50K
inverting
non-inverting
/ 2dB step
buffer gain:
0 to 14dB gain
INPUT
SELECT
24
IN-R3
50K
MIX
VARIABLE
0dB
6dB
9dB
12dB
25
IN-R2
+
50K
26
IN-R1
BASS_ALC
50K
CONTROL
0dB, 6dB
10dB, 14dB
2
50K
MIC-MIX
RECTIFIER
HALF_WAVE
16
ALC
3
IN-L1
INPUT
50K
inverting
non-inverting
/ 2dB step
buffer gain:
0 to 14dB gain
SELECT
50K
4
IN-L2
VARIABLE
0dB
+
5
MIX
6dB
IN-L3
9dB
12dB
50K
6
50K
78 9 10 11 2827
50K
D99AU1058A
IN-L4
2/23
TDA7468

Table 2. ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
T
T
V
amb
stg
Operating Supply Voltage 10.5 V
S
Operating Ambient Temperature 0 to 70 °C
Storage Temperature Range -55 to 150 °C

Table 3. THERMAL DATA

Symbol Parameter Value Unit
R
th j-pin
Thermal Resistance Junction-pins 85 °C/W

Table 4. QUICK REFERENCE DATA

Symbol Parameter Min. Typ. Max. Unit
V
V
THD
Supply Voltage 5 9 10 V
S
Max. input signal handling 2 Vrms
CL
Total Harmonic Distortion V
Total Harmonic Distortion V
= 1Vrms; f = 1KHz
I
= 0.1Vrms; f = 1KHz
I
0.01 % %
0.1 %
S/N
S
Signal to Noise Ratio V
Channel Separation f = 1KHz 90 dB
C
= 1Vrms (0dB)
out
100 dB
Input Gain (2dB step) 0 14 dB
Volume Control (1dB step) -87 0 dB
Treble Control (2dB step) -14 +14 dB
Bass Control (2dB step) -14 +14 dB
Mute Attenuation 86 dB
3/23
TDA7468
ELECTRICAL CHARACTERISTICS
(refer to the test circuit T specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
SUPPLY
V
SVR Ripple Rejection 60 90 dB
INPUT STAGE
R
V
S
G
inmin
G
inmax
G
MIC
R
G
G
G
G
MIX
SURROUND
R
G
inmin
G
inmax
G
M
M
ixmax
CrosstalkCrosstalk of Mux Output to 100%
G
buffer
VOLUME CONTROL
C
RANGE1
A
VMAX1
A
STEP1
Match1 Matching TBD dB
C
RANGE2
A
VMAX2
A
STEP2
Match2 Matching TBD dB
A
VMAX1
A
VMAX2
Supply Voltage 5 9 10 V
S
Supply Current 9 mA
I
S
Input Resistance 35 50 65 K
IN
Clipping Level THD = 0.3% 2 2.5
CL
Input Separation 80 100 dB
IN
Minimum Input Gain -1 0 1 dB
Maximum Input Gain 14 dB
Step Resolution 2 dB
step
Input Resistance 35 50 65 K
IN
Mic Input Gain 1 14 dB
mic1
Mic Input Gain 2 10 dB
mic2
Mic Input Gain 3 6 dB
mic3
Mic Input Gain 4 0 dB
min4
Mixing Rate 50 %
mic
Input Resistance 35 50 65 K
in
Minimum Input Gain -1 0 1 dB
Maximum Input Gain 12 dB
Inverting Gain -1
inV
Minimum Mixing Rate 0 %
ixmin
Maximum Mixing Rate 100 %
IS
Buffer Gain 6dB
Vol 1 Control Range 63 dB
Vol 1 Max. Attenuation 61 63 65 dB
Vol 1 Step Resolution 0.5 1 1.5 dB
Vol 2 Control Range 24 dB
Vol 2 Max. Attenuation 22 24 26 dB
Vol 2 Step Resolution 7 8 9 dB
+
Vol 1 + Vol 2 Max Attenuation 84 dB
= 25°C, VS = 9V, f = 1KHz all controls flat (G = 0dB), unless otherwise
amb
40 dB
Vrms
4/23
TDA7468
ELECTRICAL CHARACTERISTICS (continua)
(refer to the test circuit T specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
BASS CONTROL
Gb Control Range Max. Boost/cut ±12.0 ±14.0 ±16.0 dB
B
STEP
R
BASS ALC CONTROL
R
attack1
R
attack2
R
attack3
R
attack4
Thresh1 Threshold 1 700 mVrms
Thresh2 Threshold 2 485 mVrms
Thresh3 Threshold 3 320 mVrms
Thresh4 Threshold 4 170 mVrms
TREBLE CONTROL
Gt Control Range Max. Boost/cut +13.0 +14.0 +15.0 dB
T
STEP
AUDIO OUTPUTS
V
R
VO
GENERAL
E
S/N Signal to Noise Ratio
S
S
BUS INPUT
V
V
I
V
Step Resolution 1 2 3 dB
Internal Feedback Resistance 33 44 55 K
B
Attack Time Resistor 1 12.5 K
Attack Time Resistor 2 25 K
Attack Time Resistor 3 50 K
Attack Time Resistor 4 100 K
Step Resolution 1 2 3 dB
R
Internal Resistance 25 K
t
Clipping Level THD = 0.3% 2 2.5
OCL
Output Load Resistance 2 K
L
DC Voltage Level 4.5 V
UT
Output Noise BW = 20Hz to 20KHz;
NO
Channel Separation Left/Right 90 dB
C
dDistortion A
Channel Separation left/right 90 dB
C
Total Tracking Error 0 1 dB
Input Low Voltage 1V
IL
Input High Voltage 2.5 V
IH
Input Current VIN = 0.4V -5 5 µA
IN
Output Voltage (ACK) IO = 1.6mA 0.4 0.8 V
O
= 25°C, VS = 9V, f = 1KHz all controls flat (G = 0dB), unless otherwise
amb
All gains 0dB;
output muted 5 µV
flat 10 15 µV
All gains 0dB
= 0; VI = 0.1V
V
A
= 0; VI = 1V
V
; V
O
rms
= 1V
rms
;
rms
; 0.1 %
; 0.01 %
100 dB
Vrms
5/23
TDA7468

Figure 4. TEST CIRCUIT

-24 att.
BASSO-R
18192021
5.6K
100nF 100nF
BASSI-R
-14 to +14dB
OUT-R
17
/8dB step
BASS
/2dB step
S
-24 att. /8dB step
/2dB step
-14 to +14dB
V
1
SUPPLY
10µF
REF
V
GND CREFTREBLE-L
BASSO-LBASSI-L
DGND
SCL
SDA
131215
14
OUT-L
BASS
3.3nF
TREBLE-R
IS-R
22
MUX-R
50K
gm
63dB att.
buffer gain:
INPUT
SELECT
TREBLE
/2dB step
-14 to +14dB
/1dB step
+ 6dB gain
+
MIX
VARIABLE
inverting
non-inverting
/ 2dB step
0 to 14dB gain
0dB
6dB
9dB
12dB
+
C BUS DECODER + LATCHES
2
I
+
0dB, 6dB
10dB, 14dB
HALF_WAVE
CONTROL
BASS_ALC
RECTIFIER
inverting
non-inverting
/ 2dB step
buffer gain:
0 to 14dB gain
INPUT
SELECT
TREBLE
+
VARIABLE
0dB
+
/2dB step
-14 to +14dB
63dB att.
/1dB step
+ 6dB gain
MIX
6dB
9dB
12dB
gm
50K
78 9 10 11 2827
MUX-L IS-L
6/23
0.47µF
23
IN-R4
50K
0.47µF
24
IN-R3
50K
0.47µF
25
IN-R2
50K
0.47µF
26
IN-R1
50K
2
MIC-MIX
0.47µF
50K
50K
16
ALC
0.47µF
3
IN-L1
1M
0.47µF
50K
4
IN-L2
0.47µF
0.47µF
5
IN-L3
50K
0.47µF
6
IN-L4
50K
D99AU1059A
TDA7468

3 APPLICATION SUGGESTIONS

The first and the last stages are volume control blocks. The control range is 0 to -63dB (mute) with 1dB step resolution for this first one, 0 to 24dB (mute) with 8dB step resolution for the last one.
The very high resolution allows the implementation of systems free from any noisy acoustical effect.
The TDA7468D audioprocessor provides 2 bands tones control.

3.1 Bass, Stages

The Bass cell has an internal resistor R
Several filter types can be implemented, connecting external components to the Bass IN and OUT pins.
The fig.5 refers to basic T Type Bandpass Filter R2,C1,C2 external) the centre frequency Fc, the gain Av at max. boost and the filter Q factor are computed as follows:
= 44K typical.
i
F
-----------------------------------------------------------------=
C
2 π R1 R2 C1 C2⋅⋅⋅⋅
R2 C2 R2 C1 Ri C1++
A
----------------------------------------------------------------=
V
starting from the filter component values (R1 internal and
1
R2 C1 R2 C2+
R1 R2 C1 C2⋅⋅
------------------------------------------------- -=
R2 C1 R2 C2+
1
V
CRi
Q⋅⋅ ⋅ ⋅
---------------------------------------------------------------------- -=
2 π C1 F
C2
1 Q2–
A
V
CAV
2
C1
Q
----------------------------- -==
1 Q2–
A
V
1()Q⋅⋅ ⋅⋅
Viceversa, once F
Q
, AV, and Ri internal value are fixed, the external components values will be:
C
A
----------------------------------------- -
C1
2 π F
R2

3.2 Treble Stage

The treble stage is a high pass filter whose time constant is fixed by an internal resistor (25K typical) and an external capacitor connected between treble pins and ground.

3.3 CREF

The suggested 10µF reference capacitor (CREF) value can be reduced to 4.7µF if the application requires faster power ON.

Figure 5.

Ri internal
OUTIN
C
1
C
2
R
2
D95AU313
7/23
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