ST TDA7439DS User Manual

Three-band digitally-controlled audio processor

Features

! Input multiplexer
– four stereo inputs – selectable input gain for optimal adaptation
! Single stereo output
! Treble, mid-range and bass control in 2-dB
steps
! Volume control in 1-dB steps
! Two speaker attenuators:
– two independent speaker controls in 1-dB
steps for balance facility
– independent mute function
! All functions are programmable via serial bus.
TDA7439DS
SO28
processor for quality audio applications in car-radio and Hi-Fi systems. Selectable input gain is provided. All the functions are controlled by serial bus.
The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers.

Description

The TDA7439DS is a volume, tone (bass, mid-range and treble) and balance (left/right)
Table 1. Device summary
Order codes Package Packaging
TDA7439DS SO28 Tube
TDA7439DS
13TR SO28 Tape and Reel
The TDA7439DS employs BIPOLAR/CMOS technology to provide low distortion, low noise and DC stepping.
November 2007 Rev 4 1/23
www.st.com
23
Contents TDA7439DS

Contents

1 Block diagram and pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Application suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Tone control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.1 Bass, mid-range stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.2 Treble stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Pin CREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4I
5I
6I
2
C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2
C bus transmission examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1 No address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2 Address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2
C bus addresses and data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.1 Chip address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2 Sub-address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.3 Data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7 Chip input/output circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2/23
TDA7439DS Block diagram and pin out
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)
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)

1 Block diagram and pin out

Figure 1. Block diagram

4
L-IN1
L-IN2
L-IN3
L-IN4
R-IN1
R-IN2
R-IN3
R-IN4
100K
5
100K
+ GAIN
G
0/30dB
2dB STEP
G
6
100K
7
100K
3
100K
2
100K
1
100K
28
100K
INPUT MULTIPLEXER

Figure 2. Pin connections

MUXOUTL
8 1817161415
VOLUME
VOLUME
9 191011121323
MUXOUTR
TREBLE(L)
TREBLE
TREBLE
TREBLE(R
MOUT(L)
MIN(L)
R
M
MIDDLE
I2CBUS DECODER + LATCHES
MIDDLE
R
M
MIN(R)MOUT(R
BIN(L)
BASS
BASS
BIN(R
R
B
R
B
BOUT(L)
SPKR ATT
SPKR ATT
BOUT(R
LEFT
RIGHT
V
REF
SUPPLY
CREF
27
21
22
20
26
24
25
LOUT
SCL
SDA
DIG_GND
ROUT
V
S
AGND
D97AU621
R_IN3
R_IN2
R_IN1
L_IN1
L_IN2 V
L_IN3
L_IN4
MUXOUTL
MUXOUTR
MIN(R)
MOUT(R)
BIN(R)
BOUT(R)
BIN(L)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D97AU622
28
27
26
25
24
22
21
20
19
18
17
16
15
R_IN4
LOUT
ROUT
AGND
S
CREF23
SDA
SCL
DIG-GND
TREBLE(R)
TREBLE(L)
MIN(L)
MOUT(L)
BOUT(L)
3/23
Electrical specifications TDA7439DS

2 Electrical specifications

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
Operating supply voltage 10.5 V
V
S
T
T

Table 3. Thermal data

Symbol Parameter Value Unit
Operating ambient temperature 0 to 70 °C
amb
Storage temperature range -55 to 150 °C
stg
R
th j-pin

Table 4. Quick reference data

Thermal resistance junction-pins 85 °C/W
Symbol Parameter Min. Typ Max Unit
V
Supply voltage 7 9 10.2 V
S
V
Max. input signal handling 2
CL
RMS
THD Total harmonic distortion V = 1 V RMS, f = 1 kHz 0.01 0.1 %
S/N Signal to noise ratio V
S
Channel separation f = 1 kHz 90 dB
C
= 1 V RMS (mode = OFF) 106 dB
out
Input gain (in 2 dB steps) 0 30 dB
Volume control (in 1 dB steps) -47 0 dB
Treble control (in 2 dB steps) -14 +14 dB
Middle control (in 2 dB steps) -14 +14 dB
Bass control (in 2 dB steps) -14 +14 dB
Balance control (in 1 dB steps) -79 0 dB
Mute attenuation 100 dB
Table 5. shows the electrical characteristics. Refer to the test circuit in Figure 3, T
25° C, V
= 9 V, RL= 10 kΩ, generator resistance Rg = 600 Ω, all controls flat (G = 0 dB),
S
amb
=
unless otherwise specified.

Table 5. Electrical characteristics

V
Symbol Parameter Test condition Min. Typ Max Unit
Supply
V
Supply voltage 7 9 10.2 V
S
I
Supply current 4 7 10 mA
S
SVR Ripple rejection 60 90 dB
4/23
TDA7439DS Electrical specifications
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ Max Unit
Input stage
V
G
in_min
G
in_max
G
R
S
Input resistance 70 100 130 k
IN
Clipping level THD = 0.3% 2 2.5
CL
Input separation
IN
Minimum input gain -1 0 1 dB
Maximum input gain 29 30 31 dB
Step resolution 1.5 2 2.5 dB
step
Volu m e con t r o l
R
Volume control input resistance 20 33 50 k
i
C
A
v_max
A
Volume control range 45 47 49 dB
range
Max. attenuation 45 47 49 dB
Step resolution 0.5 1 1.5 dB
step
E
Attenuation set error
A
EΤ Tracking error
V
A
Bass control
DC step
DC
Mute attenuation 80 100 dB
mute
(1)
V
RMS
The selected input is grounded through a 2.2 µF
80 100 dB
capacitor
AV = 0 to -24 dB -1.0 0 1.0 dB
= -24 to -47 dB -1.5 0 1.5 dB
A
V
A
= 0 to -24 dB 0 1 dB
V
A
= -24 to -47 dB 0 2 dB
V
adjacent attenuation steps from 0 dB to A
v_max
0
0.5
3mV
mV
Gb Control range Max. boost/cut ±12.0 ±14.0 ±16.0 dB
B
Treble control
Step resolution 1 2 3 dB
step
Internal feedback resistance 33 44 55 k
R
B
(1)
Gt Control range Max. boost/cut ±13.0 ±14.0 ±15.0 dB
T
Mid-range control
Step resolution 1 2 3 dB
step
(1)
Gm Control range Max. boost/cut ±12.0 ±14.0 ±16.0 dB
M
R
Step resolution 1 2 3 dB
step
Internal feedback resistance 18.75 25 31.25 k
M
5/23
Electrical specifications TDA7439DS
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ Max Unit
Speaker attenuators
C
S
V
A
Control range 70 76 82 dB
range
Step resolution 0.5 1 1.5 dB
step
E
A Attenuation set error
DC step Adjacent attenuation steps 0 3 mV
DC
Mute attenuation 80 100 dB
mute
Audio outputs
V
V
OUTDC
Clipping level d = 0.3% 2.1 2.6 Vrms
CLIP
Output load resistance 2 k
R
L
R
Output impedance 10 40 70
O
DC voltage level 3.5 3.8 4.1 V
General
E
Output noise
NO
E
Total tracking error
t
S/N Signal to noise ratio
Channel separation, left/right 80 100 dB
S
C
dDistortion A
Bus input
V
Input low voltage 1 V
IL
V
Input high voltage 3 V
IH
I
Input current VIN = 0.4 V -5 0 5 µA
IN
Output voltage SDA
V
O
acknowledge
A
= 0 to -20 dB -1.5 0 1.5 dB
V
A
= -20 to -56 dB -2 0 2 dB
V
All gains = 0 dB; BW = 20 Hz to 20 kHz flat
515µV
AV = 0 to -24 dB 0 1 dB
= -24 to -47 dB 0 2 dB
A
V
All gains 0 dB,
= 1 V RMS
V
O
= 0, VI = 1 V RMS 0.01 0.08 %
V
I
= 1.6 mA 0.4 0.8 V
O
95 106 dB
1. For bass, mid-range and treble response: the center frequency and the response quality can be set by the external circuitry.
6/23
TDA7439DS Electrical specifications

Figure 3. Test circuit

2.7K 5.6K
5.6nF 18nF 22nF 100nF 100nF
0.47µF
0.47µF
0.47µF
0.47µF
0.47µF
0.47µF
0.47µF
0.47µF
L-IN1
L-IN2
L-IN3
L-IN4
R-IN1
R-IN2
R-IN3
R-IN4
4
100K
5
100K
6
100K
7
100K
3
100K
2
100K
1
100K
28
100K
MUXOUTL
G
0/30dB
2dB STEP
G
INPUT MULTIPLEXER
+ GAIN
MUXOUTR
TREBLE(L)
81817161415
VOLUME
VOLUME
9
TREBLE(R)
MIN(L)
MOUT(L)
BIN(L)
R
M
TREBLE
MIDDLE
BASS
I2CBUS DECODER + LATCHES
TREBLE
MIDDLE
BASS
R
M
19 10 11 12 13 23
MOUT(R) BOUT(R)BIN(R)
MIN(R)
18nF 22nF 100nF 100nF
5.6nF
2.7K 5.6K
BOUT(L)
R
B
SPKR ATT
LEFT
SPKR ATT
RIGHT
V
REF
SUPPLY
R
B
CREF
10µF
LOUT
27
21
SCL
22
SDA
20
DIGGND
26
ROUT
24
V
S
25
AGND
D98AU886
7/23
+ 16 hidden pages