ST TDA7266SA User Manual

ST TDA7266SA User Manual

TDA7266SA

7W+7W DUAL BRIDGE AMPLIFIER

WIDE SUPPLY VOLTAGE RANGE (3.5-18V)

TECHNOLOGY BI20II

MINIMUM EXTERNAL COMPONENTS

 

– NO SWR CAPACITOR

 

– NO BOOTSTRAP

 

– NO BOUCHEROT CELLS

 

– INTERNALLY FIXED GAIN

 

STAND-BY & MUTE FUNCTIONS

 

SHORT CIRCUIT PROTECTION

 

THERMAL OVERLOAD PROTECTION

CLIPWATT15

ORDERING NUMBER: TDA7266SA

 

DESCRIPTION

 

The TDA7266SA is a dual bridge amplifier specially designed for LCD Monitor, PC Motherboard, TV and Portable Radio applications.

BLOCK AND APPLICATION DIAGRAM

Pin to pin compatible with: TDA7266S, TDA7266, TDA7266M, TDA7266MA, TDA7266B, TDA7297SA & TDA7297.

VCC

470 F 100nF

 

0.22 F

3

13

 

 

 

 

 

IN1

4

+

1

OUT1+

 

 

 

-

 

 

ST-BY

7

 

 

 

 

S-GND

-

2

OUT1-

 

9

 

Vref

+

 

 

 

0.22 F

 

 

 

 

 

 

IN2

12

+

15

OUT2+

 

 

 

-

 

 

MUTE

6

 

 

 

PW-GND

-

14 OUT2-

+

 

8

 

D94AU175B

September 2003

1/11

TDA7266SA

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

 

 

 

 

Vs

Supply Voltage

20

V

IO

Output Peak Current (internally limited)

2

A

Ptot

Total Power Dissipation (Tamb = 70°C)

20

W

Top

Operating Temperature

0 to 70

°C

Tstg, Tj

Storage and Junction Temperature

-40 to 150

°C

THERMAL DATA

Symbol

Parameter

Value

Unit

 

 

 

 

Rth j-case

Thermal Resistance Junction-case

Typ = 1.8; Max. = 2.5

°C/W

 

 

 

 

Rth j-amb

Thermal Resistance Junction-ambient

48

°C/W

 

 

 

 

PIN CONNECTION (Top view)

15

OUT2+

14

OUT2-

13

VCC

12

IN2

11

N.C.

10

N.C.

9

S-GND

8

PW-GND

7

ST-BY

6

MUTE

5

N.C.

4

IN1

3

VCC

2

OUT1-

1

OUT1+

 

D03AU1463

ELECTRICAL CHARACTERISTCS

(VCC = 11V, RL = 8Ω, f = 1KHz, Tamb = 25°C unless otherwise specified)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

VCC

Supply Range

 

3

11

18

V

Iq

Total Quiescent Current

 

 

50

65

mA

 

 

 

 

 

 

 

 

VOS

Output Offset Voltage

 

 

 

120

mV

 

 

 

 

 

 

 

 

PO

Output Power

THD 10%

6.3

7

 

W

THD

Total Harmonic Distortion

PO = 1W

 

0.05

0.2

%

 

 

 

PO = 0.1W to 2W

 

 

1

%

 

 

 

f = 100Hz to 15KHz

 

 

 

 

 

 

 

 

 

 

 

SVR

Supply Voltage Rejection

f = 100Hz, VR =0.5V

40

56

 

dB

 

 

 

 

 

 

 

CT

Crosstalk

 

46

60

 

dB

 

 

 

 

 

 

 

AMUTE

Mute Attenuation

 

60

80

 

dB

 

 

 

 

 

 

 

Tw

Thermal Threshold

 

 

150

 

°C

GV

Closed Loop Voltage Gain

 

25

26

27

dB

GV

Voltage Gain Matching

 

 

 

0.5

dB

2/11

TDA7266SA

ELECTRICAL CHARACTERISTCS (continued)

(VCC = 11V, RL = 8Ω, f = 1KHz, Tamb = 25°C unless otherwise specified)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

Ri

Input Resistance

 

25

30

 

KΩ

 

 

 

 

 

 

 

 

VTMUTE

Mute Threshold

for VCC > 6.4V; Vo = -30dB

2.3

2.9

4.1

V

 

 

 

for VCC < 6.4V; Vo = -30dB

VCC/2

VCC/2

VCC/2

V

 

 

 

 

-1

-075

-0.5

 

 

 

 

 

 

 

 

VTST-BY

St-by Threshold

 

0.8

1.3

1.8

V

IST-BY

St-by Current V6 = GND

 

 

 

100

μA

 

 

 

 

 

 

 

eN

Total Output Voltage

A Curve; f = 20Hzto 20KHz

 

150

 

μV

APPLICATION SUGGESTION

STAND-BY AND MUTE FUNCTIONS

(A) Microprocessor Application

In order to avoid annoying "Pop-Noise" during Turn-On/Off transients, it is necessary to guarantee the right Stby and mute signals sequence. It is quite simple to obtain this function using a microprocessor (Fig. 1 and 2). At first St-by signal (from μP) goes high and the voltage across the St-by terminal (Pin 7) starts to increase exponentially. The external RC network is intended to turn-on slowly the biasing circuits of the amplifier, this to avoid "POP" and "CLICK" on the outputs.

When this voltage reaches the St-by threshold level, the amplifier is switched-on and the external capacitors in series to the input terminals (C3, C53) start to charge.

It's necessary to mantain the mute signal low until the capacitors are fully charged, this to avoid that the device goes in play mode causing a loud "Pop Noise" on the speakers.

A delay of 100-200ms between St-by and mute signals is suitable for a proper operation.

Figure 1. Microprocessor Application

 

 

 

VCC

 

 

 

C1 0.22μF

3

13

C5

C6

 

470μF

100nF

IN1

 

4

1

OUT1+

 

 

+

 

ST-BY

R1 10K

-

 

 

 

7

 

 

 

 

 

 

 

 

 

C2

 

 

 

 

 

10μF

 

 

 

 

μP

S-GND

9

 

 

 

 

 

 

 

 

 

-

2

OUT1-

 

 

 

Vref

 

 

 

 

C3 0.22μF

+

 

 

 

 

12

 

 

 

IN2

 

15

OUT2+

 

 

+

 

MUTE

R2 10K

-

 

 

 

6

 

 

 

 

 

 

 

 

 

C4

 

 

 

 

 

1μF

 

 

 

 

PW-GND

-

14 OUT2-

+

 

8

 

D95AU258A

3/11

TDA7266SA

Figure 2. Microprocessor Driving Signals

+VS(V)

 

 

 

VIN

 

 

 

(mV)

 

 

 

VST-BY

 

 

 

pin 7

 

 

 

1.8

 

 

 

1.3

 

 

 

0.8

 

 

 

VMUTE

 

 

 

pin 6

 

 

 

4.1

 

 

 

2.9

 

 

 

2.3

 

 

 

Iq

 

 

 

(mA)

 

 

 

VOUT

 

 

 

(V)

 

 

 

OFF

 

 

 

PLAY

MUTE

ST-BY

OFF

ST-BY

 

 

D96AU259mod

MUTE

 

 

B) Low Cost Application

In low cost applications where the μP is not present, the suggested circuit is shown in fig.3.

The St-by and mute terminals are tied together and they are connected to the supply line via an external voltage divider.

The device is switched-on/off from the supply line and the external capacitor C4 is intended to delay the St-by and mute threshold exceeding, avoiding "Popping" problems.

4/11

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