ST STP75NF75L, STB75NF75L, STB75NF75L-1 User Manual

!

STP75NF75L STB75NF75L STB75NF75L-1

N-CHANNEL 75V - 0.009 Ω - 75A D2PAK/I2PAK/TO-220 STripFET™ II POWER MOSFET

TYPE	VDSS	RDS(on)	ID
STB75NF75L/-1	75 V	<0.011 Ω	75 A
STP75NF75L	75 V	<0.011 Ω	75 A

■TYPICAL RDS(on) = 0.009Ω

■EXCEPTIONAL dv/dt CAPABILITY

■100% AVALANCHE TESTED

■LOW THRESHOLD DRIVE

DESCRIPTION

This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements.

APPLICATIONS

■SOLENOID AND RELAY DRIVERS

■DC MOTOR CONTROL

■DC-DC CONVERTERS

■AUTOMOTIVE ENVIRONMENT

	1	3	2	3
		1
	D2PAK	I2PAK
		TO-262
	TO-263
		3
		2
		1
		TO-220

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

	Symbol	Parameter	Value	Unit
	VDS	Drain-source Voltage (VGS = 0)	75	V
	VDGR	Drain-gate Voltage (RGS = 20 kΩ)	75	V
	VGS	Gatesource Voltage	± 15	V
	ID(∙)	Drain Current (continuous) at TC = 25°C	75	A
	ID	Drain Current (continuous) at TC = 100°C	70	A
	IDM(∙∙)	Drain Current (pulsed)	300	A
	Ptot	Total Dissipation at TC = 25°C	300	W
		Derating Factor	2	W/°C
	dv/dt (1)	Peak Diode Recovery voltage slope	20	V/ns
	EAS (2)	Single Pulse Avalanche Energy	680	mJ
	Tstg	Storage Temperature	-55 to 175	°C
	Tj	Max. Operating Junction Temperature
	(∙) Current limited by package		(1) ISD ≤ 75A, di/dt ≤ 500A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
	(∙∙) Pulse width limited by safe operating area.		(2) Starting Tj = 25 oC, ID = 37.5A, VDD = 30V
	April 2002			1/11

.

STB75NF75L/-1 STP75NF75L

THERMAL DATA

Rthj-case	Thermal Resistance Junction-case	Max	0.5	°C/W
Rthj-amb	Thermal Resistance Junction-ambient	Max	62.5	°C/W
Tl	Maximum Lead Temperature For Soldering Purpose	Typ	300	°C

ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
V(BR)DSS	Drain-source	ID = 250 µA	VGS = 0	75			V
	Breakdown Voltage
IDSS	Zero Gate Voltage	VDS = Max Rating				1	µA
	Drain Current (VGS = 0)	VDS = Max Rating TC = 125°C				10	µA
IGSS	Gate-body Leakage	VGS = ± 15 V				±100	nA
	Current (VDS = 0)

ON (*)

Symbol	Parameter	Test Conditions			Min.	Typ.	Max.	Unit
VGS(th)	Gate Threshold Voltage	VDS = VGS	ID = 250	µA	1		2.5	V
RDS(on)	Static Drain-source On	VGS = 10 V	ID = 37.5	A		0.009	0.011	Ω
	Resistance	VGS = 5 V	ID = 37.5	A		0.010	0.013	Ω

DYNAMIC

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
g (*)	Forward Transconductance	VDS = 15 V	ID = 37.5 A		120		S
fs
Ciss	Input Capacitance	VDS = 25V, f = 1 MHz, VGS = 0			4300		pF
Coss	Output Capacitance				660		pF
Crss	Reverse Transfer				205		pF
	Capacitance

2/11

STB75NF75L/-1 STP75NF75L

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
td(on)	Turn-on Delay Time	VDD = 40 V	ID = 37.5 A		35		ns
tr	Rise Time	RG = 4.7 Ω	VGS = 4.5 V		150		ns
		(Resistive Load, Figure 3)
Qg	Total Gate Charge	VDD = 60V ID = 75 A VGS= 5V			75	90	nC
Qgs	Gate-Source Charge				18		nC
Qgd	Gate-Drain Charge				31		nC

SWITCHING OFF

Symbol	Parameter	Test Conditions			Min.	Typ.	Max.	Unit
td(off)	Turn-off Delay Time	VDD = 40 V	ID =	37.5 A		110		ns
tf	Fall Time	RG = 4.7Ω,	VGS =	4.5 V		60		ns
		(Resistive Load, Figure 3)

SOURCE DRAIN DIODE

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
ISD	Source-drain Current					75	A
ISDM (∙)	Source-drain Current (pulsed)					300	A
VSD (*)	Forward On Voltage	ISD = 75 A	VGS = 0			1.3	V
trr	Reverse Recovery Time	ISD = 75 A	di/dt = 100A/µs		100		ns
Qrr	Reverse Recovery Charge	VDD = 20 V	Tj = 150°C		380		nC
IRRM	Reverse Recovery Current	(see test circuit, Figure 5)			7.5		A

(*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (∙)Pulse width limited by safe operating area.

Safe Operating Area

Thermal Impedance

3/11

STB75NF75L/-1 STP75NF75L

Output Characteristics

Transconductance

Transfer Characteristics

Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage		Capacitance Variations

4/11