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N-CHANNEL CLAMPED 10mΩ -60ATO-220
FULLY PROTECTED MESH OVERL AY™ MOSFET
STP60NS04ZB
TYPE V
DSS
R
DS(on)
I
D
STP60NS04ZB CLAMPED < 0.015 Ω 60 A
■ TYPICAL R
■ 100% AVALANCHE TESTED
■ LOW CAPACITANCE AND GATE CHARGE
■ 175°C MAXIMUM JUNCTION TEMPERATURE
(on) = 0.010 Ω
DS
DESCRIPTION
This fully clamped MOSFET is produced by using
the latest a dv anc ed Company’s Mesh Overlay process which is based on a nove l strip layout. The inherent benefits of the new technology coupled with
the extra clamping capabilities make this product
particularly suitable fo r the harshest operation conditions such as those encountered in the automotive
environment .Any other application requiring extra
ruggedness is also recommended.
APPLICATIONS
■ ABS,SOLENOID DRIVERS
■ MOTOR CONTROL
■ DC-DC CONVERTERS
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAX IMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DG
V
GS
I
D
I
D
I
DG
I
GS
I
DM
P
TOT
V
ESD(G-S)
V
ESD(G-D)
V
ESD(D-S)
T
stg
T
j
(•)Pulse width limited by safe operating area
Drain-source Voltage (VGS=0)
CLAMPED V
Drain-gate Voltage CLAMPED V
Gate- source Voltage CLAMPED V
Drain Current (continuous) at TC= 25°C
Drain Current (continuous) at TC= 100°C
60 A
42 A
Drain Gate Current (continuous) ± 50 mA
Gate Source Current (continuous) ± 50 mA
()
Drain Current (pulsed) 240 A
Total Dissipation at TC= 25°C
150 W
Derating Factor 1 W/°C
Gate-Source ESD(HBM-C=100 pF, R=1.5 KΩ) 6kV
Gate-Drain ESD(HBM-C=100 pF, R=1.5 KΩ) 4kV
Drain-Source ESD(HBM-C=100 pF, R=1.5 KΩ) 4kV
Storage Temperature
Max. Operating Junction Temperature
–65to175 °C
1/8November 2002
STP60NS04ZB
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 1.0 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max, δ < 1%)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID=IAR,VDD=30V)
j
60 A
400 mJ
ELECTRICAL CHARACTERISTICS (T
= 25°C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Clamped Voltage ID=1mA,VGS=0
33 V
-40<Tj<175°C
I
I
V
DSS
GSS
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
=0)
Gate-Source
=0)
=16V,Tj=150°C
V
DS
=16V,Tj=175°C
V
DS
= ±10 V,Tj= 175 °C
V
GS
VGS= ±16 V,Tj= 175 °C
50 µA
100 µA
50
150
IGS= ±100 µA 18 V
Breakdown Voltage
ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage VDS=VGS,ID=1mA
1.7 3 4.2 V
-40<Tj<150°C
R
DS(on)
Static Drain-source On
Resistance
VGS=10V,ID=30A
VGS=16V,ID=30A
11 15 mΩ
10 14 mΩ
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=15V,ID= 30 A 20 40 S
g
fs
V
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 800 1000 pF
Reverse Transfer
Capacitance
=25V,f=1MHz,VGS=0
DS
1700 2100 pF
190 240 pF
µA
µA
2/8
STP60NS04ZB
ELECTRICAL CHARACTERISTICS (CO NTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge 13 nC
Gate-Drain Charge 16 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
t
f
c
Off Voltage Rise Time
Fall Time
Cross-over Time
SOURCE DR AIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safeoperating area.
Source-drain Current 60 A
(2)
Source-drain Current (pulsed) 240 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge 62 nC
Reverse Recovery Current 2.6 A
=18V,ID=60A,
DD
V
=10V
GS
V
=30V,ID=60A,
CLAMP
RG=4.7Ω, VGS=10V
(see test circuit, Figure 3)
ISD=60A,VGS=0
I
= 60 A, di/dt = 100 A/µs
SD
VDD=15V,Tj= 150°C
(see test circuit, Figure 5)
48 62 nC
60
45
100
75
60
130
1.5 V
50 ns
ns
ns
ns
Thermal ImpedanceSafe Operating Area
3/8
STP60NS04ZB
Output Characteristics
Transconductance
Transfer Characteristics
Static Drain-source On Resistance
Gate Char ge vs Gate-sourc e Voltage
4/8
Capacitance Variations
STP60NS04ZB
Normalized Gate Thereshold Voltage vs Temp.
ZeroGateVoltage D rainCu rrentvsTemperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized BVDSS vs Temperature
5/8
STP60NS04ZB
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery T imes
Fig. 4: Gate Charge test Circuit
6/8
E
TO-220 MECHANICAL DATA
P011C
STP60NS04ZB
DIM.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. MAX.
mm inch
A
C
D
L5
Dia.
L7
D1
L6
L2
L9
F1
G1
F
H2
G
F2
L4
7/8
STP60NS04ZB
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for t he
consequences of use of su ch in formation nor for any in fringement of patents or other rights of third parties w hich may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as cr itical component s in li fe suppo rt devi ces or
systems without express written approval of STMicroelectronics.
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