ST STB60NF10, STP60NF10 User Manual

!

STB60NF10

STP60NF10

N-CHANNEL 100V - 0.019 Ω - 80A D²PAK/TO-220

STripFET™ II POWER MOSFET

Table 1: General Features

TYPE

VDSS

RDS(on)

ID

STB60NF10

100 V

< 0.023 Ω

80 A

STP60NF10

100 V

< 0.023 Ω

80 A

 

 

 

 

TYPICAL RDS(on) = 0.019 Ω

EXTREMELY HIGHL dv/dt CAPABILITY

100% AVALANCHE TESTED

SURFACE-MOUNTING D²PAK (TO-263) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4")

DESCRIPTION

This MOSFET series realized with STMicroelectronics unique STripFET™ process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements.

APPLICATIONS

HIGH EFFICIENCY DC/DC CONVERTERS, INDUSTRIAL, AND LIGHTING EQUIPMENT.

MOTOR CONTROL

Figure 1:Package

3

 

1

3

 

D2PAK

2

1

TO-263

 

(Suffix “T4”)

TO-220

Figure 2: Internal Schematic Diagram

Table 2: Ordering Information

SALES TYPE

MARKING

PACKAGE

PACKAGING

STB60NF10T4

B60NF10

TO-263

TAPE & REEL

STP60NF10

P60NF10

TO-220

TUBE

Table 3:ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

 

Unit

VDS

Drain-source Voltage (VGS = 0)

100

 

V

VDGR

Drain-gate Voltage (RGS = 20 kΩ )

100

 

V

VGS

Gatesource Voltage

± 20

 

V

ID(*)

Drain Current (continuous) at TC = 25°C

80

 

A

ID

Drain Current (continuous) at TC = 100°C

66

 

A

IDM(•)

Drain Current (pulsed)

320

 

A

Ptot

Total Dissipation at TC = 25°C

300

 

W

 

Derating Factor

2

 

W/°C

 

 

 

 

 

dv/dt (1)

Peak Diode Recovery voltage slope

16

 

V/ns

EAS (2)

Single Pulse Avalanche Energy

485

 

mJ

Tstg

Storage Temperature

-55 to 175

 

°C

(•) Pulse width

limited by safe operating area.

(1) ISD 80A, di/dt 300A/µs, VDD V(BR)DSS, Tj

TJMAX

(**) Current Limited by Package

(2) Starting Tj = 25 oC, ID = 40A, VDD = 30V

 

 

May 2005

Rev. 2.0

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STB60NF10 STP60NF10

Table 4: THERMAL DATA

Rthj-case

Thermal Resistance Junction-case

Max

0.5

°C/W

Rthj-amb

Thermal Resistance Junction-ambient

Max

62.5

°C/W

Tl

Maximum Lead Temperature For Soldering Purpose

 

300

°C

ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)

Table 5: OFF

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

V(BR)DSS

Drain-source

ID = 250 µA, VGS = 0

100

 

 

V

 

Breakdown Voltage

 

 

 

 

 

 

 

 

 

 

 

 

IDSS

Zero Gate Voltage

VDS = Max Rating

 

 

1

µA

 

Drain Current (VGS = 0)

VDS = Max Rating TC = 125°C

 

 

10

µA

IGSS

Gate-body Leakage

VGS = ± 20 V

 

 

±100

nA

 

Current (VDS = 0)

 

 

 

 

 

Table 6: ON (*)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

VGS(th)

Gate Threshold Voltage

VDS = VGS

ID = 250 µA

2

3

4

V

RDS(on)

Static Drain-source On

VGS = 10 V

ID = 40 A

 

0.019

0.023

 

Resistance

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 7: DYNAMIC

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

gfs (*)

Forward Transconductance

VDS = 25 V

ID = 40 A

 

78

 

S

Ciss

Input Capacitance

VDS = 25V

f = 1 MHz VGS = 0

 

4270

 

pF

Coss

Output Capacitance

 

 

 

470

 

pF

Crss

Reverse Transfer

 

 

 

140

 

pF

 

Capacitance

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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ST STB60NF10, STP60NF10 User Manual

STB60NF10 STP60NF10

ELECTRICAL CHARACTERISTICS (continued)

Table 8: SWITCHING ON

Symbol

Parameter

Test Conditions

 

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

td(on)

Turn-on Delay Time

VDD = 50 V

ID = 40

A

 

17

 

ns

tr

Rise Time

RG = 4.7 Ω

VGS = 10

V

 

56

 

ns

 

 

(Resistive Load, Figure )

 

 

 

 

 

 

 

 

 

 

 

 

Qg

Total Gate Charge

VDD= 50V ID= 80A VGS= 10V

 

104

 

nC

Qgs

Gate-Source Charge

 

 

 

 

20

 

nC

Qgd

Gate-Drain Charge

 

 

 

 

32

 

nC

Table 9: SWITCHING OFF

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

td(off)

Turn-off Delay Time

VDD = 50 V

ID = 40 A

 

82

 

ns

tf

Fall Time

RG = 4.7Ω,

VGS = 10 V

 

23

 

ns

 

 

(Resistive Load, Figure 3)

 

 

 

 

 

 

 

 

 

 

 

 

Table 10: SOURCE DRAIN DIODE

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

ISD

Source-drain Current

 

 

 

 

80

A

ISDM ()

Source-drain Current (pulsed)

 

 

 

 

320

A

VSD (*)

Forward On Voltage

ISD = 80 A

VGS = 0

 

 

1.3

V

trr

Reverse Recovery Time

ISD = 80 A

di/dt = 100A/µs

 

92

 

ns

Qrr

Reverse Recovery Charge

VDD = 50 V

Tj = 150°C

 

340

 

µC

IRRM

Reverse Recovery Current

(see test circuit, Figure 5)

 

7.4

 

A

(*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area.

Figure 3:

Safe Operating Area

Figure 4: Thermal Impedance

 

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