ST STD5NK60Z, STP5NK60Z, STP5NK60ZFP User Manual
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查询STP5NK60Z供应商
N-CHANNEL 650V @Tjmax - 1.2Ω - 5A TO-220/FP/DPAK
STD5NK60Z
STP5NK60Z - STP5NK60ZFP
Zener-Protected SuperMESH™ MOSFET
Table 1: General Features
TYPE V
STP5NK60Z
STP5NK60ZFP
STD5NK60Z
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING
DS
@
DSS
TJmax
650 V
650 V
650 V
R
< 1.6 Ω
< 1.6 Ω
< 1.6 Ω
(on) = 1.2 Ω
DS(on)
I
5 A
5 A
5 A
P
d
TOT
90 W
25 W
90 W
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS
-
FET s including revolutionary MDmesh™ products.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL F OR OFF-LINE POW E R SUPP L IES,
ADAPTORS AND PFC
■ LIGHTING
Figure 1: Package
2
TO-220
TO-220FP
1
DPAK
Figure 2: Internal Schematic Diagram
2
Table 2: Order Codes
SALES TYPE MARKING PACKAGE PACKAGING
STP5NK60Z P5NK60Z TO-220 TUBE
STP5NK60ZFP P5NK60ZFP TO-220FP TUBE
STD5NK60ZT4 D5NK60 DPAK TAPE & REEL
Rev. 7
1/14December 2005
STP5NK60Z - STP5NK60ZFP- STD5NK60Z
Table 3: Absolute Maximum ratings
Symbol Parameter Value Unit
TO-220/DPAK TO-220FP
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
V
ISO
T
j
T
stg
(z) Pulse width l i m i ted by safe operating area
(1) ISD ≤5A, di/dt ≤200A/µs, VDD ≤ V
(*) Limited only by maximum temperature allowed
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
600 V
600 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
(z)
Drain Current (pulsed) 20 20 (*) A
Total Dissipation at TC = 25°C
5 5 (*) A
3.16 3.16 (*) A
90 25 W
Derating Factor 0.72 0.2 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3000 V
Insulation Withstand Voltage (DC) - 2500 V
Operating Junction Temperature
Storage Temperature
, Tj ≤ T
(BR)DSS
JMAX.
-55 to 150 °C
Thermal Data
TO-220/DPAK TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1.39 5 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
(#) When mount ed on 1inch² FR-4, 2 Oz c opper board.
Maximum Lead Temperature For Soldering Purpose 300
°C
Table 4: Avalanche Characteristics
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
5 A
(pulse width limited by Tj max)
E
AS
Single Pulse Avalanche Energy
220 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Table 5: Gate-Source Zener Diode
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZEN E R DIODES
The built-in back-to-back Zener diodes have sp ecifically been desig ned to enhance not only the dev ice’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an ef ficient and
cost-effective intervention t o protec t t he d ev ice’s i ntegrity. T hese integrated Zener d iodes thu s av oid the
usage of external components.
2/14
STP5NK60Z - STP5NK60Z FP- STD5NK60Z
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
Table 6: On/Off
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID = 1 mA, VGS = 0 600 V
Breakdown Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (VGS = 0)
Gate-body Leaka ge
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
VGS = ± 20V ±10 µA
Current (VDS = 0)
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
VDS = VGS, ID = 50µA
3 3.75 4.5 V
VGS = 10V, ID = 2.5 A 1.2 1.6 Ω
Resistance
Table 7: Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(1) Forward Transconductance VDS = 8 V, ID = 2.5 A 4 S
fs
C
oss eq.
C
iss
C
oss
C
rss
t
d(on)
t
t
d(off)
t
t
r(Voff)
t
t
Q
Q
Q
r
r
f
c
g
gs
gd
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Outpu t
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Off-voltage Rise Time
Fall Time
Cross-over Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDS = 25V, f = 1 MHz, VGS = 0 690
90
20
VGS = 0V, VDS = 0V to 480V 40 pF
VDD = 300 V, ID = 2.5 A
RG = 4.7Ω VGS = 10 V
(see Figure 20)
16
25
36
25
VDD = 480V, ID = 5 A,
RG = 4.7Ω, V
GS
= 10V
(see Figure 20)
VDD = 400V, ID = 5 A,
VGS = 10V
(see Figure 23)
12
10
24
26
20
34 nC
6
µA
µA
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
nC
nC
Table 8: Source Drain Diode
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
(2)
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: P ul se duration = 300 µs, d ut y cy cle 1.5 %.
2. Pulse wi dt h l i m ited by safe op erating area.
3. C
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD = 5 A, VGS = 0
ISD = 5 A, di/dt = 100A/µs
VDD = 30V, Tj = 150°C
(see Figure 21)
485
2.7
11
when VDS increases from 0 to 80%
oss
5
20
1.6 V
A
A
ns
µC
A
3/14
STP5NK60Z - STP5NK60ZFP- STD5NK60Z
Figure 3: Safe Operating Area For TO-220/
DPAK
Figure 4: Safe Operating Area For TO-220FP
Figure 6: Thermal Impedance For TO-220/
DPAK
Figure 7: Thermal Impedance For TO-220FP
Figure 5: Output Characteristics
4/14
Figure 8: Transfer Characteristics
STP5NK60Z - STP5NK60Z FP- STD5NK60Z
Figure 9: Transconductance
Figure 10: Gate Charge vs Gate-source Voltage
Figure 12: Static Drain-source On Resistance
Figure 13: Capacitance Variations
Figure 11: Normalized Gate Threshold Voltage
vs Tem pera tur e
Figure 14: Normal ized On R esistance vs Temperature
Figure 15:
5/14
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