ST STP3HNK90Z, STF3HNK90Z User Manual

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N-CHANNEL 900V - 3.5Ω - 3A TO-220 - TO-220FP

STP3HNK90Z - STF3HNK90Z

Zener-Protected SuperMESH™Power MOSFET

TYPE V

STP3HNK90Z
STF3HNK90Z



TYPICAL RDS(on) = 3.5 Ω



EXTREMELY HIGH dv/dt CAPABILITY



100% AVALANCHE TESTED



GATE CHARGE MINIMIZED



VERY LOW INTRINSICCAPACITANCES



VERY GOOD MANUFACTURING

900 V
900 V

DSS

R

DS(on)

< 4.2 Ω
< 4.2 Ω3A3A

I

D

Pw

90 W
25 W

REPEATIBILITY

DESCRIPTION

The SuperME SH™ series is obtained through an
extreme optimization of S T’s well established strip­based PowerMESH™ layout. In addition to pushing
on-resistance s ignificantly down, special c are is tak­en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple­ments ST full range of high voltage MOSFETs in­cluding revolutionary MDm es h™ products.

TO-220

TO-220FP

INTERNAL SCHEMATIC DIAGRAM

3

2

1

APPLICATIONS



HIGH CURRENT, HIGH SPEED SWITCHING



IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC



LIGHTING

ORDERING INFORMATION

SALES TYPE MARKING PACKAGE PACKAGING

STP3HNK90Z P3HNK90Z TO-220 TUBE
STF3HNK90Z F3HNK90Z TO-220FP TUBE

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

1/10August 2003

STP3HNK90Z - STF3HNK90Z

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

STP3HNK90Z STF3HNK90Z

V

DS

V

DGR

V

GS

I

D

I

D

IDM()

P

TOT

V

ESD(G-S)

dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns

V

ISO

T

j

T

stg

() Pulse width limited by safe operating area
(1) I

≤3A, di/dt ≤200A/µs, VDD≤ V

SD

(*) Limited only by maximum temperature a llowed

Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)

900 V

900 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC= 25°C
Drain Current (continuous) at TC= 100°C

33(*)A

1.89 1.89 (*) A
Drain Current (pulsed) 12 12 (*) A
Total Dissipation at TC= 25°C

90 25 W
Derating Factor 0.72 0.2 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3000 V

Insulation Withstand Voltage (DC) - 2500 V
Operating Junction Temperature

Storage Temperature

(BR)DSS,Tj≤TJMAX.

-55to150 °C

THERMAL DATA

TO-220 TO-220FP

Rthj-case Thermal Resistance Junction-case Max 1.38 5 °C/W

Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W

T

l

Maximum Lead Temperature For Soldering Purpose

300 °C

AVALANCHE CHARACTERISTICS

Symbol Parameter Max Value Unit

I

AR

Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T

E

AS

Single Pulse Avalanche Energy
(starting T

max)

j

= 25 °C, ID=IAR,VDD=50V)

j

3A

200 mJ

GATE-SOURCE ZENER DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

BV

GSO

Gate-Source Breakdown

Igs=± 1mA (Open Drain) 30 V

Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have specifically been designed t o enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integ rated Zener diodes thus avoid the
usage of external components.

2/10

STP3HNK90Z - STF3H N K90Z

ELECTRICAL CHARACTERISTICS (T

=25°C UNLESS OTHERWISE SP ECIFIED)

CASE

ON/OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source

ID=1mA,VGS= 0 900 V

Breakdown Voltage

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Zero Gate Voltage
Drain Current (V

GS

=0)

Gate-body Leakage
Current (V

DS

=0)
Gate Threshold Voltage
Static Drain-source On

V

= Max Rating

DS

VDS= Max Rating, TC= 125 °C
V

= ± 30 V ±10 µA

GS

V

DS=VGS,ID

=50µA

3 3.75 4.5 V

1

50

VGS=10V,ID= 1.5 A 3.5 4.2 Ω

Resistance

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(1) Forward Transconductance VDS=15V,ID= 1.5 A 1.9 S

g

fs

C

oss eq.

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance

(3) Equivalent Output

Capacitance

t

d(on)

t

d(off)

Q
Q
Q

t

r

t

f

g
gs
gd

Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time

Total Gate Charge
Gate-Source Charge
Gate-Drain Charge

=25V,f=1MHz,VGS= 0 690

V

DS

71

14.4

VGS=0V,VDS= 0V to 720V 88 pF

=450V,ID= 1.5 A

V

DD

RG= 4.7Ω VGS=10V
(Resistive Load see, Figure 3)

23
28
42
27

=720V,ID=3A,

V

DD

VGS=10V

26

5.7

35

13.9

µA
µA

pF
pF
pF

ns
ns
ns
ns

nC
nC
nC

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD(1)

t

rr

Q

rr

I

RRM

t

rr

Q

rr

I

RRM

Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2. Pulse width limited by safe operating area.

3. C

Source-drain Current

(2)

Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge
Reverse Recovery Current

Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

.

V

DSS

ISD= 3 A, VGS=0
I

SD

VDD=50V,Tj= 25°C
(see test circuit, Figure 5)

I

SD

V

DD

(see test circuit, Figure 5)

= 3 A, di/dt = 100A/µs

= 3 A, di/dt = 100A/µs

=50V,Tj= 150°C

494

2.4

9.8

628

3.2

10.2

when VDSincreases from 0 to 80%

oss

3

12

1.6 V

A
A

ns

µC

A

ns

µC

A

3/10