STB25NM50N
STP25NM50N - STF25NM50N STB25NM50N/-1 - STW25NM50N
N-CHANNEL 500V 0.11 Ω - 22 A TO-220/FP/D²/I²PAK/TO-247 SECOND GENERATION MDmesh™ MOSFET
Table 1: General Features
TYPE |
VDSS (@TjMAX) |
ID |
RDS(on) |
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STB25NM50N-1 |
550V |
22 A |
0.140 Ω |
STF25NM50N |
550V |
22 A(*) |
0.140 Ω |
STP25NM50N |
550V |
22 A |
0.140 Ω |
STW25NM50N |
550V |
22 A |
0.140 Ω |
STB25NM50N |
550V |
22 A |
0.140 Ω |
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■HIGH dv/dt AND AVALANCHE CAPABILITIES
■100% AVALANCHE TESTED
■LOW INPUT CAPACITANCE AND GATE CHARGE
■LOW GATE INPUT RESISTANCE
DESCRIPTION
The STx25NM50N is realized with the second generation of MDmesh Technology. This revolutionary MOSFET associates a new vertical structure to the Company's strip layout to yield one of the world's lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters
APPLICATIONS
The MDmesh™ II family is very suitable for in - creasing power density of high voltage converters allowing system miniaturization and higher efficiencies.
Table 2: Order Codes
Figure 1: Package
2 |
3 |
2 |
3 |
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1 |
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1 |
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TO-220 |
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I²PAK |
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3 |
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1 |
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D²PAK |
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3 |
3 |
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2 |
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2 |
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1 |
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1 |
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TO-247 |
TO-220FP |
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Figure 2: Internal Schematic Diagram
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SALES TYPE |
MARKING |
PACKAGE |
PACKAGING |
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STP25NM50N |
P25NM50N |
TO-220 |
TUBE |
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STF25NM50N |
F25NM50N |
TO-220FP |
TUBE |
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STB25NM50N-1 |
B25NM50N |
I²PAK |
TUBE |
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STW25NM50N |
W25NM50N |
TO-247 |
TUBE |
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STB25NM50N |
B25NM50N |
D²PAK |
TAPE & REEL |
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Rev. 9 |
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October 2005 |
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1/16 |
STP25NM50N - STF25NM50N - STB25NM50N/-1 - STW25NM50N
Table 3: Absolute Maximum ratings
Symbol |
Parameter |
Value |
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Unit |
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TO-220/D²PAK/I²PAK/ |
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TO-220FP |
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TO-247 |
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VDS |
Drain-source Voltage (VGS = 0) |
500 |
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V |
VDGR |
Drain-gate Voltage (RGS = 20 kΩ ) |
500 |
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V |
VGS |
Gatesource Voltage |
±25 |
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V |
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ID |
Drain Current (continuous) at TC = 25°C |
22 |
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22(*) |
A |
ID |
Drain Current (continuous) at TC = 100°C |
14 |
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14 (*) |
A |
IDM ( ) |
Drain Current (pulsed) |
88 |
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88 (*) |
A |
PTOT |
Total Dissipation at TC = 25°C |
160 |
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40 |
W |
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Derating Factor |
1.28 |
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0.32 |
W/°C |
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dv/dt(1) |
Peak Diode Recovery voltage slope |
15 |
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V/ns |
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Tstg |
Storage Temperature |
–55 to 150 |
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°C |
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Tj |
Max. Operating Junction Temperature |
150 |
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°C |
( ) Pulse width limited by safe operating area
(1) ISD ≤ 22 A, di/dt ≤ 400 A/µs, VDD =80% V(BR)DSS.
(*) Limited only by maximum temperature allowed
Table 4: Thermal Data
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TO-220/D²PAK/I²PAK/ |
TO-220FP |
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TO-247 |
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Rthj-case |
Thermal Resistance Junction-case Max |
0.78 |
3.1 |
°C/W |
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Rthj-amb |
Thermal Resistance Junction-ambient Max |
62.5 |
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°C/W |
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Tl |
Maximum Lead Temperature For Soldering |
300 |
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°C |
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Purpose |
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Table 5: Avalanche Characteristics
Symbol |
Parameter |
Max Value |
Unit |
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IAS |
Avalanche Current, Repetitive or Not-Repetitive |
10 |
A |
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(pulse width limited by Tj max) |
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EAS |
Single Pulse Avalanche Energy |
350 |
mJ |
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(starting Tj = 25 °C, ID = IAS, VDD = 50 V) |
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2/16
STB25NM50N/-1 - STW25NM50N - STP25NM50N - STF25NM50N
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Symbol |
Parameter |
Test Conditions |
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Value |
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Unit |
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Min. |
Typ. |
Max. |
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V(BR)DSS |
Drain-source |
ID = 1mA, VGS = 0 |
500 |
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V |
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Breakdown Voltage |
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dv/dt(2) |
Drain Source Voltage |
Vdd=400V, Id=25A, |
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44 |
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V/ns |
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Slope |
Vgs=10V |
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IDSS |
Zero Gate Voltage |
VDS = Max Rating |
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1 |
µA |
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Drain Current (VGS = 0) |
VDS = Max Rating, |
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10 |
µA |
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TC = 125 °C |
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IGSS |
Gate-body Leakage |
VGS = ± 20V |
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100 |
nA |
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Current (VDS = 0) |
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VGS(th) |
Gate Threshold Voltage |
VDS = VGS, ID = 250 µA |
2 |
3 |
4 |
V |
RDS(on) |
Static Drain-source On |
VGS = 10V, ID = 11 A |
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0.110 |
0.140 |
Ω |
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Resistance |
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(2) Characteristic value at turn off on inductive load
Table 7: Dynamic
Symbol |
Parameter |
Test Conditions |
Min. |
Typ. |
Max. |
Unit |
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gfs (1) |
Forward Transconductance |
VDS=15 V, ID =11 A |
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19 |
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S |
Ciss |
Input Capacitance |
VDS = 25V, f = 1 MHz, VGS = 0 |
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2565 |
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pF |
Coss |
Output Capacitance |
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511 |
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pF |
Crss |
Reverse Transfer |
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77 |
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pF |
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Capacitance |
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Coss eq. (*) |
Equivalent Output |
VGS = 0V, VDS = 0V to 400V |
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315 |
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pF |
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Capacitance |
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td(on) |
Turn-on Delay Time |
VDD =250 V, ID = 11A |
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23 |
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ns |
tr |
Rise Time |
RG = 4.7Ω VGS = 10 V |
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23 |
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ns |
td(off) |
Off-voltageRise Time |
(see Figure 19) |
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75 |
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ns |
tf |
Fall Time |
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22 |
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ns |
Qg |
Total Gate Charge |
VDD = 400V, ID =22 A, |
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84 |
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nC |
Qgs |
Gate-Source Charge |
VGS = 10V, |
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11 |
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nC |
Qgd |
Gate-Drain Charge |
(see Figure 23) |
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35 |
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nC |
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Rg |
Gate Input Resistance |
f=1MHz Gate DC Bias=0 |
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1.6 |
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Ω |
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Test Signal Level=20mV |
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Open Drain |
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Table 8: Source Drain Diode
Symbol |
Parameter |
Test Conditions |
Min. |
Typ. |
Max. |
Unit |
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ISD |
Source-drain Current |
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22 |
A |
ISDM ( ) |
Source-drain Current (pulsed) |
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88 |
A |
VSD (1) |
Forward On Voltage |
ISD = 22 A, VGS = 0 |
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1.3 |
V |
trr |
Reverse Recovery Time |
ISD = 22A, di/dt = 100 A/µs |
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460 |
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ns |
Qrr |
Reverse Recovery Charge |
VDD = 100 V, Tj = 25°C |
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6.9 |
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µC |
IRRM |
Reverse Recovery Current |
(see Figure 21) |
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30 |
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A |
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trr |
Reverse Recovery Time |
ISD = 22 A, di/dt = 100 A/µs |
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532 |
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ns |
Qrr |
Reverse Recovery Charge |
VDD = 100 V, Tj = 150°C |
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8.25 |
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µC |
IRRM |
Reverse Recovery Current |
(see Figure 21) |
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31 |
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A |
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(*) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS
3/16
STP25NM50N - STF25NM50N - STB25NM50N/-1 - STW25NM50N
Figure 3: Safe Operating Area For TO-220/ |
Figure 6: Thermal Impedance TO-220/I²PAK/ |
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I²PAK/D²PAK |
D²PAK |
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Figure 4: Safe Operating Area For TO-220FP |
Figure 7: Thermal Impedance For TO-220FP |
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Figure 5: Safe Operating Area For TO-247 |
Figure 8: Thermal Impedance For TO-247 |
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4/16
STB25NM50N/-1 - STW25NM50N - STP25NM50N - STF25NM50N
Figure 9: Output Characteristics |
Figure 12: Transfer Characteristics |
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Figure 10: Transconductance |
Figure 13: Static Drain-Source On Resistance |
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Figure 11: Gate Charge vs Gate-source Voltage |
Figure 14: Capacitance Variations |
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5/16