Features
■ Operating input voltage range from 2.6 V to
4.8 V
■ ±1% output voltage tolerance
■ Low output ripple
■ True-shutdown
■ Short-circuit protection
■ Digital low power function
■ Very high efficiency at light load thanks to pulse
skipping operation
■ Very fast line and load transients
■ 1.2 MHz switching frequency
■ 1 µA max. quiescent current
■ DFN12L (3 x 3 x 0.8 mm)
Applications
■ Single rail AMOLED display
■ Cellular phones
■ Battery powered equipment
STOD1317B
170 mA 13 V, high efficiency
boost converter + LDO
DFN12L (3 x 3 mm)
integrated and contribute to achieving high
efficiency. The true-shutdown feature allows
physical disconnection of the battery from the
load when the device is in shutdown mode. The
control technique is able to maintain efficiency
higher than 85% at light loads and higher than
80% at full load. The device includes soft-start
control, inrush current limiter, thermal shutdown
and inductor peak current limit. The STOD1317B
is packaged in DFN12L 3 x 3 x 0.8 mm height.
Description
The STOD1317B is a fixed frequency, high
efficiency, boost DC-DC converter with cascaded
LDO able to provide output voltages ranging from
6 V to 13 V starting with an input voltage from
2.6 V to 4.8 V. The device is designed to supply
loads that are very sensitive to output ripple such
as AMOLED display panels. A dedicated LDO is
able to suppress any ripple and noise coming out
from the DC-DC converter. The LDO works with a
constant drop in order to maintain high efficiency
in the whole operating range. The low R
channel and P-channel MOSFET switches are
Table 1. Device summary
Order code Marking Package Packaging
STOD1317BPUR 1317B DFN12L (3 x 3mm) 3000 parts per reel
December 2011 Doc ID 022607 Rev 1 1/22
DSon
N-
www.st.com
22
Contents STOD1317B
Contents
1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6 Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1 BOOST multiple mode of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1.1 Pulse skipping operation: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1.2 Discontinuous conduction mode: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1.3 Continuous conduction mode: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.2 Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.3 Soft-start and inrush current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.4 Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.5 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.6 Digital low power function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1 External passive components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.1 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.2 Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2 Recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22 Doc ID 022607 Rev 1
STOD1317B Schematic
1 Schematic
Figure 1. Application schematic
Table 2. Typical external components
Comp. Manufacturer Part number Value Ratings Size
MURATA
C
IN
C
MID
C
OUT
(1)
L
R1 kΩ 0402
R2 kΩ 0402
1. Inductor used for the typical application conditions. Inductance values ranging from 3.3 µH to 6.8 µH can be used together
with the STOD1317B. A minimum saturation current of 1.2 A must be ensured to support 170 mA at 2.6 V in full range.
Taiyo Yuden
TDK
MURATA
TDK
MURATA
TDK
CoilCraft
TDK
DASTEK
GRM219R61A106KE44
LMK212BJ106KD-T
C1608X5R0J106
GRM219R61C475KE15
C2012X5R1C475
GRM219R61C475KE15
C2012X5R1C475
LPS4012-472ML
VLS252012T-4R7MR81
PNL3008-4R7M
10µF
4.7µF
4.7µF
4.7µH
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 6.3V
±10%, X5R, 16V
±10%, X5R, 16V
±10%, X5R, 16V
±10%, X5R, 16V
±20%, curr. 1.7A, resist. 0.175Ω
±20%, curr. 1.3A, resist. 0.338Ω
±20%, curr. 0.9A, resist. 0.280Ω
0805
0805
0603
0805
0805
0805
0805
4.0 x 4.0 x 1.2
2.5 x 2.0 x 1.2
3.1 x 3.1 x 0.8
Note: All the above components refer to a typical application. Operation of the device is not limited
to the choice of these external components.
Doc ID 022607 Rev 1 3/22
Schematic STOD1317B
Figure 2. Block schematic
VMIDLX
PGND
GND
VIN
RING
KILLER
PGND
OVP
M1
DMD
M0
s
PWM LOGIC CONTROL
&
DRIVER
OCP
COMP
+-
ss
M2
s
M3
OTA
+-
SOFT
START
+-
EA
SCP
VOUT
VO_SET
FB
VREF
+
OSC
SHUT
DOWN
ENNC
OTP
4/22 Doc ID 022607 Rev 1
STOD1317B Pin configuration
2 Pin configuration
Figure 3. Pin configuration (top view)
VMID
VOUT
VO_SET
AGND
GND
FB
EN
Table 3. Pin description
Pin name Pin number Description
VMID 1 Step-up output voltage
VOUT 2 LDO output voltage
VO_SET 3 LDO output voltage set
GND 4 Analog ground
FB 5 Feedback voltage
Enable pin. Connect this pin to GND or a voltage lower than 0.4V
EN 6
NC 7 Not connected
to shut down the IC. A voltage higher than 1.2V is required to
enable the IC
LX
LX
PGND
PGND
VIN
NC
VIN 8 Supply voltage
PGND 9, 10 Power ground
LX 11, 12 Switch pin. Inductor connection to the internal switches
Exposed
PA D
Internally connected to PGND
Doc ID 022607 Rev 1 5/22
Maximum ratings STOD1317B
3 Maximum ratings
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
V
IN
Supply voltage -0.3 to +7.0 V
LX Switching node -0.3 to +16 V
V
OUT_SET
V
OUT
LDO output voltage set 16 V
Output voltage -0.3 to +16 V
EN Logic pin -0.3 to 4.6 V
FB Feedback pin -0.3 to +2.5 V
Machine model ±200 V
ESD
Human body model ±2000 V
T
T
AMB
T
J
STG
Operating ambient temperature -40 to 85 °C
Maximum operating junction temperature +150 °C
Storage temperature -65 to 150 °C
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 5. Thermal data
Symbol Parameter Value Unit
R
R
thJA
thJC
Thermal resistance junction-ambient 49.1 °C/W
Thermal resistance junction-case (FR-4 PCB) 4.216 °C/W
6/22 Doc ID 022607 Rev 1
STOD1317B Electrical characteristics
4 Electrical characteristics
TJ = 25 °C, VIN = 3.7 V, V
L = 4.7 µH, V
Table 6. Electrical characteristics
= 2 V, unless otherwise specified.
EN
= 10 V, CIN = 2 x 10 µF, C
OUT
= 2 x 4.7 µF, C
MID
= 2 x 4.7 µF,
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
General section
V
IN
Operating power input
voltage range
Shutdown mode
Iq
No switching V
V
UVLO
f
SW
I
PK
Undervoltage lockout
threshold
Switching frequency 1 1.2 1.35 MHz
Switch current limitation 1.6 2 2.4 A
Output voltage (V
Feedback voltage TA=25°C 1.08 1.2 1.32 V
Accuracy -40°C<TA<85°C 1.02 1.38 V
FB
Output voltage range 6 10 13 V
Total line/load static
variation
Output voltage ripple
Overvoltage protection VFB=0 14 15 16 V
FB pin leakage current VFB=5V to 13V 1 µA
Step-up output voltage
regulation
ΔV
V
ΔV
V
RIPPLE
V
I
VMID
V
FB
OUT
LINE/LOA
D
OUT
OVP
LKFB
OUT
Shutdown mode,
V
=GND
EN
=3.7V, VFB=1.3V 1 1.5 mA
EN=VIN
rising 2.4 2.5
V
IN
falling 2.1 2.2
V
IN
)
(1)
TA=25°C; VIN=2.6V to
4.8V; I
V
IN
I
OUT
=5mA to 170mA
OUT
=3.7V, V
=10mA
OUT
=10V,
2.6 3.7 4.8 V
0.5 1 µA
30 40 mV
30 mV
OUT +
V
0.38
VOUT +
0.56
VOUT +
0.7
V
V
Logic inputs
EN low-level input voltage 0.4 V
IL
EN high-level input voltage 1.2 V
EN input leakage current VEN=VIN=4.8V 1 µA
V
I
V
IH
LK-I
Power switches
P-Channel ON resistance I
R
DSON
I
LKG-LX
N-Channel ON resistance I
LX leakage current VIN=VLX=4.8V; VEN=0 1 µA
=100mA 550 900
SW_P
=100mA 250 400
SW_N
Doc ID 022607 Rev 1 7/22
mΩ
Electrical characteristics STOD1317B
Table 6. Electrical characteristics (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
DLP function
V
=3.7V, VEN=0,
I
O_LEAK
1. Not tested in production. This value is guaranteed by correlation with R
2. Not tested in production.
Leakage current from load
IN
=6V (supplied by
V
OUT
external power)
0.5 2 µA
, peak current limit and operating input voltage.
DSON
8/22 Doc ID 022607 Rev 1
STOD1317B Typical performance characteristics
5 Typical performance characteristics
TJ = 25 °C, VIN = 3.7 V, V
L = 4.7 µH, V
= 2 V, unless otherwise specified.
EN
= 10 V, CIN = 2 x 10 µF, C
OUT
= 2 x 4.7 µF, C
MID
OUT
Figure 4. Quiescent current vs. temperature Figure 5. Switching frequency vs.
3
2.75
2.5
2.25
2
1.75
Quiescent Current [ mA]
1.5
-25 0 25 50 75 100 125
Temperature [C]
Figure 6. Efficiency vs. output current Figure 7. Switching frequency
VI
90
85
80
75
70
Efficiency [%]
65
60
55
0 20 40 60 80 100 120 140 160 180
VIN=4.2V VIN=3.7V
VIN=3.2V VIN=2.9V
Output Current [mA]
1.35
1.33
1.31
1.29
1.27
Switching Frequency [KHz]
1.25
-25 0 25 50 75 100 125
SW
VMID
VOUT
temperature
Temperature [C]
Frequency : 1.285
MHz
= 2 x4.7 µF,
3.7V
2.9V
4.8V
VIN = 3.7 V, I
Figure 8. Soft-start inrush current Figure 9. Feedback voltage vs. temperature
EN
V
OUT
I
IN
V
= 3.7 V, NO LOAD, TJ = 25°C, SS:1.265 ms, Inrush
IN
current: 260 mA
1.22
1.21
1.2
1.19
[V]
FB
1.18
V
1.17
1.16
1.15
2.3 2.5 2.7 2.9 3.1 3. 3 3.5 3.7 3. 9 4.1 4.3 4.5 4.7 4.9
= 170 mA, TJ = 25 °C
OUT
Input Voltage [V]
Doc ID 022607 Rev 1 9/22
Typical performance characteristics STOD1317B
Figure 10. TDMA noise immunity
V
IN
V
OUT
VIN = 2.6 V to 3.1 V, I
OUT
= 20 mA
10/22 Doc ID 022607 Rev 1
STOD1317B Detailed description
6 Detailed description
The STOD1317B is a high efficiency DC-DC converter which integrates a step-up and LDO
power stage suitable for supplying AMOLED panels. Thanks to the high level of integration it
needs only 6 external components to operate and it achieves very high efficiency using a
synchronous rectification technique.
The controller uses an average current mode technique in order to obtain good stability and
precise voltage regulation in all possible conditions of input voltage, output voltage and
output current. In addition, the peak inductor current is monitored in order to avoid saturation
of the coils.
The STOD1317B implements a power saving technique in order to maintain high efficiency
at very light load and it switches to PWM operation as the load increases in order to
guarantee the best dynamic performances and low noise operation.
In order to guarantee very low ripple on the output voltage, the step-up output is filtered by
the LDO. There are two control loops; the LDO control loop regulates V
provide the right voltage to the output, while the boost control loop is internally set to provide
and output voltage 380 mV higher than V
the minimum possible drop.
The STOD1317B avoids battery leakage thanks to the true-shutdown feature and it is self
protected from overtemperature and short-circuit on the V
soft-start guarantee proper operation during startup.
in order to maintain the LDO in regulation at
OUT
pin. Undervoltage lockout and
OUT
in order to
OUT
6.1 BOOST multiple mode of operation
The boost DC-DC operates in three different modes: pulse skipping (PS), discontinuous
conduction mode (DCM) and continuous conduction mode (CCM). It switches automatically
between the three modes according to input voltage, output current and output voltage
conditions.
6.1.1 Pulse skipping operation
The STOD1317B works in pulse skipping mode when the load current is below some tens of
mA. The load current level at which this way of operation occurs depends on the input and
output voltage.
6.1.2 Discontinuous conduction mode
When the load increases above some tens of mA, the STOD1317B enters DCM operation.
In order to obtain this type of operation the controller must avoid the inductor current going
negative. The discontinuous mode detector (DMD) block senses the voltage across the
synchronous rectifier and turns off the switch when the voltage crosses a defined threshold
which, in turn, represents a certain current in the inductor. This current can vary according
to the slope of the inductor current which depends on input voltage, inductance value, and
output voltage.
6.1.3 Continuous conduction mode
At medium/high output loads the STOD1317B enters full CCM at constant switching
frequency mode.
Doc ID 022607 Rev 1 11/22
Detailed description STOD1317B
6.2 Enable pin
The device operates when the EN pin is set high. If the EN pin is set low, the device stops
switching, all the internal blocks are turned off. In this condition the current drawn from V
below 1 µA in the whole temperature range. In addition, the internal switches are in OFF
state so the load is electrically disconnected from the input, this avoids unwanted current
leakage from the input to the load.
is
IN
6.3 Soft-start and inrush current limiting
After the EN pin is pulled high, or after a suitable voltage is applied to VIN and EN, the
device initiates the startup phase.
As a first step, the C
technique in order to keep the charge current below 400 mA. This avoids battery
overloading during startup.
After V
procedure for the step-up is started. V
regulation value.
reaches the VIN voltage level, the P1 switch is fully turned on and the soft-start
MID
capacitor is charged, the P1 switch implements a current limiting
MID
OUT
6.4 Undervoltage lockout
The undervoltage lockout function avoids improper operation of the STOD1317B when the
input voltage is not high enough. When the input voltage is below the UVLO threshold the
device is in shutdown mode. The hysteresis of 100 mV avoids unstable operation when the
input voltage is close to the UVLO threshold.
6.5 Overtemperature protection
An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 150 °C, typical, the device stops operating. As soon as the
temperature falls below 135 °C, typical, normal operation is restored.
starts to softly increase until it reaches the
12/22 Doc ID 022607 Rev 1
STOD1317B Detailed description
6.6 Digital low power function
The digital low power (DLP) function allows physical disconnection of the load from the
device.
Figure 11. Digital low power function
D-IC
VPNL
Charge Pump
SW
*
GPIO2 GPIO1
Disable
DCDC
EN EN
FB
**
SW
Disable
S/D
Disable
Leakage
Pass
Enable/Disable
Refer to next page
DDVDH(6V)
Enable
VDDEL
Operation
1. When the power IC is disabled, in order to disconnect leakage current through the
feedback node, the S/W function is active.
2. A new EN transition from low to high and/or device power-up turn off the DLP function
and allow IC to work under typical conditions.
Doc ID 022607 Rev 1 13/22
Application information STOD1317B
7 Application information
7.1 External passive components
7.1.1 Inductor selection
The inductor is the key passive component for switching converters.
For the step-up converter an inductance between 3.3 µH and 6.8 µH is recommended.
It is very important to select the right inductor according to the maximum current the
inductor can handle in order to avoid saturation. The peak current for the step-up can be
calculated as:
Equation 1
IV
×
I
=
BOOSTPEAK
OUTMID
VIN
×
η
+
MIN
×
-
MID
where
V
: step-up output voltage, it is fixed internally to V
MID
I
: output current;
OUT
V
: input voltage of the STOD1317B;
IN
OUT
+ 0.38 V;
fs: switching frequency. Use the minimum value of 1 MHz for worst case;
)VINV(VIN
MINMIDMIN
LfsV2
×××
η: efficiency of the step-up converter (0.80 at maximum load).
7.1.2 Input and output capacitor selection
It is recommended to use ceramic capacitors with low ESR as input and output capacitors in
order to filter any disturbance present in the input line and to obtain stable operation of the
step-up converter and LDO. A minimum real capacitance value of 3 µF must be guaranteed
for C
MID
and C
in all conditions.
OUT
7.2 Recommended PCB layout
The STOD1317B is a high frequency power switching device so it requires a proper PCB
layout in order to obtain the necessary stability and optimize line/load regulation and output
voltage ripple.
The input capacitor must be as close as possible to the V
In order to minimize the ground noise, a common ground node for power ground (PGND)
and a different one for analog ground (GND) must be used. The exposed pad is connected
to PGND through vias.
Grounding is fundamental to the operation of DC-DC converters; run separate ground paths
for critical parts of the circuit (GND and Power GND), each connected back to a single
ground point.
Separate ground lines prevent the current and noise of one component from interfering with
other components. If using a ground plane, utilize “split” plane techniques to give effective
grounding. Use multiple vias to decrease the trace impedance to ground.
IN
pin.
14/22 Doc ID 022607 Rev 1
STOD1317B Application information
Figure 12. Ground schematic
# V routing #:
Do not !!
the power supply plane
Via wich dives into
the incoming and the outgoing
track are not connected to each
other but only to the capacitor pad
This track can be longer.
In fact we add here an inductor
that creates a second order filter
with the CoHF
Vout
L1
COUT
L2
CoHF
Via wich dives into
the ground plane
We add here
an impedance
that lowers the
resonating
frequency of
CoHF
GND
Do !!
Vout
COUT
CO HF L3 f
3 MHz
30 nH
100 nF
(1via)
5 MHz
10 nH
100nF
16 MHz
1 nH
100nF
Co HF resonating frequency
1/2 L3
1/2 L3
CoHF
Start from the
component pad and not
the incoming track
Vout
Such isolation is necessary to prevent high-level switching currents from returning to the
battery, or other power supply, through the same ground-return path as the analog signals.
If that happens, the ground path of those sensitive signals is disturbed; the high-level
switching currents flowing through the ground's resistance and inductance cause the
voltage along the return path to vary.
In addition to the grounding scheme, proper placement of the regulator's components is
important.
Beginning a new layout, for the reasons above, it is necessary to firstly place the capacitors
C
, C
IN
OUT
and C
as close as possible to the related device pins.
MID
After that, it is possible to place the inductors and the Power GND routing. Next, we can
trace the GND connected through vias to the PGND near to one of the main filter capacitors.
The LDO needs a quiet ground signal in order to operate properly.
It is important to pay close attention to the routing of traces from capacitor terminals in a
DC-DC converter circuit.
Large-valued low-ESR capacitors are expensive, and bad routings can cancel their
performance.
A good routing, on the other hand, can lower the output noise.
Ripple is directly related to the inductor value, the capacitor ESR, the switching frequency,
and so forth, but HF noise (spikes) depends on parasitic elements and the switching action.
In a bad routing, parasitic inductance associated with trace lengths causes problems:
In Figure 12, L1 brings about an increase in noise, and L2 limits the attenuation of an added
HF capacitor. The solution is to bring the input trace in on one side of the capacitor pad, and
the output trace out on the other side of the pad.
Doc ID 022607 Rev 1 15/22
Application information STOD1317B
Figure 13. Top layer
Figure 14. Bottom layer
16/22 Doc ID 022607 Rev 1
STOD1317B Package mechanical data
8 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
®
packages, depending on their level of environmental compliance. ECOPACK
Doc ID 022607 Rev 1 17/22
Package mechanical data STOD1317B
DFN12L (3 x 3 x 0.6 mm) mechanical data
mm. inch.
Dim.
Min. Typ. Max. Min. Typ. Max.
A 0.51 0.55 0.60 0.020 0.022 0.024
A1 0 0.02 0.05 0 0.001 0.002
A3 0.20 0.008
b 0.18 0.25 0.30 0.007 0.010 0.012
D2.85 33.15 0.112 0.118 0.124
D2 1.87 2.02 2.12 0.074 0.080 0.083
E2.85 33.15 0.112 0.118 0.124
E2 1.06 1.21 1.31 0.042 0.048 0.052
e 0.45 0.018
L0.30 0.40 0.50 0.012 0.016 0.020
18/22 Doc ID 022607 Rev 1
8085116/A
STOD1317B Package mechanical data
Tape & reel QFNxx/DFNxx (3x3) mechanical data
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 330 12.992
C 12.8 13.2 0.504 0.519
D 20.2 0.795
N 99 101 3.898 3.976
T 14.4 0.567
Ao 3.3 0.130
Bo 3.3 0.130
Ko 1.1 0.043
Po 4 0.157
P 8 0.315
Doc ID 022607 Rev 1 19/22
Package mechanical data STOD1317B
Figure 15. DFN12L (3 x 3 mm) footprint recommended data
20/22 Doc ID 022607 Rev 1
STOD1317B Revision history
9 Revision history
Table 7. Document revision history
Date Revision Changes
19-Dec-2011 1 Initial release.
Doc ID 022607 Rev 1 21/22
STOD1317B
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22/22 Doc ID 022607 Rev 1
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