ST STM706T, STM706S, STM706R, STM706P, STM708T User Manual

STM706T/S/R, STM706P, STM708T/S/R

3 V supervisor

Features

■ Precision VCC monitor

– STM706/708

T: 3.00 V ≤ VRST ≤ 3.15 V

S: 2.88 V ≤ VRST ≤ 3.00 V

R: STM706P: 2.59 V ≤ VRST ≤ 2.70 V

■RST and RST outputs

■200 ms (typ.) trec

■Watchdog timer - 1.6 s (typ.)

■Manual reset input (MR)

■Power-fail comparator (PFI/PFO)

■Low supply current - 40 µA (typ.)

■Guaranteed RST (RST) assertion down to VCC = 1.0 V

■Operating temperature: –40 °C to 85 °C (industrial grade)

■RoHS compliance

–Lead-free components are compliant with the RoHS directive

8

1

SO8 (M)

TSSOP8 3x3 (DS)(1)

1. Contact local ST sales office for availability.

Table 1.	Device summary
		Watchdog	Watchdog	Active-low			Active-high	Manual	Power-fail
		input	output(1)			(1)	RST(1)	reset input	comparator
					RST
STM706T/S/R
STM706P(2)
STM708T/S/R

1.Push-pull output.

2.The STM706P is identical to the STM706R, except its reset output is active-high.

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www.st.com

Contents	STM706T/S/R, STM706P, STM708T/S/R

Contents

1	Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						. 5
2	Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						8
	2.1						8
		MR
	2.2	WDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.3						8
		WDO
	2.4						8
		RST
	2.5	RST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.6	PFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.7						9
		PFO
3	Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						11
	3.1	Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					11
	3.2	Push-button reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					11
	3.3	Watchdog input (STM706T/S/R and STM706P) . . . . . . . . . . . . . . . . . . .					11
	3.4	Watchdog output (STM706T/S/R and STM706P) . . . . . . . . . . . . . . . . . .					11
	3.5	Power-fail input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					12
	3.6	Ensuring a valid reset output down to VCC = 0 V . . . . . . . . . . . . . . . . . . .					12
	3.7	Interfacing to microprocessors with bi-directional reset pins . . . . . . . . . .					13
4	Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						14
5	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						21
6	DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						22
7	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						26
8	Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						29
9	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						31

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STM706T/S/R, STM706P, STM708T/S/R	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 5. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 6. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 7. SO8 - 8-lead plastic small outline, 150 mils body width,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 8. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size,

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 9. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 10. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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List of figures	STM706T/S/R, STM706P, STM708T/S/R

List of figures

Figure 1. Logic diagram (STM706T/S/R and STM706P) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic diagram (STM708T/S/R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. STM706T/S/R and STM706P SO8 connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. STM706T/S/R and STM706P TSSOP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 5. STM708T/S/R SO8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 6. STM708T/S/R TSSOP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 7. Block diagram (STM706T/S/R and STM706P) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 8. Block diagram (STM708T/S/R). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 9. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 10. Reset output valid to ground circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11. Interfacing to microprocessors with bi-directional reset I/O . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. Supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 13. VPFI threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. Reset comparator propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 15. Power-up trec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 16. Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 17. Watchdog timeout period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 18. PFI to PFO propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 19. Output voltage vs. load current (VCC = 5 V; TA = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 20. RST output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 21. RST output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 22. Power-fail comparator response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 23. Power-fail comparator response time (de-assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 24. Maximum transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 25. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 26. Power-fail comparator waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 27. MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 28. Watchdog timing (STM706T/S/R and STM706P) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 29. SO8 – 8-lead plastic small outline, 150 mils body width,

package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 30. TSSOP8 – 8-lead, thin shrink small outline, 3 x 3 mm body size, outline. . . . . . . . . . . . . . 28

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STM706T/S/R, STM706P, STM708T/S/R	Description

1 Description

The STM70x supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output

(RST) is forced low (or high in the case of RST).

These devices also offer a watchdog timer (except for STM708T/S/R) as well as a power-fail comparator to provide the system with an early warning of impending power failure.

The STM706P is identical to the STM706R, except its reset output is active-high. These devices are available in a standard 8-pin SOIC package or a space-saving 8-pin TSSOP package.

Figure 1. Logic diagram (STM706T/S/R and STM706P)

	VCC
WDI		WDO
MR	STM706T/S/R,	RST (RST)(1)
	STM706P
PFI		PFO

VSS

AI08841

1. For STM706P only.

Figure 2. Logic diagram (STM708T/S/R)

VCC

RST

MR

STM708T/S/R RST

PFI

PFO

VSS

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Description										STM706T/S/R, STM706P, STM708T/S/R
	Table 2.								Signal names
	Symbol									Name
										Push-button reset input
				MR
			WDI							Watchdog input
										Watchdog output
		WDO
										Active-low reset output
			RST
	RST(1)									Active-high reset output
			VCC							Supply voltage
				PFI						Power-fail input
										Power-fail output
			PFO
			VSS							Ground
				NC						No connect

1. For STM706P and STM708T/S/R only.

Figure 3. STM706T/S/R and STM706P SO8 connections

SO8

			1	8
MR						WDO
VCC
			2	7		RST(RST)(1)
VSS			3	6		WDI
PFI			4	5
						PFO

AI08837

1. For STM706P reset output is active-high.

Figure 4. STM706T/S/R and STM706P TSSOP8 connections

TSSOP8

RST(RST)(1)				1	8	WDI
				2	7
	WDO					PFO
						PFI
		MR		3	6
	VCC			4	5	VSS

AI08838

1. For STM706P reset output is active-high.

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STM706T/S/R, STM706P, STM708T/S/R								Description
	Figure 5. STM708T/S/R SO8 connections
				SO8
							RST
	MR			1	8
	VCC			2	7
							RST
	VSS			3	6		NC
	PFI			4	5		PFO
								AI08839

Figure 6. STM708T/S/R TSSOP8 connections

TSSOP8

RST			1	8		NC
RST			2	7
						PFO
			3	6		PFI
	MR
VCC			4	5		VSS

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Pin descriptions	STM706T/S/R, STM706P, STM708T/S/R

2 Pin descriptions

2.1MR

A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low

and for trec after MR returns high. This active-low input has an internal pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if

unused.

2.2WDI

If WDI remains high or low for 1.6 s, the internal watchdog timer runs out and reset (or WDO) is triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge.

The watchdog function cannot be disabled by allowing the WDI pin to float.

2.3WDO

	WDO goes low when a transition does not occur on WDI within 1.6 s, and remains low until
	a transition occurs on WDI (indicating the watchdog interrupt has been serviced).					WDO			also
	goes low when VCC falls below the reset threshold; however, unlike the reset output,						WDO
	goes high as soon as VCC exceeds the reset threshold. Output type is push-pull.
Note:	For those devices with a				output, a watchdog timeout will not trigger reset unless
				WDO				WDO
	is connected to	MR.

2.4 RST

Pulses low for trec when triggered, and stays low whenever VCC is below the reset threshold or when MR is a logic low. It remains low for trec after either VCC rises above the reset threshold, the watchdog triggers a reset, or MR goes from low to high.

2.5 RST

Pulses high for trec when triggered, and stays high whenever VCC is above the reset threshold or when MR is a logic high. It remains high for trec after either VCC falls below the reset threshold, the watchdog triggers a reset, or MR goes from high to low.

2.6 PFI

When PFI is less than VPFI, PFO goes low; otherwise, PFO remains high. Connect to ground if unused.

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STM706T/S/R, STM706P, STM708T/S/R	Pin descriptions

2.7PFO

When PFI is less than VPFI, PFO goes low; otherwise, PFO remains high. Output type is

push-pull. PFO pin is not supposed to be forced low by a processor. MR input is gated off during the period PFO is forced low. Leave open if unused.

	Table 3.	Pin description
				Pin
								Name								Function
	STM706P		STM706T/S/R			STM708T/S/R
	SO8	TSSOP8	SO8		TSSOP8	SO8	TSSOP8
	1	3	1		3	1	3									Push-button reset input
											MR
	6	8	6		8	—	—			WDI						Watchdog input
	8	2	8		2	—	—									Watchdog output (push-pull)
									WDO
	—	—	7		1	7	1									Active-low reset output
										RST
	7	1	—		—	8	2			RST						Active-high reset output
	2	4	2		4	2	4			VCC						Supply voltage
	4	6	4		6	4	6			PFI						Power-fail input
	5	7	5		7	5	7									Power-fail output (push-pull)
										PFO
	3	5	3		5	3	5			VSS						Ground
	—	—	—		—	6	8				NC					No connect

Figure 7. Block diagram (STM706T/S/R and STM706P)

	WDI	WATCHDOG
WDI	transitional			WDO
		TIMER
	detector
VCC	VRST	COMPARE
	VCC
MR			trec	RST (RST)	(1)
			generator
PFI	VPFI	COMPARE		PFO
					AI08829

1. For STM706P only.

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Pin descriptions	STM706T/S/R, STM706P, STM708T/S/R
Figure 8. Block diagram (STM708T/S/R)

VCC	COMPARE
VRST
		RST
VCC
MR	trec	RST
	generator
PFI	COMPARE
VPFI		PFO
		AI08830

Figure 9. Hardware hookup

	Unregulated	Regulator
		VIN VCC	VCC
	voltage

STM706T/S/R; 0.1 μF STM706P;

STM708T/S/R

WDI(1)

(1)

WDO

To microprocessor IRQ

R1

From microprocessor

R2

PFI

PFO

To microprocessor NMI

MR

RST

To microprocessor reset

Push-button

RST(2)

AI08843

1.For STM706T/S/R and STM706P.

2.For STM706P and STM708T/S/R.

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