ST STM705, STM706, STM707, STM708, STM813L User Manual

STM705, STM706 STM707, STM708, STM813L

5 V supervisor

Features

■5 V operating voltage

■Precision VCC monitor

– STM705/707/813L

–	4.50 V ≤ VRST ≤ 4.75 V
–	STM706/708
–	4.25 ≤ VRST ≤ 4.50 V

■RST and RST outputs

■200 ms (typ) trec

■Watchdog timer - 1.6 s (typ)

■Manual reset input (MR)

■Power-fail comparator (PFI/PFO)

■Low supply current - 40 µA (typ)

■Guaranteed RST (RST) assertion down to VCC = 1.0 V

■Operating temperature: –40 °C to 85 °C (industrial grade)

■RoHS compliance

–Lead-free components are compliant with the RoHS directive

8

1

SO8 (M)

TSSOP8 3x3 (DS)(1)

1. Contact local ST sales office for availability.

Table 1.	Device summary
		Watchdog		Watchdog	Active-low			Active-high	Manual reset	Power-fail
		input		output(1)			(1)	RST(1)	input	comparator
						RST
STM705
STM706
STM707
STM708
STM813L

1. Push-pull output

August 2010

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www.st.com

Contents	STM705, STM706, STM707, STM708, STM813L

Contents

1	Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						. 5
2	Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						8
	2.1						8
		MR
	2.2	WDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.3						8
		WDO
	2.4						8
		RST
	2.5	RST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.6	PFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					8
	2.7						9
		PFO
3	Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						11
	3.1	Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					11
	3.2	Push-button reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					11
	3.3	Watchdog input (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . .					11
	3.4	Watchdog output (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . .					12
	3.5	Power-fail input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					12
	3.6	Ensuring a valid reset output down to VCC = 0 V . . . . . . . . . . . . . . . . . . .					12
	3.7	Interfacing to microprocessors with bidirectional reset pins . . . . . . . . . . .					13
4	Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						14
5	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						22
6	DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						23
7	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						27
8	Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						30
9	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .						31

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STM705, STM706, STM707, STM708, STM813L	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 5. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 6. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 7. SO8 - 8-lead plastic small outline, 150 mils body width, pack. mech. data . . . . . . . . . . . . 28 Table 8. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, mechanical data . . . . . . 29 Table 9. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 10. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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List of figures	STM705, STM706, STM707, STM708, STM813L

List of figures

Figure 1.	Logic diagram (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 5
Figure 2.	Logic diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 5
Figure 3.	STM705/706/813L SO8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
Figure 4.	STM705/706/813L TSSOP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
Figure 5.	STM707/708 SO8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
Figure 6.	STM707/708 TSSOP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
Figure 7.	Block diagram (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
Figure 8.	Block diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
Figure 9.	Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
Figure 10.	Reset output valid to ground circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 11.	Interfacing to microprocessors with bidirectional reset I/O . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 12.	Supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 13.	VPFI threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 14.	Reset comparator propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 15.	Power-up trec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 16.	Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 17.	Watchdog time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 18.	PFI to PFO propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 19.	Output voltage vs. load current (VCC = 5 V; TA = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 20.	RST output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 21.	RST output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 22.	RST response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 23.	RST response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 24.	Power-fail comparator response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 25.	Power-fail comparator response time (de-assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 26.	Maximum transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 27.	AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 28.	Power-fail comparator waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 29.	MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
Figure 30.	Watchdog timing (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
Figure 31.	SO8 – 8-lead plastic small outline, 150 mils body width, outline . . . . . . . . . . . . . . . . . . . .	28
Figure 32.	TSSOP8 – 8-lead, thin shrink small outline, 3 x 3 mm body size, outline . . . . . . . . . . . . .	29

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STM705, STM706, STM707, STM708, STM813L	Description

1 Description

The STM705/706/707/708/813L supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition

occurs, the reset output (RST) is forced low (or high in the case of RST).

These devices also offer a watchdog timer (except for STM707/708) as well as a power-fail comparator to provide the system with an early warning of impending power failure.

These devices are available in a standard 8-pin SOIC package or a space-saving 8-pin TSSOP package.

Figure 1. Logic diagram (STM705/706/813L)

	VCC
		WDO
WDI		RST(1)
	STM705/706;
MR
	STM813L	RST(2)
PFI		PFO
	VSS

AI08825

1.For STM705/706 only.

2.For STM813L only.

Figure 2. Logic diagram (STM707/708)

VCC

RST

MR

STM707/708 RST

PFI

PFO

VSS

AI08826

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Description										STM705, STM706, STM707, STM708, STM813L
	Table 2.	Signal names
					MR						Push-button reset input
				WDI							Watchdog input
											Watchdog output
			WDO
											Active-low reset output
				RST
		RST(1)									Active-high reset output
				VCC							Supply voltage
					PFI						Power-fail input
											Power-fail output
				PFO
				VSS							Ground
					NC						No connect

1. For STM813L only.

Figure 3. STM705/706/813L SO8 connections

SO8

MR			1	8		WDO
VCC							(RST)(1)
			2	7		RST
VSS			3	6		WDI
PFI			4	5		PFO

AI08827a

1. For STM813L, reset output is active-high.

Figure 4. STM705/706/813L TSSOP8 connections

TSSOP8

(RST)			(1)		1	8		WDI
	RST
	WDO				2	7		PFO
								PFI
		MR			3	6
	VCC				4	5		VSS

AI09114

1. For STM813L, reset output is active-high.

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STM705, STM706, STM707, STM708, STM813L									Description
	Figure 5. STM707/708 SO8 connections
				SO8
							RST
	MR			1	8
	VCC
				2	7		RST
	VSS			3	6		NC
	PFI			4	5		PFO
									AI08828a

Figure 6. STM707/708 TSSOP8 connections

TSSOP8

RST				1	8		NC
RST
				2	7		PFO
	MR			3	6		PFI
VCC				4	5	VSS

AI09115

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Pin descriptions	STM705, STM706, STM707, STM708, STM813L

2 Pin descriptions

2.1MR

A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low

and for trec after MR returns high. This active-low input has an internal pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if

unused.

2.2WDI

If WDI remains high or low for 1.6 s, the internal watchdog timer runs out and reset

(or WDO) is triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge.

The watchdog function can be disabled by allowing the WDI pin to float.

2.3WDO

	It goes low when a transition does not occur on WDI within 1.6 s, and remains low until
	a transition occurs on WDI (indicating the watchdog interrupt has been serviced).					WDO			also
	goes low when VCC falls below the reset threshold; however, unlike the reset output,						WDO
	goes high as soon as VCC exceeds the reset threshold. Output type is push-pull.
Note:	For those devices with a				output, a watchdog timeout will not trigger reset unless
				WDO				WDO
	is connected to	MR.

2.4 RST

Pulses low when triggered, and stays low whenever VCC is below the reset threshold or when MR is a logic low. It remains low for trec after either VCC rises above the reset threshold, or MR goes from low to high.

2.5	RST
	Goes high with triggered, and stays high whenever VCC is above the reset threshold or
	when		MR		is a logic high. It stays high for trec after either VCC falls below the reset threshold,
	or	MR		goes from high to low.

2.6 PFI

When PFI is less than VPFI, PFO goes low; otherwise, PFO remains high. Connect to ground if unused.

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STM705, STM706, STM707, STM708, STM813L	Pin descriptions

2.7PFO

When PFI is less than VPFI, PFO goes low; otherwise, PFO remains high. Leave open if unused. Output type is push-pull.

Table 3.	Pin description
		Pin
					Name								Function
STM813L		STM707		STM705
		STM708		STM706
1		1		1									Push-button reset input
								MR
6		—		6			WDI						Watchdog input
8		—		8									Watchdog output (push-pull)
						WDO
—		7		7									Active-low reset output
							RST
7		8		—			RST						Active-high reset output
2		2		2			VCC						Supply voltage
4		4		4				PFI					Power-fail input
5		5		5									Power-fail output (push-pull)
							PFO
3		3		3			VSS						Ground
—		6		—				NC					No connect

Figure 7. Block diagram (STM705/706/813L)

	WDI	WATCHDOG
WDI	transitional			WDO
		TIMER
	detector
VCC	VRST	COMPARE
	VCC
MR			trec	RST (RST)	(1)
			generator
PFI	VPFI	COMPARE		PFO
					AI08829

1. For STM813L only.

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Pin descriptions	STM705, STM706, STM707, STM708, STM813L
Figure 8. Block diagram (STM707/708)

VCC	COMPARE
VRST
		RST
VCC
MR	trec	RST
	generator
PFI	COMPARE
VPFI		PFO
		AI08830

Figure 9. Hardware hookup

			5 V
	Unregulated	Regulator
		VIN VCC	VCC
	voltage

STM705

STM706

0.1 mF STM707 STM708

STM813L

WDI(1)

(1)

WDO

To microprocessor IRQ

R1

From microprocessor

R2

PFI

PFO

To microprocessor NMI

RST

To microprocessor reset

MR

Push-button

AI08831a

1. For STM705/706/813L.

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