ST STM690, STM704, STM795, STM802, STM804 User Manual

Features

STM690, STM704, STM795

STM802, STM804, STM805, STM806

3 V supervisor with battery switchover

■ RST or RST outputs

■ NVRAM supervisor for external LPSRAM

■ Chip enable gating (STM795 only) for external

LPSRAM (7 ns max prop delay)

■ Manual (push-button) reset input

■ 200 ms (typ) t

■

Watchdog timer - 1.6 s (typ)

■ Automatic battery switchover

■ Low battery supply current - 0.4 µA (typ)

■ Power-fail comparator (PFI/PFO)

■ Low supply current - 40 µA (typ)

■ Guaranteed RST (RST) assertion

down to V

■ Operating temperature:

rec

= 1.0 V

CC

–40 °C to 85 °C (industrial grade)

■ RoHS compliance

– Lead-free components are compliant with

the RoHS directive

Table 1. Device summary

8

1

SO8 (M)

TSSOP8 3x3 (DS)

1. Contact local ST sales office for availability.

(1)

Manual

reset
input

Battery

switchover

Power-fail

comparator

Chip enable

gating

Watchdog

Input

Active- low

(1)

RST

Active- high

RST

(1)

STM690T/S/R ✓✓ ✓✓

STM704T/S/R ✓✓✓✓

STM795T/S/R ✓

(2)

✓✓

STM802T/S/R ✓✓ ✓✓

STM804T/S/R ✓✓

STM805T/S/R ✓✓

(2)

(2)

✓✓

✓✓

STM806T/S/R ✓✓✓✓

1. All RST outputs push-pull (unless otherwise noted).

2. Open drain output.

August 2010 Doc ID 10519 Rev 9 1/42

www.st.com

1

Contents STM690, STM704, STM795, STM802, STM804, STM805, STM806

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.1 MR (manual reset) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.2 WDI (watchdog input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.3 RST

1.1.4 RST (active-high reset - open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.5 PFI (power-fail input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.6 PFO

1.1.7 V

1.1.8 Vccsw

1.1.9 E

1.1.10 E

1.1.11 V

(active-low reset) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

(power-fail output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

(supply output voltage) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

OUT

(VCC switch output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

(chip enable input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

(conditional chip enable) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CON

(backup battery input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

BAT

2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.1 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.2 Push-button reset input (STM704/806) . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3 Watchdog input (NOT available on STM704/795/806) . . . . . . . . . . . . . . . 14

2.4 Backup battery switchover . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.5 Chip enable gating (STM795 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.6 Chip enable input (STM795 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.7 Chip enable output (STM795 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.8 Power-fail input/output (NOT available on STM795) . . . . . . . . . . . . . . . . 17

2.9 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.10 Using a SuperCap™ as a backup power source . . . . . . . . . . . . . . . . . . . 19

2.11 Negative-going V

transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC

3 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Contents

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Doc ID 10519 Rev 9 3/42

List of tables STM690, STM704, STM795, STM802, STM804, STM805, STM806

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 4. I/O status in battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 6. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 7. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 8. SO8 - 8-lead plastic small outline, 150 mils body width,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 9. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, mechanical data . . . . . . 38

Table 10. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Table 11. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 List of figures

List of figures

Figure 1. Logic diagram (STM690/802/804/805) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Logic diagram (STM704/806) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Logic diagram (STM795) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. STM690/802/804/805 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5. STM704/806 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 6. STM795 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 7. Block diagram (STM690/802/804/805) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8. Block diagram (STM704/806) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 9. Block diagram (STM795) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Chip enable gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 12. Chip enable waveform (STM795) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 13. Power-fail comparator waveform (STM690/704/802/804/805/806) . . . . . . . . . . . . . . . . . . 18

Figure 14. Using a SuperCap™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. V
Figure 16. V

Figure 17. Supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. Battery current vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. V

Figure 20. Reset comparator propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 21. Power-up t

Figure 22. Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 23. Watchdog time-out period vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 24. E
Figure 25. PFI to PFO
Figure 26. Output voltage vs. load current (V
Figure 27. Output voltage vs. load current (V
Figure 28. RST

Figure 29. RST output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 30. Power-fail comparator response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 31. Power-fail comparator response time (de-assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 32. Maximum transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 33. E
Figure 34. E

Figure 35. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 36. MR

Figure 37. Watchdog timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 38. SO8 – 8-lead plastic small outline, 150 mils body width,

Figure 39. TSSOP8 – 8-lead, thin shrink small outline, 3 x 3 mm body size, outline. . . . . . . . . . . . . . 38

to V

CC

to V

BAT

threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

PFI

to E

on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

OUT

on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

OUT

vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

rec

on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

CON

propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

= 5 V; V

CC

= 0 V; V

CC

= 2.8 V; TA = 25 °C) . . . . . . . . . . . . . . . 25

BAT

= 2.8 V; TA = 25 °C) . . . . . . . . . . . . . . . 26

BAT

output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

to E
to E

propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

CON

propagation delay test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

CON

timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

package mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Doc ID 10519 Rev 9 5/42

Description STM690, STM704, STM795, STM802, STM804, STM805, STM806

1 Description

The STM690/704/795/802/804/805/806 supervisors are self-contained devices which

provide microprocessor supervisory functions with the ability to non-volatize and write-

protect external LPSRAM. A precision voltage reference and comparator monitors the V

input for an out-of-tolerance condition. When an invalid V

output (RST

) is forced low (or high in the case of RST). These devices also offer a watchdog

condition occurs, the reset

CC

timer (except for STM704/795/806) as well as a power-fail comparator (except for STM795)

to provide the system with an early warning of impending power failure.

These devices are available in a standard 8-pin SOIC package or a space-saving 8-pin

TSSOP package.

Figure 1. Logic diagram (STM690/802/804/805)

VCCV

BAT

V

WDI

PFI

STM690/

802/804/

805

OUT

RST (RST)

PFO

(1)

CC

V

SS

1. For STM804/805, reset output is active-high and open drain.

Figure 2. Logic diagram (STM704/806)

VCCV

BAT

MR

PFI

STM704
STM806

V

SS

V

OUT

RST

PFO

AI08846

AI08847

6/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description

Figure 3. Logic diagram (STM795)

VCCV

BAT

V

OUT

RST

E

CON

AI08848

Table 2. Signal names

MR Push-button reset input

WDI Watchdog input

RST Active-low reset output

(1)

RST

(2)

Chip enable input

E

(2)

E

CON

(2)

Vccsw

V

OUT

V

CC

V

BAT

Active-high reset output

Conditioned chip enable output

VCC switch output

Supply voltage output

Supply voltage

Backup supply voltage

PFI Power-fail input

V

CCSW

E

STM795

V

SS

PFO Power-fail output

Ground

V

SS

1. Open drain for STM804/805 only.

2. STM795.

Doc ID 10519 Rev 9 7/42

Description STM690, STM704, STM795, STM802, STM804, STM805, STM806

Figure 4. STM690/802/804/805 connections

SO8/TSSOP8

V

OUT

V
V

CC
SS

PFI

1
2
3
4

1. For STM804/805, reset output is active-high and open drain.

8
7
6
5

V

BAT

RST (RST)
WDI
PFO

(1)

AI08849

Figure 5. STM704/806 connections

SO8/TSSOP8

V

OUT
V

V

PFI

CC

SS

1
2
3
4

V

BAT

8

RST

7

MR

6

PFO

5

AI08850

Figure 6. STM795 connections

V

V

CCSW

SO8/TSSOP8

OUT
V

CC

V

SS

1
2
3
4

RST

7

E

6

CON

E

5

AI08851

V

BAT

8

8/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description

1.1 Pin descriptions

1.1.1 MR (manual reset)

A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low

and for t

driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if

unused.

1.1.2 WDI (watchdog input)

If WDI remains high or low for 1.6 s, the internal watchdog timer runs out and reset is

triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a

rising or falling edge.

The watchdog function cannot be disabled by allowing the WDI pin to float.

1.1.3 RST (active-low reset)

after MR returns high. This active-low input has an internal pull-up. It can be

rec

Pulses low for t

or when MR

when triggered, and stays low whenever VCC is below the reset threshold

rec

is a logic low. It remains low for t

threshold, the watchdog triggers a reset, or MR

1.1.4 RST (active-high reset - open drain)

Pulses high for t

threshold or when MR

reset threshold, the watchdog triggers a reset, or MR

when triggered, and stays high whenever VCC is above the reset

rec

is a logic high. It remains high for t

1.1.5 PFI (power-fail input)

When PFI is less than V

PFO

remains high. Connect to ground if unused.

or when VCC falls below VSW (2.4 V), PFO goes low; otherwise,

PFI

1.1.6 PFO (power-fail output)

1.1.7 V

When PFI is less than V

high. Leave open if unused. Output type is push-pull.

(supply output voltage)

OUT

When VCC is above the switchover voltage (VSO), V

a P-channel MOSFET switch. When V

to V

if no battery is used.

CC

, or VCC falls below VSW, PFO goes low; otherwise, PFO remains

PFI

falls below VSO, V

CC

after either VCC rises above the reset

rec

goes from low to high.

after either VCC falls below the

rec

goes from high to low.

is connected to VCC through

OUT

connects to V

BAT

OUT

. Connect

1.1.8 Vccsw (VCC switch output)

When V

low. It can be used to drive gate of external PMOS transistor for I

exceeding 75 mA. Output type is push-pull.

switches to battery, Vccsw is high. When V

OUT

Doc ID 10519 Rev 9 9/42

switches back to VCC, Vccsw is

OUT

requirements

OUT

Description STM690, STM704, STM795, STM802, STM804, STM805, STM806

1.1.9 E (chip enable input)

The input to the chip enable gating circuit. Connect to ground if unused.

1.1.10 E

1.1.11 V

(conditional chip enable)

CON

E

goes low only when E is low and reset is not asserted. If E

CON

asserted, E

disabled mode, E

(backup battery input)

BAT

When VCC falls below VSO, V

hysteresis, V

will remain low for 15 µs or until E goes high, whichever occurs first. In the

CON

OUT

is pulled up to V

CON

switches from VCC to V

OUT

reconnects to VCC. V

.

OUT

may exceed VCC. Connect to VCC if no battery is

BAT

is low when reset is

CON

. When VCC rises above VSO +

BAT

used.

Table 3. Pin description

STM795

— — 6 — MR Push-button reset input

— 6 — 6 WDI Watchdog input

7 7 7 — RST

— — — 7 RST Active-high reset output

— 4 4 4 PFI Power-fail input

— 5 5 5 PFO

1 1 1 1 V

2 2 2 2 V

3 — — — Vccsw

4 3 3 3 V

5 — — — E

6 — — — E

8 8 8 8 V

STM690
STM802

Pin

STM704
STM806

STM804
STM805

Name Function

Active-low reset output

Power-fail output (push-pull)

OUT

Supply voltage

CC

SS

CON

BAT

Supply output for external LPSRAM

VCC switch output (push-pull)

Ground

Chip enable input

Conditioned chip enable output

Backup battery input

10/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description

Figure 7. Block diagram (STM690/802/804/805)

V

CC

V

BAT

COMPARE

COMPARE

WATCHDOG

TIMER

COMPARE

WDI

PFI

V

V

V

SO

RST

PFI

1. For STM804/805, reset output is active-high and open drain.

Figure 8. Block diagram (STM704/806)

V

CC

t

rec

generator

V

OUT

RST (RST)

PFO

V

OUT

(1)

AI07897

MR

PFI

V

BAT

V

V

V

SO

RST

PFI

COMPARE

COMPARE

COMPARE

t

rec

generator

RST

PFO

AI07898

Doc ID 10519 Rev 9 11/42

Description STM690, STM704, STM795, STM802, STM804, STM805, STM806

Figure 9. Block diagram (STM795)

V

CC

PFI

V

OUT

V

BAT

V

CCSW

RST

E

CON

PFO

AI08852

V

PFI

COMPARE

COMPARE

COMPARE

E

CON

CONTROL

OUTPUT

t

rec

generator

V

SO

V

RST

E

12/42 Doc ID 10519 Rev 9

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description

Figure 10. Hardware hookup

(2)

Unregulated

voltage

R1

R2

Regulator

V

V

CC

IN

0.1 F

From microprocessor

Push-button

V

CCSW

V

CC

STM690/704/
795/802/804/

805/806

(1)

WDI

(2)

E

PFI

MR

(3)

(4)

E

CON

PFO

V

RST

OUT

(2)

(3)

V

CC

V

CC

LPSRAM

E

0.1 F

To microprocessor NMI

To microprocessor reset

E

1. For STM690/802/804/805.

2. For STM795 only.

3. Not available on STM795.

4. For STM704/806.

V

BAT

AI08853

Doc ID 10519 Rev 9 13/42