Smart Reset™ with capacitor-adjustable setup delay
Features
■ Dual Smart Reset™ push-button inputs with
capacitor-adjustable extended reset setup
delay (t
■ No power-on reset
■ Dual RST output, active-low, open-drain
■ Fixed Smart Reset™ input logic voltage levels
■ Broad operating voltage range 1.65 V to 5.5 V,
inactive reset output levels valid down to 1.0 V
■ Low supply current (1.5 µA)
■ Operating temperature:
industrial grade –40 °C to +85 °C
■ TDFN8 package: 2 mm x 2 mm x 0.75 mm
■ RoHS compliant
SRC
)
STM6522
Dual push-button
TDFN8 (DG)
2 mm x 2 mm
Applications
■ Mobile phones, smartphones
■ e-books
■ MP3 players
■ Games
■ Portable navigation devices
■ Any application that requires delayed reset
push-button(s) response for improved system
stability
January 2012 Doc ID 17045 Rev 3 1/25
www.st.com
1
Contents STM6522
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Power supply (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Ground (V
2.3 Primary Smart Reset™ input (SR0
2.4 Secondary Smart Reset™ input (SR1
2.5 Adjustable delay of Smart Reset™ (SRC pin) . . . . . . . . . . . . . . . . . . . . . 10
2.6 Reset output (RST1
2.7 Reset output (RST2
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Package footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8 Tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10 Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25 Doc ID 17045 Rev 3
STM6522 List of tables
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. t
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 17
Table 7. Parameters for landing pattern - TDFN – 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . 18
Table 8. Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 11. Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
programmed by an ideal external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SRC
Doc ID 17045 Rev 3 3/25
List of figures STM6522
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Single-button Smart Reset™ typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Dual-button Smart Reset™ typical hookup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 7. STM6522 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Supply current (I
Figure 9. Smart Reset delay (t
Figure 10. Reset timeout period (t
Figure 11. Smart Reset™ input voltage threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline. . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Package marking, top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
) vs. temperature, C
SRC
) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
REC
= 0.6 µF. . . . . . . . . . . . . . . . . . . . . . . . . 11
SRC
4/25 Doc ID 17045 Rev 3
STM6522 Description
1 Description
The Smart Reset™ devices provide a useful feature that ensures that inadvertent short
reset push-button closures do not cause system resets as the extended Smart Reset™
delay setup periods are implemented. Once the valid Smart Reset™ input levels and setup
delay are met, the device generates an output reset pulse for a fixed timeout period (t
The typical application hookup shows that either a single Smart Reset™ input, or both reset
inputs can be connected to the applications interrupt and control both the interrupt pin and
the hard reset functions. If the push-button is closed for a short time, the processor is only
interrupted. If the system still does not respond properly, holding the push-button(s) for the
extended setup time (t
) causes a hard reset of the processor. The Smart Reset™
SRC
feature helps significantly increase system stability and eliminates the need for a dedicated
reset button.
The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset
circuits targeted at applications such as MP3 players, portable navigation or mobile phones,
generally any application that requires delayed reset push-button(s) response for improved
system stability. The devices in the STM65xx Smart Reset™ family include various
combinations of useful features for the targeted applications.
REC
).
The STM6522 has two combined Smart Reset™ inputs (SR0
setup time (t
) programmed by an external capacitor on the SRC pin.
SRC
Figure 1. Logic diagram
V
CC
SR0
RST1
RST2
SR1
SRC
STM6522
V
SS
and SR1) with delayed reset
AM04867v2
Doc ID 17045 Rev 3 5/25
Description STM6522
Table 1. Signal names
Symbol
RST1
RST2
SR0
Input/
output
Description
Output Open-drain reset output, active-low, no internal pull-up resistor.
Output Open-drain reset output, active-low, no internal pull-up resistor.
Input
Primary push-button Smart Reset™ input, active-low, fixed voltage input logic
levels, no internal pull-up.
Secondary push-button Smart Reset™ input - combines with the primary push-
SR1
Input
button reset to provide setup delay time, active-low, fixed voltage input logic
levels, no internal pull-up.
SRC Input
V
V
Supply
CC
Supply Supply ground.
SS
Smart Reset™ input delay setup control: connect to an external capacitor to
adjust the delay setup time (t
SRC
).
Supply voltage input. Power supply for the device. A 0.1 µF decoupling ceramic
capacitor is recommended to be connected between V
NC No connect (not bonded); should be connected to V
Figure 2. Pin connections
V
SS
SR1
RST1
1
2
STM6522
3
4
8
V
CC
SR0
7
NC
6
5
SRC
RST2
and VSS pins.
CC
.
SS
AM04868v2
Figure 3. Block diagram
SR1
generator
SR0
SRC
6/25 Doc ID 17045 Rev 3
t
SRC
t
REC
generator
RST1
RST2
AM04869v2
STM6522 Description
Figure 4. Single-button Smart Reset™ typical hookup
V
CC
V
CC
RST1
SRC
C
SRC
STM6522
SR1
SR0
V
SS
Figure 5. Dual-button Smart Reset™ typical hookup
V
CC
V
RESET
CC
MCU
INT/
NMI
V
SS
PUSH-BUTTON
SWITCH
AM04870v2
V
CC
STM6522
V
SS
RST1
SRC
SR1
SR0
C
SRC
PUSH-BUTTON
SWITCH
RESET
INT/
NMI
PUSH-BUTTON
SWITCH
V
CC
MCU
V
SS
AM004871v2
Doc ID 17045 Rev 3 7/25
Description STM6522
Figure 6. Timing waveforms
V
CC
SR0
SR1
RST1,
RST2
1.65 V
Glitch
immunity
t
SRC
t
REC
1.65 V
AM04872v2
8/25 Doc ID 17045 Rev 3
STM6522 Pin descriptions
2 Pin descriptions
2.1 Power supply (VCC)
This pin is used to provide the power to the device. A 0.1 µF decoupling ceramic capacitor is
recommended to be connected between V
2.2 Ground (VSS)
This is the supply ground for the device.
2.3 Primary Smart Reset™ input (SR0)
The primary push-button Smart Reset™ input, active-low pin is connected to the pushbutton switch. The input logic voltage levels are set to a fixed voltage level and have no
internal pull-up resistor.
2.4 Secondary Smart Reset™ input (SR1)
and VSS pins.
CC
The secondary push-button Smart Reset™ input, active-low pin is connected to the second
push-button switch. The input logic voltage levels are set to a fixed voltage level and have no
internal pull-up resistor. Keeping both Smart Reset™ inputs SR0
than t
activates the reset output pulse.
SRC
and SR1 active for longer
Figure 7. STM6522 timing
t
SRC
SR0
SR1
RST1,
RST2
Reset is asserted “low” right after the Smart Reset™ setup delay (t
returns to high after the t
REC
period.
t
REC
) has been met and
SRC
AM04873v2
Doc ID 17045 Rev 3 9/25
Pin descriptions STM6522
2.5 Adjustable delay of Smart Reset™ (SRC pin)
This pin controls the setup time before the push-button action is validated by the reset
output. It is connected to an external capacitor (C
desired value of setup time (t
Selected calculated t
Table 2. t
Calculated C
value [µF]
0.2 2 2.5 3.0 0.22
0.3 3 3.75 4.5 0.33
0.6 6 7.5 9 0.56
1 10 12.5 15 1
1. At 25 ° C. Example calculations based on an ideal capacitor. During application design and component
selection it should be considered that the current flowing into the external t
(C
) is on the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) should be
SRC
used and placed as close as possible to the SRC pin. Also an adequate low-leakage PCB environment
should be ensured to prevent t
is 0.1 µF.
2. In case of quickly repeated activations of t
activations to fully discharge C
programmed by an ideal external capacitor
SRC
SRC
and C
SRC
Min. Typ. Max.
).
SRC
examples are given in Ta bl e 2 . Refer also to Table 5.
SRC
Setup delay t
accuracy from being affected. A recommended minimum value of C
SRC
counter, an interval of 10 ms min. is needed between the
SRC
, so that the next t
SRC
SRC
), which is tied to ground to provide the
SRC
(1)(2)
[s]
SRC
is as specified.
programming capacitor
SRC
Closest common
C
SRC
value [µF]
SRC
2.6 Reset output (RST1)
This output is active-low, open-drain with no internal pull-up resistor.
2.7 Reset output (RST2)
This output is active-low, open-drain with no internal pull-up resistor.
10/25 Doc ID 17045 Rev 3
STM6522 Typical operating characteristics
3 Typical operating characteristics
Figure 8. Supply current (ICC) vs. temperature
3
2.5
2
[µA]
CC
I
–60 –40 –20 0 20 40 60 80 100 120 140
1.5
1
0.5
0
Figure 9. Smart Reset™ delay (t
9
8.5
8
[s]
SRC
t
–60 –40 –20
7.5
7
6.5
6
0 20 40 60 80 100 120 140
Temperature [˚C]
5.5 V 3.3 V 2 V
) vs. temperature, C
SRC
SRC
AM07328
= 0.6 µF
Temperature [˚C]
5.5 V 3. 3 V 2 V
AM07329
Doc ID 17045 Rev 3 11/25
Typical operating characteristics STM6522
Figure 10. Reset timeout period (t
280
260
240
[ms]
REC
t
–60 –40 –20
220
200
180
160
140
0 20 40 60 80 100 120 140
) vs. temperature
REC
Temperature [˚C]
5.5 V 3. 3 V 2 V
AM07330
Figure 11. Smart Reset™ input voltage threshold vs. temperature
0.8
0.7
[V]
0.6
ITH(SR )
V
–60 –40 –20
0.5
0.4
0.3
0 20 40 60 80 100 120 140
Temperature [˚C]
5.5 V 3. 3 V 2 V
AM07331
12/25 Doc ID 17045 Rev 3
STM6522 Maximum ratings
4 Maximum ratings
Stressing the device above the ratings listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in Table 4: Operating and
measurement conditions of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability. Refer also to the
STMicroelectronics™ SURE program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
T
STG
T
SLD
θ
JA
V
V
CC
1. Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.
Storage temperature (VCC off) –55 to +150 °C
(1)
Lead solder temperature for 10 seconds 260 °C
Thermal resistance (junction to ambient) TDFN8 149.0 °C/W
Input or output voltage –0.3 to 5.5 V
IO
Supply voltage –0.3 to 7 V
Doc ID 17045 Rev 3 13/25
DC and AC parameters STM6522
5 DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in Table 5: DC and AC characteristics that
follows, are derived from tests performed under the measurement conditions summarized in
Table 4: Operating and measurement conditions. Designers should check that the operating
conditions in their circuit match the operating conditions when relying on the quoted
parameters.
Table 4. Operating and measurement conditions
Parameter Value Unit
supply voltage 1.65 to 5.5 V
V
CC
Ambient operating temperature (T
Input rise and fall times ≤
) –40 to +85 °C
A
5ns
Input pulse voltages 0.2 to 0.8 V
Input and output timing ref. voltages 0.3 to 0.7 V
Figure 12. AC testing input/output waveforms
0.8 V
0.2 V
CC
CC
0.7 V
0.3 V
CC
CC
CC
CC
V
V
AM00478
14/25 Doc ID 17045 Rev 3
STM6522 DC and AC parameters
Table 5. DC and AC characteristics
Symbol Parameter Test conditions
V
I
V
t
REC
Supply voltage range 1.65 5.5 V
CC
Supply current (inputs in
their inactive state, neither
CC
t
nor t
REC
Reset output voltage low
OL
(active-low reset asserted)
SRC
in progress)
V
= 5.0 V 2 3 µA
CC
V
= 3.0 V 1.5 µA
CC
V
≥ 4.5 V, sinking 3.2 mA 0.3 V
CC
V
≥ 3.3 V, sinking 2.5 mA 0.3 V
CC
V
≥ 1.65 V, sinking 1 mA 0.3 V
CC
Reset timeout delay, factory
programmed
Smart Reset™ inputs
V
V
I
LI(SR)
SR0, SR1 input voltage low V
IL
SR0, SR1 input voltage high 0.85 5.5 V
IH
Input leakage current,
SRx
input
Smart Reset™ delay
Delayed Smart Reset™
t
SRC
(3)
setup time. Refer to Table 2.
T
= 25 °C
A
(1)
Min. Typ.
(2)
Max. Unit
140 210 280 ms
– 0.3 0.3 V
SS
–1 +1 µA
10 x C
(µF)
SRC
12.5 x C
(µF)
SRC
15 x C
SRC
(µF)
s
1. Valid for ambient operating temperature: TA = –40 to +85 °C; VCC = 1.65 to 5.5 V (except where noted).
2. Typical value is at 25 °C and V
3. Input glitch immunity is equal to t
= 3.3 V unless otherwise noted.
CC
(when both SR inputs are low, otherwise infinite).
SRC
Doc ID 17045 Rev 3 15/25
Package mechanical data STM6522
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
16/25 Doc ID 17045 Rev 3
STM6522 Package mechanical data
Figure 13. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline
PIN 1 INDEX AREA
0.10 C
0.10
C
A
0.08 C
PIN 1 INDEX AREA
Pin#1 I D
D
2x
0.10 C
2x
TOP VIEW
SIDE VIEW
e
1
A
B
E
C
A1
SEATING
PLANE
b
4
0.10 C A B
L
8
BOTTOM VIEW
5
8070540_A
Table 6. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data
Dimension (mm) Dimension (inches)
Symbol
Min. Nom. Max. Min. Nom. Max.
A 0.70 0.75 0.80 0.028 0.030 0.031
A1 0.00 0.02 0.05 0.000 0.001 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
D
BSC
E
BSC
e 0.50 0.020
L 0.45 0.55 0.65 0.018 0.022 0.026
1.9 2.00 2.1 0.075 0.079 0.083
1.9 2.00 2.1 0.075 0.079 0.083
Doc ID 17045 Rev 3 17/25
Package footprint STM6522
7 Package footprint
Figure 14. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad
D
P
E1E
L
b
Table 7. Parameters for landing pattern - TDFN – 8-lead 2 x 2 mm package
Dimension (mm)
Parameter Description
Min. Nom. Max.
L Contact length 1.05
b Contact width 0.25
E Max. land pattern Y-direction
— 2.85 —
— 1.15
— 0.30
E1 Contact gap spacing — 0.65 —
D Max. land pattern X-direction — 1.75 —
P Contact pitch — 0.5 —
AM00441
18/25 Doc ID 17045 Rev 3
STM6522 Tape and reel information
8 Tape and reel information
Figure 15. Carrier tape
P
0
D
T
Top cover
tape
K
0
Center lines
of cavity
Table 8. Carrier tape dimensions
Package W D E P
1.50
+0.10/
–0.00
1.75
±0.10
TDFN8
8.00
+0.30
–0.10
0
4.00
±0.10
P
2
User direction of feed
P
2.00
±0.10
FA0B
2
3.50
±0.05
B
2.30
±0.05
E
A
0
0
P
1
K
0
2.30
±0.05
1.00
±0.05
F
W
AM03073v2
P
0
4.00
±0.10
1
0.250
±0.05
TUnit
Bulk
qty.
mm 3000
Doc ID 17045 Rev 3 19/25
Tape and reel information STM6522
Figure 16. Reel dimensions
T
40 mm min.
acces hole
at slot location
B
D
A
Full radius
C
N
Tape slot
in core for
tape start
25 mm min width
G measured
at hub
AM00443
Table 9. Reel dimensions
Tape sizes A max. B min. C D min. N min. G T max.
8 mm 180 (7 inches) 1.50 13.0 +/– 0.20 20.20 60 8.4 +2/–0 14.40
20/25 Doc ID 17045 Rev 3
STM6522 Tape and reel information
Figure 17. Tape trailer/leader
End
To p
cover
tape
No components No componentsComponents
TRAILER
160 mm min.
Figure 18. Pin 1 orientation
Sealed with cover tape
User direction of feed
10 0 mm min.
LEADE
400 mm min.
Start
R
AM00444
Note: 1 Drawings are not to scale.
2 All dimensions are in mm, unless otherwise noted.
User direction of feed
AM00442
Doc ID 17045 Rev 3 21/25
Part numbering STM6522
9 Part numbering
Table 10. Ordering information scheme
Example: STM6522 A A A A DG 6 F
Device type
STM6522
V
monitoring, power-on reset
CC
A = no V
Smart Reset™ setup delay (t
pull-up on all Smart Reset™ inputs (SRx
monitoring, no power-on reset
CC
SRC
); presence of internal input
)
A = user-programmed (external capacitor); no input pull-up
Output type
A = both RST1
Reset timeout period (t
and RST2 open-drain, no pull-up, active-low
)
REC
A = 140 ms min.
Package
DG = TDFN8 2 x 2 x 0.75 mm, 0.5 mm pitch
Temperature range
6 = –40 °C to +85 °C
Shipping method
F = ECOPACK
®
package, tape and reel
For device options currently available refer to Ta bl e 11 . For other options, or for more information on any
aspect of this device, please contact the ST sales office nearest you.
22/25 Doc ID 17045 Rev 3
STM6522 Package marking
10 Package marking
Table 11. Package marking
Smart
Part number
t
SRC
delay
control
Reset™
inputs
(1)
monitoring
Power-on
reset, V
CC
RST1
output
(1)
RST2
output
(1)
t
REC
option
Topmark
STM6522AAAADG6F C
1. AL = active-low, AH = active-high, PU = with internal pull-up resistor, OD = open-drain.
SRC
AL — AL, OD AL, OD A CAL, AAL
Figure 19. Package marking, top view
A
BC
E
D
Topmark
A = dot (pin 1 reference)
B = assembly plant (P)
C = assembly year (Y, 0-9): 9 = 2009 etc.
D = assembly work week (WW, 01 to 52): 20 = WW20 etc.
E = marking area (topmark)
AM00479
Doc ID 17045 Rev 3 23/25
Revision history STM6522
11 Revision history
Table 12. Document revision history
Date Revision Changes
03-Feb-2010 1 Initial release.
Updated title, Features, Applications, Section 1, Figure 1, Table 1 ,
10-May-2010 2
09-Jan-2012 3
Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Section 2.4,
Figure 7, note 1 below Ta bl e 2 , Section 2.6, added Section 2.7,
Section 3, Ta bl e 5 , Ta b l e 6 , Tabl e 7 , Ta b l e 1 0 , Section 8, Table 11.
Updated Ta bl e 3 , Ta b l e 5 , Ta ble 1 1 and Disclaimer, minor text
corrections throughout document.
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STM6522
y
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