ST STM6502, STM6503, STM6504, STM6505 User Manual

STM6502, STM6503

STM6504, STM6505

Dual push-button Smart ResetTM with user-adjustable setup delays

Features

■Dual Smart Reset push-button inputs with extended reset setup delay

■Adjustable Smart Reset setup delay (tSRC): by external capacitor or three-state logic (product options): tSRC = 2, 6, 10 s (min.)

■Power-on reset

■Single RST output, active-low, open-drain

■Factory-programmable thresholds to monitor VCC in the range of 1.575 to 4.625 V typ.

■Operating voltage 1.0 V (active-low output valid) to 5.5 V

■Low supply current

■Operating temperature: industrial grade –40 °C to +85 °C

■TDFN8 package: 2 mm x 2 mm x 0.75 mm

■RoHS compliant

Table 1. Device summary

TDFN8 (DG) 2 mm x 2 mm

Applications

■Mobile phones, smartphones

■e-books

■MP3 players

■Games

■Portable navigation devices

■Any application that requires delayed reset push-button(s) response for improved system stability

Voltage inputs

Smart Reset inputs

tSRC

Reset or Power

programming

Good outputs

Part

SRE

Three-

Package

number

Ext.

state

VCC

VBAT

SR0

SR1

immediate,

RST

BLD

SRC pin

input

independent

TSR

STM6502(1)

TDFN-8L

STM6503

TDFN-8L

STM6504(1)

TDFN-8L

STM6505

TDFN-8L

1. Contact local ST sales office for availability.

February 2011

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www.st.com

Contents	STM6502, STM6503, STM6504, STM6505

Contents

1	Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
	1.1	Smart Reset devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
	1.2	Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10

1.2.1 Power supply (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.2 Ground (VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.3 Primary Smart Reset input (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.4 Secondary Smart Reset input (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.5 Edge-triggered Smart Reset input (SRE pin) – STM6504 only . . . . . . . 11

1.2.6Adjustable delay of Smart Reset input (SRC pin) – STM6502

and STM6505 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.7Programmable Smart Reset input delay (TSR pin) – STM6503

and STM6504 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.2.8 Reset output (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.2.9 Battery monitoring input (VBAT) – STM6505 only . . . . . . . . . . . . . . . . . 12 1.2.10 Battery low detect output (BLD) – STM6505 only . . . . . . . . . . . . . . . . . 12

2	Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
3	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
4	DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
5	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
6	Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
7	Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
8	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28

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STM6502, STM6503, STM6504, STM6505	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. tSRC programmed by an ideal external capacitor – STM6502 and STM6505 . . . . . . . . . . 11 Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 5. Operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 6. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 7. VCC voltage thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 8. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 21

Table 9. Parameter for landing pattern - TDFN – 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . . 22 Table 10. Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 11. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 12. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 13. Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 14. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

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STM6502, STM6503, STM6504, STM6505	List of figures

List of figures

Figure 1. Logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Block diagram - STM6502, STM6503, STM6504 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Block diagram - STM6505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. Single-button Smart Reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6. Dual-button Smart Reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 7. STM6502, STM6503 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 8. STM6504 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9. STM6505 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10. Supply current (ICC) vs. temperature (STM6505) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 11. Smart Reset delay (tSRC) vs. temperature, CSRC = 0.62 µF (STM6505) . . . . . . . . . . . . . . 13 Figure 12. Reset threshold (VRST) vs. temperature, “S” threshold option, VCC falling (STM6505) . . . 14

Figure 13. VBAT monitoring threshold (VBATTH) vs. temperature, falling (STM6505) . . . . . . . . . . . . . . 14 Figure 14. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 15. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 21 Figure 16. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 22 Figure 17. Carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 18. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 19. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 20. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 21. Package marking, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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STM6502, STM6503, STM6504, STM6505	Description

1 Description

STM6502 has two combined Smart Reset inputs (SR0 and SR1) with delayed Smart Reset setup time (tSRC) programmed by an external capacitor on the SRC pin.

STM6503 is similar to STM6502, has two combined delayed Smart Reset inputs (SR0, SR1) and three user-selectable delayed Smart Reset setup time (tSRC) options of 2 s, 6 s and 10 s through a three-state TSR input pin: when connected to ground, tSRC = 2 s; when left open, tSRC = 6 s; when connected to VCC, tSRC = 10 s (all the times are minimum).

STM6504 has two independent Smart Reset inputs. SR0 provides the delayed Smart Reset setup time (tSRC) function with three user-selectable tSRC options through a three-state TSR input pin: when connected to ground, tSRC = 2 s; when left open, tSRC = 6 s; when connected to VCC, tSRC = 10 s (all the times are minimum). SRE provides instant reset. SRE

is edge-triggered with a special debounce time (tDEBOUNCE = 240 ms min.) at the falling edge after a valid reset period.

STM6505 has two combined delayed Smart Reset inputs (SR0, SR1) and provides an adjustable reset delay setup time via an external capacitor connected to the SRC pin. The RST output depends also on the VCC monitoring threshold. STM6505 also provides

independent low battery detect (BLD) output controlled by the secondary external input voltage VBAT. VBAT is monitored for low voltage and provides an indication on the battery low

detect output pin (BLD). VBAT threshold is 1.25 V, fixed, and an external resistor divider is to be used to set the actual battery voltage threshold. VBAT threshold hysteresis is 8 mV typ. (16 mV max.). VBAT is voltage monitoring input only, the device is powered only from the VCC pin; VCC must be ≥ 1.575 V for proper operation of the VBAT comparator.

1.1Smart Reset devices

The Smart Reset device family STM65xx provides a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset input delay (tSRC). Once the valid Smart Reset input levels and setup delay are met, the device generates an output reset pulse with user-programmable timeout period (tREC).

The Smart Reset inputs can be also connected to the applications interrupt to allow the control of both the interrupt pin and the hard reset functions. If the push-buttons are closed for a short time, the processor is only interrupted. If the system still does not respond properly, holding the push-buttons for the extended setup time (tSRC) causes hard reset of the processor through the reset outputs. The Smart Reset feature helps significantly increase system stability.

The STM65xx family of Smart Reset devices consists of low current microprocessor reset circuits targeted at applications such as MP3 players, navigation, smartphones or mobile phones; generally any application that requires delayed reset push-button(s) response for improved system stability. The STM65xx devices feature single or dual Smart Reset inputs (SR). The delayed Smart Reset setup time (tSRC) options of 2 s, 6 s and 10 s (all min.) are adjustable by an external capacitor on the SRC pin or selectable by three-state logic. The delayed setup period ignores switch closures shorter than tSRC, thus preventing unwanted resets.

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Description	STM6502, STM6503, STM6504, STM6505

The STM65xx devices have active-low (optionally active-high) open-drain reset (RST) output(s) with or without internal pull-up resistor or push-pull as output options, with factoryprogrammed or capacitor-adjustable or push-buttons defined output reset pulse duration, with or without power-on reset function.

Some devices also have an undervoltage monitoring feature: the reset output is also asserted when the monitored supply voltage VCC drops below the specified threshold. The reset output remains asserted for the reset timeout period (tREC) after the monitored supply voltage goes above the specified threshold.

Figure 1.

Logic diagrams

VCC

VCC

SR0

STM6502

SR0

STM6503

SR1

RST

SR1

RST

SRC

TSR

V

VSS

SS

VCC

VCC

SR0

SR0

RST

SRE

STM6504

SR1

STM6505

RST

SRC

TSR

BLD

VBAT

V

V

SS

SS

AM00378

Figure 2.

Pin connections

RST

1

8

VCC

RST

1

8

VCC

7

VSS

2

STM

7

SR0

VSS

2

STM

SR0

6502

6503

6

TSR

SR1

3

6

SRC

SR1

3

NC

4

5

NC

NC

4

5

NC

RST

1

8

VCC

RST

1

8

VCC

7

7

VSS

2

STM

SR0

VSS

2

STM

SR0

6504

6

6505

6

SRE

3

TSR

SR1

3

SRC

NC

4

5

NC

BLD

4

5

VBAT

AM00379

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STM6502, STM6503, STM6504, STM6505							Description
	Table 2.				Signal names
	Symbol				Input/	Description
					output
					Output	Open-drain reset output, active-low.
		RST
					Output	Battery low detect output, active-low, open-drain. STM6505 only.
		BLD
						Primary push-button Smart Reset input. Active-low, with or without internal
		SR0			Input
						65 kΩ pull-up to VCC (product options).
						Secondary push-button Smart Reset input - combines with the primary push-
		SR1			Input	button reset to provide setup delay time before reset. Active-low, with or without
						internal 65 kΩ pull-up to VCC (product options).
						Secondary push-button Smart Reset input - provides instant Smart Reset. SRE
	SRE				Input	is edge-triggered with a special debounce time (tDEBOUNCE = 240 ms min.) at
						the falling edge after a valid reset period. Active-high, no internal pull-up to VCC.
						STM6504 only.
	SRC				Input	Smart Reset input delay setup control: connect to an external capacitor to adjust
						the delay setup time (tSRC). STM6502 and STM6505 only.
						A three-state Smart Reset input delay setup control. When connected to
						ground, tSRC = 2 s; when left open, tSRC = 6 s; when connected to VCC,
		TSR			Input	tSRC = 10 s (all times are minimum). TSR is a DC-type input, intended to be
						either permanently grounded, permanently connected to VCC or permanently
						left open. If left open, for improved system glitch immunity it is strongly
						recommended to connect a 0.1 µF decoupling ceramic capacitor between the
						TSR and VSS pins. STM6503 and STM6504 only.
						Supply voltage input. Power supply for the device and an input for the monitored
		VCC			Supply	supply voltage. A 0.1 µF decoupling ceramic capacitor is recommended to be
						connected between the VCC and VSS pins.
	VBAT				Input	Battery voltage monitoring input. STM6505 only.
		VSS			Supply	Ground
		NC				No connect (not bonded); should be connected to VSS.

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Description	STM6502, STM6503, STM6504, STM6505

Figure 3. Block diagram - STM6502, STM6503, STM6504

VCC

VRST COMPARE

SR1

(SRE		Logic

STM6504

only)(1) tREC RST generator

SR0 Logic

SRC (STM6502)

TSR (STM6503,

STM6504)

AM00352a

1.STM6504 only: SR0 and SRE are working independently. SRE is edge-triggered and has a special debounce time (tDEBOUNCE = 240 ms min.) at the falling edge after a valid reset period.

Figure 4. Block diagram - STM6505

6"!4
6"!44(		#/-0!2%	",$
6##
6234		#/-0!2%
6##				T2%#
									234
				GENERATOR

32

,OGIC

32

32#

!-B

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STM6502, STM6503, STM6504, STM6505	Description
Figure 5. Single-button Smart Reset typical hookup

	6##
	6##	6##
	234	2%3%4
	432
	34-	-#5
	32
	32	).4
		.-)
	633
		633
		053( "544/.
		37)4#(
		!-B

Figure 6. Dual-button Smart Reset typical hookup

6##
6##	6##
234	2%3%4
432
34-	-#5
32
32	).4
	.-)
633	633
053( "544/. 053( "544/.
37)4#(	37)4#(
	!-6

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