STM6502 has two combined Smart Reset inputs (SR0 and SR1) with delayed Smart Reset
setup time (t
STM6503 is similar to STM6502, has two combined delayed Smart Reset inputs (SR0
and three user-selectable delayed Smart Reset setup time (t
s through a three-state TSR input pin: when connected to ground, t
open, t
SRC
STM6504 has two independent Smart Reset inputs. SR0
setup time (t
input pin: when connected to ground, t
connected to V
is edge-triggered with a special debounce time (t
edge after a valid reset period.
) programmed by an external capacitor on the SRC pin.
SRC
= 6 s; when connected to VCC, t
= 10 s (all the times are minimum).
SRC
provides the delayed Smart Reset
) function with three user-selectable t
SRC
CC
, t
= 10 s (all the times are minimum). SRE provides instant reset. SRE
SRC
= 2 s; when left open, t
SRC
DEBOUNCE
options through a three-state TSR
SRC
, SR1)
) options of 2 s, 6 s and 10
SRC
= 2 s; when left
SRC
= 6 s; when
SRC
= 240 ms min.) at the falling
STM6505 has two combined delayed Smart Reset inputs (SR0
adjustable reset delay setup time via an external capacitor connected to the SRC pin.
The RST
output depends also on the VCC monitoring threshold. STM6505 also provides
independent low battery detect (BLD
voltage V
detect output pin (BLD
BAT
. V
is monitored for low voltage and provides an indication on the battery low
BAT
). V
BAT
be used to set the actual battery voltage threshold. V
(16 mV max.). V
V
pin; VCC must be ≥ 1.575 V for proper operation of the V
CC
is voltage monitoring input only, the device is powered only from the
BAT
1.1 Smart Reset devices
The Smart Reset device family STM65xx provides a useful feature that ensures inadvertent
short reset push-button closures do not cause system resets. This is done by implementing
extended Smart Reset input delay (t
delay are met, the device generates an output reset pulse with user-programmable timeout
period (t
The Smart Reset inputs can be also connected to the applications interrupt to allow the
control of both the interrupt pin and the hard reset functions. If the push-buttons are closed
for a short time, the processor is only interrupted. If the system still does not respond
properly, holding the push-buttons for the extended setup time (t
the processor through the reset outputs. The Smart Reset feature helps significantly
increase system stability.
REC
).
, SR1) and provides an
) output controlled by the secondary external input
threshold is 1.25 V, fixed, and an external resistor divideris to
threshold hysteresis is 8 mV typ.
BAT
comparator.
BAT
). Once the valid Smart Reset input levels and setup
SRC
) causes hard reset of
SRC
The STM65xx family of Smart Reset devices consists of low current microprocessor reset
circuits targeted at applications such as MP3 players, navigation, smartphones or mobile
phones; generally any application that requires delayed reset push-button(s) response for
improved system stability. The STM65xx devices feature single or dual Smart Reset inputs
(SR). The delayed Smart Reset setup time (t
) options of 2 s, 6 s and 10 s (all min.) are
SRC
adjustable by an external capacitor on the SRC pin or selectable by three-state logic. The
delayed setup period ignores switch closures shorter than t
, thus preventing unwanted
SRC
resets.
Doc ID 16101 Rev 65/29
DescriptionSTM6502, STM6503, STM6504, STM6505
The STM65xx devices have active-low (optionally active-high) open-drain reset (RST)
output(s) with or without internal pull-up resistor or push-pull as output options, with factoryprogrammed or capacitor-adjustable or push-buttons defined output reset pulse duration,
with or without power-on reset function.
Some devices also have an undervoltage monitoring feature: the reset output is also
asserted when the monitored supply voltage V
reset output remains asserted for the reset timeout period (t
is edge-triggered with a special debounce time (t
the falling edge after a valid reset period. Active-high, no internal pull-up to V
STM6504 only.
SRCInput
Smart Reset input delay setup control: connect to an external capacitor to adjust
the delay setup time (t
). STM6502 and STM6505 only.
SRC
A three-state Smart Reset input delay setup control. When connected to
TSRInput
ground, t
t
= 10 s (all times are minimum). TSR is a DC-type input, intended to be
SRC
either permanently grounded, permanently connected to V
= 2 s; when left open, t
SRC
= 6 s; when connected to VCC,
SRC
left open. If left open, for improved system glitch immunity it is strongly
recommended to connect a 0.1 µF decoupling ceramic capacitor between the
TSR and V
pins. STM6503 and STM6504 only.
SS
Supply voltage input. Power supply for the device and an input for the monitored
V
V
BAT
V
Supply
CC
Supply Ground
SS
InputBattery voltage monitoring input. STM6505 only.
supply voltage. A 0.1 µF decoupling ceramic capacitor is recommended to be
connected between the V
and VSS pins.
CC
NCNo connect (not bonded); should be connected to V