* Contact local ST sales office for the full datasheet.
October 2005
For further information contact your local ST sales office.
Status,
(2)
Rev 4.0
1/9
STM1403
SUMMARY DESCRIPTION
The STM1403 family of security supervisors are a
low power family of intrusion (tamper) detection
chips targeted at manufacturers of POS termi nals
and other systems, to enable them to meet phys-ical and/or environmental intrusion monitoring
requirements as mandated by vario us standards,
such as Federal Information Processing Standards (FIPS) Pub 140 entitled “Security Requirements for Cryptographic Modules,” published by
the National Institute of Standards and Techn ology, U.S. Department of Commerce), EMVCo, ISO,
ZKA, and VISA PED. STM1403 supports target
levels 3 and lower
The STM1403 includes Automatic Battery
Switchover, RST
(Push-button) Reset Input (MR
parator (PFI/PFO
Output (Open Drain), Manual
), Power-fail Com-
), Physical and/or Environmental
Tamper Detect/Security Alarm, and Battery Low
Voltage Detect features.
The STM1403A also offers a V
(1.237V) as an
REF
option on pin 9. On the STM1403B/C, this pin is
(internally switched VCC or V
V
TPU
BAT
).
Figure 2. Logic Diagram
V
REF
(3)
or
V
BLD
(2)
V
CCSW
MR
PFI
TP1 (NH)
TP
(NL)
Note: 1. V
only for STM1403A; V
REF
2. Normal Mod e: Low when V
and High when V
V
CC
, RST , PFO, and BLD are Open Drain.
3. SAL
V
TPU
STM1403
TP
2
(NH)
(1)
3
OUT
V
BAT
CC
V
OUT
(3)
RST
(3)
PFO
(3)
SAL
V
TP
SS
4
(NL)
for STM1403B/C.
TPU
is internally switched to
OUT
is internally switched to battery.
AI09682
V
Pin Modes
OUT
The STM1403 is available in three versions, corresponding to three modes of the V
Voltage Out), when the SAL
(Sec ur it y Al arm ) i s a s-
pin (Supply
OUT
serted (active-low) upon tamper detection:
STM1403A. V
when SAL
is driven low (activated).
STM1403B. V
stays ON (at VCC or V
OUT
is set to High-Z when SAL is
OUT
BAT
driven low (activated).
STM1403C. V
is activated (may be used when V
directly to the V
is driven to Ground when SA L
OUT
pin of the external SRAM that
CC
is connected
OUT
holds the cryptographic codes).
All variants (see Table 1., Device Options) are pin-
compatible and available in a security-friendly, low
profile, 16-pin QFN package.
Table 2. Signal Names
(1)
Vccsw
MR
PFIPower-fail Input
- TP
TP
1
4
V
OUT
(2)
RST
(2)
PFO
(2)
SAL
(2)
BLD
(3)
V
REF
(3)
V
TPU
V
BA T
V
CC
V
SS
Note: See PIN DESCRIPTIONS, page 9 of the f ull datasheet fo r
2. Required for battery -reverse charging protection.
3. Open Drain
only for STM1403; V
4. V
REF
for STM1403B/C.
TPU
COMPARE
COMPARE
COMPARE @
POWER-UP
1.237V V
REF
Generator
COMPARE
COMPARE
t
rec
Generator
RST
PFO
BLD
V
V
SAL
AI09684
TPU
REF
(3)
(3)
(3)
(4)
(4)
(3)
4/9
TAMPE R DE TECTI O N
STM1403
Physical
There are four (4) high-impedance physical
tamper detect input pins, 2 normall y set to High
(NH) and 2 normally set to Low (NL). Each input is
designed with a glitch immunity. These inputs can
be connected externally to several types of actuator devices (e.g., switches, wire mesh). A tamper
on any one of the four inputs that causes its state
to change will trigger the security alarm (SAL
) and
drive it to active-low. Once the tamper condition no
longer exists, the SAL
will return to its normal High
state.
TP
and TP3 are set Normally to High (NH). They
1
are connected externally through a c losed switch
or a high-impedance resistor to V
of STM1403A) or V
(in the case of STM1403B/
TPU
(in the case
OUT
C), A tam per con dition will be detec ted wh en the
input pin is pulled low. If not used, tie the pin to
or V
V
OUT
and TP4 are set Normally to Low (NL). They
TP
2
TPU
.
are connected externally through a high-impedance resistor or a closed switch to V
. A tamper
SS
condition will be detected when the input pin is
pulled high. If not used, tie the pin to V
SS
.
Supply Voltage
The internally switched supply voltage, V
ther V
itored. If V
point, V
input or V
CC
should exceed th e over vo ltage trip
INT
(set at 4.2V, typical), or should go below
HV
the under voltage trip point, V
cal). SAL
will be driven active-low. Once the
input) is continuously mon-
BAT
(set at 2.0v, typi-
LV
tamper condition no longer exists, the SAL
(ei-
INT
pin will
return to its normal High state.
When no tamper condition exists, SAL
is normally
High.
When a tamper is detected, the SAL
(driven low), independent of the part type. V
is activated
OUT
can be driven to one of three states, depending on
which variant of STM1403 is being used (see De-
vice Options, page 1):
■ON;
■High-Z; or
■Ground (V
SS
).
Note: The STM1403 must be initially powered
above V
alarms. For example, if the battery is on while V
= 0V, no alarm condition can be detected until V
rises above V
to enable the tamper detection
RST
RST
(and t
expires). From this
rec
CC
CC
point on, alarms can be detected either on battery
or V
. This is done to avoid false alarms when
CC
the device goes from no power to its operational
state.
5/9
STM1403
PART NUMBERING
Table 3. Ordering Information Scheme (see Figure 5., page 7 for Marki ng Info rm atio n)
Example:STM1403ATM–Q6F
Device Type
STM1403: Physical, Voltage Tamper Detect
Status (SAL = Active-Low)
V
OUT
A: V
B: V
C: V
Reset Threshold Voltage
= ON; Vccsw = Normal Mode
OUT
= High-Z; Vccsw = High
OUT
= Ground; Vccsw = High
OUT
T: V
S: V
R: V
= 3.00V to 3.15V
RST
= 2.85V to 3.00V
RST
= 2.55V to 2.70V
RST
Battery Low Voltage Detect Threshold (V
M: V
N: V
O: V
= 2.3V (Typ)
DET
= 2.5V (Typ)
DET
= 3.2V (Typ)
DET
Package
Q = QFN16 (3mm x 3mm)
Temperature Range
6 = –40 to 85°C
Shipping Method
F = ECOPACK Package, Tape & Reel
DET
)
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
6/9
Figure 5. Topside Marking Information
Note: 1. Options codes:
X = A, B, o r C (for V
X = T, S, or R (for Reset Threshold)
X = M, N, or O (for Battery Low Vol tage Detect Th reshold)
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