The STLC3075 is a SLIC device specifically
designed for WLL (Wireless Local Loop), and
ISDN terminal adaptors and VoIP applications.
One distinctive characteristic of this device is its
ability to operate with a single supply voltage
(from +4.5 V to +12 V) and to self generate the
negative battery by means of an on-chip DC/DC
converter controller that drives an external MOS
switch.
STLC3075
Integrated POTS interface
for home access gateway and WLL
LQFP44
The battery level is properly adjusted depending
on the operating mode. A useful characteristic for
these applications is the integrated ringing
generator.
The control interface is parallel with open drain
output and 3.3 V logic levels.
The metering pulses are generated on-chip
starting from two logic signals (0 and 3.3 V): one
signal defining the metering pulse frequency, the
other signal defining the metering pulse duration.
An on-chip circuit then provides the proper
shaping and filtering. Metering pulse amplitude
and shaping (rising and decay time) can be
programmed by external components.
A dedicated cancellation circuit avoids possible
codec input saturation due to metering pulse
echo.
Constant current feed can be set from 20 mA to
40 mA. Off-hook detection threshold is
programmable from 5 mA to 9 mA.
The device, which is developed in BCDIIIS
technology (90 V process), operates in the
extended temperature range and integrates a
thermal protection that sets the device in power
down when T
Metering pulse cancellation buffer output. TTX filter network should be connected to
this point. If not used, should be left open.
Metering pulse buffer input this signal is sent to the line and used to perform TTX
filtering
4 wires input port (RX input). A 100 kΩ external resistor must be connected to AGND
13RX
via the bias input stage. This signal refers to AGND. If connected to single supply
CODEC output it must be DC decoupled with proper capacitor.
14ZAC1RX buffer output (the AC impedance is connected from this node to ZAC)
15ZACAC impedance synthesis
6/36
STLC3075Pin description
Table 2.Pin description (continued)
N°PinFunction
16RSProtection resistors image (the image resistor is connected from this node to ZAC)
17ZB
Balance network for 2 to 4 wire conversion (the balance impedance ZB is connected
from this node to AGND. ZA impedance is connected from this node to ZAC1).
4 wire output port (TX output). The signal is referred to AGND. If connected to single
supply CODEC input it must be DC decoupled with proper capacitor.
20CZFlyback compensation
21VFFeedback input for DC/DC converter controller
Power switch controller clock (typ. 125 kHz). This pin can also be connected to CVCC
23CLK
or AGND. When the CLK pin is connected to CVCC an internal auto-oscillation is
internally generated and it is used instead of the external clock. When the CLK pin is
connected to AGND, the GATE output is disabled.
24GATE
25R
SENSE
Driver for external power MOS transistor (P-channel in buckboost configuration, Nchannel in flyback configuration).
Voltage input for current sensing. R
pin and V
pin (Buckboost) or GND (Flyback). The PCB layout should minimize the
POS
resistor should be connected close to this
SENSE
extra resistance introduced by the copper tracks.
26V
POS
Positive supply input
27CVCCInternal positive voltage supply filter
28AGNDAnalog ground. Must be shorted with BGND.
29RLIM
30IREF
Constant current feed programming pin (via RLIM). RLIM should be connected close
to this pin and AGND pin to avoid noise injection.
Internal bias current setting pin. RREF should be connected close to this pin and
AGND pin to avoid noise injection.
31RTH
32RD
Off-hook threshold programming pin (via RTH). RTH should be connected close to this
pin and AGND pin to avoid noise injection.
DC feedback and ring trip input. RD should be connected close to this pin and AGND
pin to avoid noise injection.
33ILTFTransversal line current image output
34CSVRBattery supply filter capacitor
35BGNDBattery ground, must be shorted with AGND
36VBAT
Regulated battery voltage self generated by the device via DC/DC converter. Must be
shorted to VBAT1.
37RING2 wire ports; RING wire (Ib is the current sunk into this pin)
41TIP2 wire ports; TIP wire (Ia is the current sourced from this pin)
Reverse polarity transition time control. A proper capacitor connected between this pin
43CREV
and AGND is setting the reverse polarity transition time. This is the same transition
time used to shape the ’trapezoidal ringing’ during ringing injection.
44VBAT1Frame connection. Must be shorted to VBAT
7/36
Electrical specificationSTLC3075
3 Electrical specification
3.1 Absolute maximum rating
Table 3.Absolute maximum ratings
SymbolParameterValueUnit
V
POS
Positive supply voltage-0.4 to +13V
A/BGNDAGND to BGND-1 to +1V
V
dig
T
j
(1)
V
btot
Pin D0, D1, D2, DET, CKTTX-0.4 to 5.5V
Max. junction temperature150°C
Vbtot=|V
device supply pins).
Human body model±1750V
ESD rating
Charged device model±500V
1. Vbat is self generated by the on-chip DC/DC converter and can be programmed via RF1 and RF2. RF1
and RF2 must be selected in order to fulfil the a.m. limits (see components tables).
3.2 Operating range
Table 4.Operating range
SymbolParameterValueUnit
V
POS
A/BGNDAGND to BGND-100 to +100mV
V
dig
T
op
(1)
V
bat
1. Vbat is self generated by the on-chip DC/DC converter and can be programmed via RF1 and RF2. RF1
and RF2 must be selected in order to fulfil the a.m. limits (see Table 10: External components for
buckboost configuration)
Positive supply voltage4.5 to +12V
Pin D0, D1, D2, DET, CKTTX, PD-0.25 to 5.25V
Ambient operating temperature range-40 to +85°C
Self generated battery voltage-74 max.V
|+|Vbat|. (Total voltage applied to the
POS
90V
3.3 Thermal data
Table 5.Thermal data
SymbolParameterValueUnit
R
th j-amb
8/36
Thermal resistance junction to ambient typical.60°C/W
STLC3075Functional description
4 Functional description
The STLC3075 is a device specifically developed for WLL VoIP and ISDN-TA applications. It
is based on a SLIC core, on purpose optimized for these applications, with the addition of a
DC/DC converter controller to meet the WLL and ISDN-TA design requirements.
The SLIC performs the standard feeding, signalling and transmission functions.
STLC3075 can be set in three different operating modes via the D0, D1, D2 pins of the
control logic interface (0 to 3.3 V logic levels). The loop status is carried out on the DET
(active low).
pin
The DET
pin is an open drain output to allow easy interfacing with both 3.3 V and 5 V logic
levels.
The four possible SLIC’s operating modes are:
–Power down
–High impedance feeding (HI-Z)
–Active
–Ringing
Ta bl e 6 shows how to set the different SLIC operating modes.
Table 6.SLIC operating modes
PDD0D1D2Operating mode
000XPower down
100XH.I. feeding (HI-Z)
1010Active normal polarity
1011Active reverse polarity
1110Active TTX injection (N.P.)
1111Active TTX injection (R.P.)
1100/1Ring (D2 bit toggles @ fring)
4.1 DC/DC converter
The DC/DC converter controller drives an external power MOS transistor N-Ch plus
transformer (Flyback configuration) or P-Ch plus inductor (Buckboost configuration), in order
to generate the negative battery voltage needed for the device operation.
The DC/DC converter controller is synchronized with an external CLK (125 kHz typ.) or with
an internal clock generated when the pin CLK is connected to CVCC. One R
to PGND supply (Flyback) or to V
input peak current.
This feature is implemented in order to avoid overload on V
transient (ex. ring trip detection). The 110 mΩ typical value guarantees an average current
consumption from V
guarantees an average current consumption from V
POS
in series
supply (Buckboost) allows to fix the maximum allowed
POS
supply in case of line
POS
SENSE
< 700 mA for buckboost configuration. The 220 mΩ typical value
< 800 mA for flyback configuration.
POS
9/36
Functional descriptionSTLC3075
The self generated battery voltage is set to a predefined value in on-hook state.
The typical value of -50 V can be adjusted via one external resistor (RF1). When RING
mode is selected this typical value is increased to -70 V.
Once the line goes in off-hook condition, the DC/DC converter automatically adjusts the
generated battery voltage in order to feed the line with a fixed DC current (programmable via
RLIM) optimizing the power dissipation.
4.2 Operating modes
4.2.1 Power down
When this mode is selected the SLIC is switched off and the TIP and RING pins are in high
impedance. The line detectors are also disabled therefore the off-hook condition cannot be
detected.
The power down mode can be selected in emergency condition when it is necessary to cut
any current delivered to the line.
The power down mode is also forced by STLC3075 in case of thermal overload
(T
> 140 °C). In this case the device goes back to the previous status as soon as the
j
junction temperature decrease under the hysteresis threshold.
No AC transmission is possible.
4.2.2 High impedance feeding (HI-Z)
This operating mode is normally selected when the telephone is in on-hook in order to
monitor the line status keeping the power consumption at the minimum.
The output voltage in on-hook condition is equal to the self generated battery voltage (-50 V
typical).
When off-hook occurs the DET
The off-hook threshold value in HI-Z mode is the same as the programmed value in ACTIVE
mode.
The DC characteristics in HI-Z mode are equal to the self generated battery with
2x(1600 Ω+Rp) in series (see Figure 3), where Rp is the external protection resistance.
No AC transmission is possible.
Figure 3.DC characteristics in HI-Z mode.
becomes active (low logic level).
IL
Vbat
2x(R1+Rp)
Slope: 2x(R1+Rp)
(R1=1600ohm)
10/36
VL
Vbat (-50V)
STLC3075Functional description
4.2.3 Active
DC characteristics & supervision
When this mode is selected the STLC3075 provides both DC feeding and AC transmission.
The STLC3075 feeds the line with a constant current fixed by RLIM (20 mA to 40 mA
range). The on-hook voltage is typically 40 V allowing on-hook transmission; the self
generated Vbat is -50 V typical.
If the loop resistance is very high and the line current cannot reach the programmed
constant current feed value, the STLC3075 behaves like a 40 V voltage source with a series
impedance equal to the protection resistors 2xRp (typ. 2x50 Ω). Figure 4. shows the typical
DC characteristics in active mode.
The line status (on/off hook) is monitored by the SLIC’S supervision circuit. The off-hook
threshold can be programmed via the external resistor RTH in the range from 5mA to 9mA.
Independently on the programmed constant current value, the TIP and RING buffers have a
current source capability limited to 80mA typical.
Figure 4.DC characteristics in active mode
IL
Ilim
(20 to
40mA)
2Rp
VL
10V
Vbat (-50V)
Moreover the power available at Vbat is controlled by the DC/DC converter that limits the
peak current drawn from the V
R
SENSE
resistor.
supply. The maximum allowed current peak is set by
POS
11/36
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