ST STGIPS10K60T User Manual

SLLIMM™ (small low-loss intelligent molded module)

IPM, 3-phase inverter - 10 A, 600 V short-circuit rugged IGBT

Features

■ IPM 10 A, 600 V 3-phase IGBT inverter bridge

including control ICs for gate driving and free­wheeling diodes

■ Short-circuit rugged IGBTs

■ V

■ 3.3 V, 5 V, 15 V CMOS/TTL inputs

comparators with hysteresis and pull down /
pull up resistors

■ Undervoltage lockout

■ Internal bootstrap diode

■ Interlocking function

■ Shut down function

■ DBC substrate leading to low thermal

resistance

■ Isolation rating of 2500 Vrms/min

■ 4.7 kΩ NTC for temperature control

negative temperature coefficient

CE(sat)

STGIPS10K60T

SDIP-25L

Applications

■ 3-phase inverters for motor drives

■ Home appliances, such as washing machines,

refrigerators, air conditioners and sewing
machines

Description

This intelligent power module provides a
compact, high performance AC motor drive in a
simple, rugged design. Combining ST proprietary
control ICs with the most advanced short-circuit­rugged IGBT system technology, this device is
ideal for 3-phase inverters in applications such as
home appliances and air conditioners. SLLIMM™
is a trademark of STMicroelectronics.

Table 1. Device summary

Order code Marking Package Packaging

STGIPS10K60T GIPS10K60T SDIP-25L Tube

September 2011 Doc ID 018533 Rev 2 1/19

www.st.com

19

Contents STGIPS10K60T

Contents

1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3

2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1.1 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.2 Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/19 Doc ID 018533 Rev 2

STGIPS10K60T Internal block diagram and pin configuration

1 Internal block diagram and pin configuration

Figure 1. Internal block diagram

Doc ID 018533 Rev 2 3/19

Internal block diagram and pin configuration STGIPS10K60T

Table 2. Pin description

Pin n° Symbol Description

1OUT

2V

3LIN

4HIN

5V

6OUT

7V

U

boot U

U

U

CC

V

boot V

High side reference output for U phase

Bootstrap voltage for U phase

Low side logic input for U phase

High side logic input for U phase

Low voltage power supply

High side reference output for V phase

Bootstrap voltage for V phase

8 GND Ground

9LIN

10 HIN

11 OUT

12 V

13 LIN

14 HIN

15 SD

V

V

W

boot W

W

W

/ OD Shut down logic input (active low) / open drain (comparator output)

Low side logic input for V phase

High side logic input for V phase

High side reference output for W phase

Bootstrap voltage for W phase

Low side logic input for W phase

High side logic input for W phase

16 T1 NTC thermistor terminal

17 N

W

Negative DC input for W phase

18 W W phase output

19 P Positive DC input

20 N

V

Negative DC input for V phase

21 V V phase output

22 P Positive DC input

23 N

U

Negative DC input for U phase

24 U U phase output

25 P Positive DC input

Figure 2. Pin layout (bottom view)

4/19 Doc ID 018533 Rev 2

STGIPS10K60T Electrical ratings

2 Electrical ratings

2.1 Absolute maximum ratings

Table 3. Inverter part

Symbol Parameter Value Unit

V

V

PN(surge)

V

CES

± I

± I

CP

P

TOT

t

scw

1. Applied between HIN

Supply voltage applied between P - NU, NV, N

PN

W

Supply voltage (surge) applied between P - NU,
NV, N

W

Each IGBT collector emitter voltage (V

Each IGBT continuous collector current at

(2)

C

T

= 25°C

C

(3)

Each IGBT pulsed collector current 20 A

(1)

= 0)

IN

Each IGBT total dissipation at TC = 25°C

Short-circuit withstand time, VCE = 0.5 V

= 125 °C, VCC = V

T

j

, LINi and GND for i = U, V, W.

i

= 15 V, V

boot

IN

(1)

= 5 V

(BR)CES

450 V

500 V

600 V

10 A

33 W

5µs

2. Calculated according to the iterative formula:

ICTC()

-------------------------------------------------------------------------------------------------------=

R

thj c–

T

V

CE sat()max()Tjmax()ICTC

–

jmax()TC

(),()×

3. Pulse width limited by max junction temperature.

Table 4. Control part

Symbol Parameter Value Unit

V

OUT

V

V

boot

V

V

SD/OD

dV

OUT

Output voltage applied between
OUT

OUT

U,

Low voltage power supply -0.3 to +21 V

CC

OUTW - GND

V,

Bootstrap voltage applied between
V

- OUTi for i = U, V, W

boot i

Logic input voltage applied between HIN, LIN and

IN

GND

Open drain voltage -0.3 to 15 V

/dt Allowed output slew rate 50 V/ns

- 21 to V

V

boot

boot

-0.3 to 620 V

-0.3 to 15 V

+ 0.3 V

Doc ID 018533 Rev 2 5/19

Electrical ratings STGIPS10K60T

Table 5. Total system

Symbol Parameter Value Unit

V

ISO

T

C

T

J

1. The maximum junction temperature rating of the power chips integrated within the SDIP module is 150°C
(@TC ≤ 100°C). To ensure safe operation of the SDIP module, the average junction temperature should be
limited to T

Isolation withstand voltage applied between each
pin and heatsink plate (AC voltage, t = 60 sec.)

Module case operation temperature -40 to 125 °C

(1)

Operating junction temperature -40 to 150 °C

(avg) ≤ 125°C (@TC ≤ 100°C)

J

2.2 Thermal data

Table 6. Thermal data

Symbol Parameter Value Unit

R

thJC

Thermal resistance junction-case single IGBT max. 3.8 °C/W

Thermal resistance junction-case single diode max. 5.5 °C/W

2500 V

6/19 Doc ID 018533 Rev 2

STGIPS10K60T Electrical characteristics

3 Electrical characteristics

TJ = 25 °C unless otherwise specified.

Table 7. Inverter part

Val ue

Symbol Parameter Test conditions

Min. Typ. Max.

Unit

VCC = V
V

IN

I

V

CE(sat)

I

CES

V

Collector-emitter
saturation voltage

Collector-cut off current

(1)

= 0 “logic state”)

(V

IN

Diode forward voltage

F

C

V

CC

V

IN

I

C

V

CE

V

CC

(V
IC = 5 A

Inductive load switching time and energy

t

t

c(on)

t

t

c(off)

t

E

E

1. Applied between HIN

Turn-on time

on

Crossover time (on) - 70 -

Turn-off time - 430 -

off

Crossover time (off) - 135 -

Reverse recovery time - 130 -

rr

Turn-on switching losses - 65 -

on

Turn-off switching losses - 75 -

off

, LINi and GND for i = U, V, W (LIN inputs are active-low)..

i

VDD = 300 V,
V

CC

V

IN

IC = 5 A (see Figure 4)

= 15 V,

boot

(1)

= 5 V,

= 5 A

= V

(1)

boot

= 5 V,

= 15 V,

= 5 A, Tj = 125 °C

= 600 V

IN

= V

(1)

= V

(1)

= 15 V

boot

= 0 “logic state”),

= 15 V,

boot

= 0 ÷ 5 V,

-2.12.5

V

-1.8

-150µA

-1.9V

- 320 -

ns

µJ

Note: t

ON

and t

include the propagation delay time of the internal drive. t

OFF

C(ON)

and t

the switching time of IGBT itself under the internally given gate driving condition.

Doc ID 018533 Rev 2 7/19

C(OFF)

are

Electrical characteristics STGIPS10K60T

Figure 3. Switching time test circuit

Figure 4. Switching time definition

100% IC 100% IC

t

rr

VCE

IC IC

VIN

t

ON

t

C(ON)

VIN(ON)

10% IC 90% IC 10% VCE

VIN

VIN(OFF)

t

OFF

VCE

t

C(OFF)

10% VCE 10% IC

(a) turn-on

Note: Figure 4 "Switching time definition" refers to HIN inputs (active high). For LIN

low), V

8/19 Doc ID 018533 Rev 2

polarity must be inverted for turn-on and turn-off.

IN

(b) turn-off

AM09223V1

inputs (active

STGIPS10K60T Electrical characteristics

3.1 Control part

Table 8. Low voltage power supply (V

= 15 V)

CC

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

cc_hys

V

cc_thONVcc

V

cc_thOFFVcc

I

qccu

I

qcc

Vcc UV hysteresis 1.2 1.5 1.8 V

UV turn ON threshold 11.5 12 12.5 V

UV turn OFF threshold 10 10.5 11 V

Undervoltage quiescent
supply current

Quiescent current

VCC = 10 V
SD/OD = 5 V; LIN = 5 V;

HIN = 0

= 15 V

V

cc

/OD = 5 V; LIN = 5 V

SD

450 µA

3.5 mA

HIN = 0

Table 9. Bootstrapped voltage (VCC = 15 V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

BS_hys

V

BS_thON

V

BS_thOFF

I

QBSU

UV hysteresis 1.2 1.5 1.8 V

BS

V

UV turn ON threshold 10.6 11.5 12.4 V

BS

V

UV turn OFF threshold 9.1 10 10.9 V

BS

V

= 10 V

Undervoltage VBS quiescent
current

BS

/OD = 5 V; LIN and

SD
HIN = 5 V

70 110 µA

I

R

DS(on)

QBS

VBS quiescent current

Bootstrap driver on resistance LVG ON 120 Ω

Table 10. Logic inputs (VCC = 15 V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Low logic level voltage 0.8 V

V

il

V

I

HINh

I

HINl

I

LINl

I

LINh

I

SDh

I

SDl

Dt Dead time see Figure 8 600 ns

High logic level voltage 2.25 V

ih

HIN logic “1” input bias current HIN = 15 V 110 175 260 µA

HIN logic “0” input bias current HIN = 0 V 1 µA

LIN logic “1” input bias current LIN = 0 V 3 6 20 µA

LIN logic “0” input bias current LIN = 15 V 1 µA

SD logic “0” input bias current SD = 15 V 30 120 300 µA

SD logic “1” input bias current SD = 0 V 3 µA

= 15 V

V

BS

SD/OD = 5 V; LIN and
HIN = 5 V

150 210 µA

Doc ID 018533 Rev 2 9/19

Electrical characteristics STGIPS10K60T

Table 11. Shut down characteristics (V

= 15 V)

CC

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

sd

Shut down to high / low side
driver propagation delay

V

= 0, V

OUT

V

= 0 to 3.3 V

IN

boot

= VCC,

50 125 200 ns

Table 12. Truth table

Condition

Shutdown enable
half-bridge tri-state

Interlocking
half-bridge tri-state

0 ‘’logic state”
half-bridge tri-state

1 “logic state”
low side direct driving

1 “logic state”
high side direct driving

Logic input (V

SD

/OD LIN HIN LVG HVG

LXXLL

HLHLL

HHL L L

HLLHL

HHHLH

)Output

I

Note: X: don’t care

Figure 5. Maximum I

IC (RMS)

(A)

1. Simulated curves refer to typical IGBT parameters and maximum R

switching frequency

V

= 300 V, Modulation index = 0.8,

PN

PF = 0.6, T

12

10

8

T

6

6

410

= 150 °C, f

j

C = 100

°C

8 14 16

C(RMS)

12

current vs.

(1)

= 60 Hz

SINE

T

C = 80

°C

f

sw(kHz)

AM03801v1

Figure 6. Maximum I

(1)

IC (RMS)

(A)

V

= 300 V, Modulation index = 0.8,

PN

PF = 0.6, T

8

7

6

fsw = 12 kHz

fsw = 16 kHz

5

4

1

.

thJC

current vs. f

C(RMS)

= 150 °C, Tc = 100 °C

j

fsw = 20 kHz

10

AM03802v1

SINE(Hz)

f

SINE

10/19 Doc ID 018533 Rev 2

STGIPS10K60T Electrical characteristics

3.1.1 NTC thermistor

Table 13. NTC thermistor

Symbol Parameter Test conditions Min. Typ. Max. Unit.

R

25

R

125

BB-constant T

Resistance TC = 25°C 4.7 kΩ

Resistance TC = 125°C 160 Ω

= 25°C 3950 K

C

T Operating temperature -40 150 °C

Equation 1: resistance variation vs. temperature

1

1

⎛⎞

B

---

--------- -–

⎝⎠

T

RT() R25e

⋅=

298

Where T are temperatures in Kelvins

Figure 7. NTC resistance vs. temperature

R (kΩ)

R (kΩ)

100

100

10

10

AM07843v1

AM07843v1

1

1

0.1

0.1

0.01

0.01
T (°C)

-50 0 50 100

-50 0 50 100

T (°C)

Doc ID 018533 Rev 2 11/19

Electrical characteristics STGIPS10K60T

3.2 Waveforms definitions

Figure 8. Dead time and interlocking waveforms definitions

LIN

CONTROL SIGNAL EDGES
OVERLAPPED:

INTERLOCKING + DEAD TIME

CONTROL SIGNALS EDGES
SYNCHRONOUS (*):

DEAD TIME

CONTROL SIGNALS EDGES
NOT OVERLAPPED,
BUT INSIDE THE DEAD TIME:

DEAD TIME

HIN

LVG

HVG

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

LIN

HIN

LVG

HVG

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

LIN

HIN

LVG

HVG

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

INTERLOCKING

DTLH

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

DTLH DTHL

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

LH

DT

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

INTERLOCKING

DTHL

DT

HL

CONTROL SIGNALS EDGES
NOT OVERLAPPED,
OUTSIDE THE DEAD TIME:

DIRECT DRIVING

HIN

LVG

HVG

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

DTLH

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

DTHL

(*) HIN and LIN can be connected together and driven by just one control signal

LIN

12/19 Doc ID 018533 Rev 2

STGIPS10K60T Applications information

4 Applications information

Figure 9. Typical application circuit

Doc ID 018533 Rev 2 13/19

Applications information STGIPS10K60T

4.1 Recommendations

● Input signal HIN is active high logic. A 85 kΩ (typ.) pull down resistor is built-in for each

high side input. If an external RC filter is used, for noise immunity, pay attention to the
variation of the input signal level.

● Input signal /LIN is active low logic. A 720 kΩ (typ.) pull-up resistor, connected to an

internal 5 V regulator through a diode, is built-in for each low side input.

● To prevent the input signals oscillation, the wiring of each input should be as short as

possible.

● By integrating an application specific type HVIC inside the module, direct coupling to

MCU terminals without any opto-coupler is possible.

● Each capacitor should be located as nearby the pins of IPM as possible.

● Low inductance shunt resistors should be used for phase leg current sensing.

● Electrolytic bus capacitors should be mounted as close to the module bus terminals as

possible. Additional high frequency ceramic capacitor mounted close to the module
pins will further improve performance.

● The SD/OD signal should be pulled up to 5 V / 3.3 V with an external resistor.

Table 14. Recommended operating conditions

Val ue

Symbol Parameter Conditions

Min. Typ. Max.

Unit

V

PN

V

CC

V

BS

t

dead

f

PWM

Supply Voltage Applied between P-Nu, Nv, Nw 300 400 V

Control supply voltage Applied between VCC-GND 13.5 15 18 V

High side bias voltage

Blanking time to

prevent Arm-short

PWM input signal

Applied between V
i = U, V, W

For each input signal 1 µs

-40°C < Tc < 100°C

-40°C < T

< 125°C

j

BOOTi

-OUTi for
13 18 V

20 kHz

14/19 Doc ID 018533 Rev 2

STGIPS10K60T Package mechanical data

5 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

Please refer to dedicated technical note TN0107 for mounting instructions.

Table 15. SDIP-25L mechanical data

(mm.)

Dim.

Min. Typ. Max.

A44 44.8

A1 0.95 1.75

A2 1.2 2

A3 39 39.8

B 21.6 22.4

B1 11.45 12.25

B2 24.83 25.22 25.63

C5 5.8

C1 6.4 7.4

C2 11.1 12.1

e 1.95 2.35 2.75

e1 3.2 3.6 4

e2 4.3 4.7 5.1

e3 6.1 6.5 6.9

F0.81.01.2

F1 0.3 0.5 0.7

R 1.35 2.15

T 0.4 0.55 0.7

Doc ID 018533 Rev 2 15/19

Package mechanical data STGIPS10K60T

Figure 10. SDIP-25L drawing dimensions

(

&

'

16/19 Doc ID 018533 Rev 2

8154676 rev_F

STGIPS10K60T Package mechanical data

Figure 11. Packaging specifications of SDIP-25L package

Doc ID 018533 Rev 2 17/19

Revision history STGIPS10K60T

6 Revision history

Table 16. Document revision history

Date Revision Changes

07-Mar-2011 1 Initial release.

14-Sep-2011 2 Modified Section 3.1.1 on page 11.

18/19 Doc ID 018533 Rev 2

STGIPS10K60T

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Doc ID 018533 Rev 2 19/19