ST STA333ML User Manual
2-channel microless high-efficiency digital audio system
Features
■ Wide supply voltage range (4.5 - 20 V)
■ 2 x 20 W into 8 Ω at V
■ PowerSSO-36 exposed pad package
■ 2 channels of 24-bit DDX
100-dB SNR and dynamic range
■
■ Selectable 32 kHz to 48 kHz input sample
rates
■ Automatic zero-detect mute
■ Automatic invalid input detect mute
■ 2-channel I
■ Selectable clock input ratio (256 or 364 * fs)
■ Max power correction for lower full power
■ 96 kHz internal processing sample rate, 24-bit
2
S input data interface
precision
■ Embedded thermal overload and short-circuit
protection
■ Filterless configuration option
Applications
■ LCDs
■ DVDs
■ Cradles
■ Digital speakers
■ Wireless speaker cradles
= 18 V
CC
®
STA333ML
Sound Terminal
Datasheet − production data
PowerSSO-36
with exposed
pad down (EPD)
Description
The STA333ML is a single die embedding digital
audio processing and high-efficiency power
amplification, capable of operating without the aid
of an external microcontroller.
The STA333ML is part of the Sound Terminal
family that provides full digital audio streaming to
the speakers and offers cost effectiveness, low
power dissipation and sound enrichment.
The STA333ML combines a unique 24-bit DDX
digital class-D ternary modulator together with an
extremely low R
The latter is capable of a total output power of
2 x 20 W with outstanding performance in terms
of efficiency (>90%), THD, SNR and EMI.
The microless feature allows its use in low-cost
applications (cradles, digital speakers, audio
terminals) where no microcontroller is needed.
The serial audio data interface accepts the
universally used I
as the oversampling clock, gain, and I
can be set using a minimal number of selection
pins.
The STA333ML is self-protected against thermal
overload, overcurrent, short-circuit and
overvoltage conditions.
stereo power DMOS stage.
dsON
2
S format. Basic features, such
2
S format,
®
®
®
The fault condition is also signalled on an external
pin (INT_LINE) for specific requirements.
Table 1. Device summary
Order code Package Packaging
STA333ML PowerSSO-36 EPD Tube
STA333ML13TR PowerSSO-36 EPD Tape and reel
March 2012 Doc ID 13177 Rev 6 1/21
This is information on a product in full production.
www.st.com
21
Contents STA333ML
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Recommended operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.4 Electrical specifications - digital section . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.5 Electrical specifications - power section . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.6 Power-on sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.7 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 Serial audio interface protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 Fault-detect recovery bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Zero-detect mute enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4 Fade-in/out feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 Oversampling selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6 Gain selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.7 Power-down function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1 Applications schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2 Internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3 PLL filter schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4 Typical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21 Doc ID 13177 Rev 6
STA333ML Block diagram
1 Block diagram
Figure 1. Block diagram
Protection
I2S
interface
Vol um e
control
Powe r
control
DDX
current/thermal
Logic
Regulators
Channel
1A
Channel
1B
Channel
2A
PLL
Channel
2B
Bias
Doc ID 13177 Rev 6 3/21
Pin description STA333ML
2 Pin description
Figure 2. Pin connections (top view)
GND_SUB
FMT
TEST_MODE
VSS_REG
VCC_REG
OUT2B
GND2
VCC2
OUT2A
OUT1B
VCC1
GND1
OUT1A
GND_REG
VDD_REG
CONFIG
N.C.
N.C.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
EP, exposed pad
(device ground)
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
VDD_DIG
GND_DIG
GAIN
ONSEL
INT_LINE
RESET
SDI
LRCKI
BICKI
XTI
GND_PLL
FILTER_PLL
VDD_PLL
PWRDN
GND_DIG
VDD_DIG
N.C.
N.C.
Table 2. Pin description
Pin Name Type Description
1 GND_SUB Gnd Substrate ground
Serial format:
2FMT In
3 TEST_MODE In This pin must be connected to GROUND
4 VSS_REG Analog Internal reference at V
5 VCC_REG Analog Internal V
6 OUT2B Out Output half bridge 2B
7 GND2 Gnd Power negative supply
8 VCC2 Power Power positive supply
9 OUT2A Out Output half bridge 2A
10 OUT1B Out Output half bridge 1B
4/21 Doc ID 13177 Rev 6
0: I
1: left justified
2
S format
reference
CC
- 3.3 V
CC
STA333ML Pin description
Table 2. Pin description (continued)
Pin Name Type Description
11 VCC1 Power Power positive supply
12 GND1 Gnd Power negative supply
13 OUT1A Out Output half-bridge 1A
14 GND_REG Analog Internal ground reference
15 VDD_REG Analog Internal 3.3 V reference voltage
16 CONFIG In Configuration mode, must be connected to ground
17 N.C. - Not connected
18 N.C. - Not connected
19 N.C. - Not connected
20 N.C. - Not connected
21 VDD_DIG Power Positive supply digital
22 GND_DIG Gnd Digital ground
Power-down:
23 PWRDN In
24 VDD_PLL Power Positive supply for PLL
25 FILTER_PLL In Connection to PLL filter
0: low-power mode
1: normal operation
26 GND_PLL Gnd Negative supply for PLL
27 XTI In PLL input clock, 256 * fs or 384 * fs
2
28 BICKI In I
29 LRCKI In I
30 SDI In I
S serial clock
2
S left/right clock
2
S serial data channel
31 RESET In Reset
32 INT_LINE Out Fault interrupt
Oversampling selector:
33 ONSEL In
0: 256 * fs
1: 384 * fs
Gain selector:
34 GAIN In
0: 0 dBFs
1: 24 dBFs
35 GND_DIG Gnd Digital ground
36 VDD_DIG Power Digital supply
-EP -
Exposed pad for PCB heatsink, to be connected to
ground plane
Doc ID 13177 Rev 6 5/21
Electrical specifications STA333ML
3 Electrical specifications
3.1 Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol Parameter Min Typ Max Unit
V
CC
V
L
V
DD
T
op
T
stg
Power supply voltage (pins VCC1, VCC2) - - 23 V
Logic input interface -0.3 - 4 V
Digital supply (pin VDD_DIG) - - 4 V
Operating junction temperature 0 - 150 °C
Storage temperature -40 - 150 °C
3.2 Thermal data
Table 4. Thermal data
Symbol Parameter Min Typ Max Unit
R
Th(j-case)
T
sd
T
hsd
Thermal resistance junction to case (thermal pad) - 1.5 2 °C/W
Thermal shutdown junction temperature 140 - 150 °C
Thermal shutdown hysteresis 18 20 22 °C
3.3 Recommended operating condition
Table 5. Recommended operating condition
Symbol Parameter Min Typ Max Unit
V
V
V
T
CC
L
DD
amb
Power supply voltage (pins VCC1, VCC2) 4.5 - 20.0 V
Logic input interface 2.7 3.3 3.6 V
Digital supply (pin VDD_DIG) 2.7 3.3 3.6 V
Ambient temperature 0 - 70 °C
6/21 Doc ID 13177 Rev 6
STA333ML Electrical specifications
3.4 Electrical specifications - digital section
Table 6. Electrical specifications for digital section
Symbol Parameter Conditions Min Typ Max Unit
I
il
I
ih
V
il
V
ih
V
ol
V
oh
I
pu
R
pu
Input current without bias
device
Low-level input voltage - - -
High-level input voltage -
Low-level output voltage Iol = 2 mA - -
High-level output voltage Ioh = 2 mA
Pull-up/down current - -25 66 125 µA
Equivalent pull-up/down
resistance
= 0 V -10 - 10 µA
V
i
Vi = VDD = 3.6 V -10 - 10 µA
0.8 *
V
0.8 *
V
--50-kΩ
3.5 Electrical specifications - power section
The specifications given here are with the operating conditions: VCC = 18 V, VDD = 3.3 V,
f
= 384 kHz, T
sw
Table 7. Electrical specifications for power section
Symbol Parameter Conditions Min Typ Max Unit
= 25 °C, RL =8Ω unless otherwise specified
amb
DD
DD
0.2 *
V
DD
V
--V
0.4 *
V
DD
V
--V
Po Output power BTL
On resistance of power
R
dsON
P-channel/N-channel
MOSFET (total bridge)
Power
l
dss
P-channel/N-channel
leakage current
gP
gN
I
LDT
I
HDT
t
r
t
f
Power P-channel
R
matching
dsON
Power N-channel
matching
R
dsON
Low current dead time
(static)
High current dead time
(dynamic)
Rise time Resistive load Figure 4 - 8 10 ns
Fall time Resistive load Figure 4 - 8 10 ns
THD = 1% - 16 -
W
THD = 10% - 20 -
l
= 1 A - 180 250 mΩ
d
- --10μA
= 1 A 95--%
l
d
= 1 A 95--%
l
d
Resistive load Figure 4 - 5 10 ns
Load = 1.5 A (Figure 5) - 10 20 ns
Doc ID 13177 Rev 6 7/21
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