ST STA2058 User Manual

GPS platform high-sensitivity baseband

Features

■ Single chip baseband with embedded Flash

■ Complete embedded memory system:

– Flash 256 KB +16 Kbytes – RAM 64 Kbytes

■ 66 MHz ARM7TDMI 32 bit processor

■ High performance GPS engine (HPGPS)

■ SBAS (WAAS and EGNOS) supported

■ Sensitivity (-146 dBm acquisition, -159 dBm

tracking)

■ Time to first fix (1s reacquisition, 2.5 s hot start,

34 s warm start, 39 s cold start)

■ Accuracy (2 m autonomous)

■ External memory interface (EMI) supporting up

to 64 Mbite of external SRAM, Flash and ROM

■ Extensive GPS receiver interfaces:

48 GPIOs, 4 UARTs, 2 SPIs, 2 I2Cs, 2 CANs 2.0, 1 USB 1.1,1 HDLC and 4 channels ADC

■ ST proprietary Flash embedded technology

■ LFBGA144 and LQFP64 lead-free package

■ -40 °C to 85 °C operating temperature range

STA2058

TESEO™

Data Brief

LQFP64

Evaluation kits

■ STA2058 module reference design (25x25mm)

■ Evaluation board hosting STA2058 module

■ SDK board (for application SW development)

Description

STA2058 is the high-sensitivity baseband of TESEO GPS platform which include the STA5620 RF Front-End.

The embedded Flash memory enables the equipment manufacturer to load the entire GPS software (including tracking, acquisition, navigation and data output) after customizing its interfaces to his needs. A standard GPS library is available from ST.

TESEO is the ideal solution for consumer, handheld, PND (portable navigation), in vehicle navigation and telematics systems.

LFBGA144

SBAS (WAAS and EGNOS) feature is also supported.

Table 1. Device summary

Order code Package

STA2058 LQFP64 (10x10x1.4mm) No Tray No

STA2058TR LQFP64 (10x10x1.4mm) No Tape and reel No

STA2058EX LFBGA144 (10x10x1.7mm) Yes Tray No

STA2058EXTR LFBGA144 (10x10x1.7mm) Yes Tape and reel No

STA2058EXA LFBGA144 (10x10x1.7mm) Yes Tray Yes

STA2058EXATR LFBGA144 (10x10x1.7mm) Yes Tape and reel Yes

March 2009 Rev 3 1/20

For further information contact your local STMicroelectronics sales office.

(External Memory Interface)

EMI

Packing

Automotive

grade

www.st.com

Contents STA2058

Contents

1 Features summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 System block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Package LFBGA144 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2 Package LQFP64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.3 Power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.1 DC electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.2 AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.3 nRSTIN input filter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.4 Flash electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.5 Oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.6 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.7 PLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.8 LVD electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.9 GPS performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/20

STA2058 Features summary

1 Features summary

● ARM7TDMI 16/32 bit RISC CPU based host microcontroller running at a frequency up

to 66 MHz.

● Complete embedded memory system:

– Flash 256 Kbytes + 16 Kbytes (100 KB erasing/programming cycles) – RAM 64 Kbytes.

● External memory interface provides glueless support for up to four banks of external

SRAM, Flash, ROM.

● High performance GPS engine (HPGPS).

● ST Proprietary CMOS (0.18 µm) Flash embedded technology.

● SBAS (WAAS and EGNOS) supported

● -40 °C to 85 °C operating temperature range.

● 144-pin LFBGA package and 64-pin LQFP package

● Power supply:

– 3.0 V to 3.6 V operating supply range for Input/Output periphery – 3.0 V to 3.6 V operating supply range for A/D Converter reference – 1.8 V operating supply range for core supply provided either by internal voltage

regulator (with external stabilization capacitor) or by external supply voltage.

● Reset and clock control unit able to provide low power modes (WAIT, SLOW, STOP,

STANDBY) and to generate the internal clock from the external reference through integrated PLL.

● 48 programmable general purpose I/O, each pin programmable independently as

digital input or digital output; 40 (30 in LQFP64) are multiplexed with peripheral functions; 16 can generate an interrupt on input level/transition.

● Real time clock module with 32 kHz low power oscillator and separate power supply to

continue running during standby mode.

● 16-bit Watchdog timer with 8 bits prescaler for system reliability and integrity.

● 2 CAN modules compliant with the CAN specification V2.0 part B (active) and bit rate

can be programmed up to 1 MBaud. One additional CAN at 1 Mbps (for STA2058 EM SIP version)

● Four 16-bit programmable timers with 7 bit prescaler, up to two input capture/output

compare, one pulse counter function, one PWM channel with selectable frequency each.

● 4 channels 12-bit sigma-delta analog to digital converter, single channel or multi

channel conversion modes, single-shot or continuous conversion modes, sample rate 1 kHz, conversion range 0-2.5 V .

● Three serial communication interfaces (UART) allow full duplex, asynchronous,

communications with external devices, independently programmable TX and RX baud rates up to 625 Kbaud.

● One UART adapted to suit smart card interface needs, for asynchronous SC as defined

by ISO 7816-3. It includes SC clock generation.

● Two serial peripheral interfaces (SPI) allow full duplex, synchronous communications

with external devices, master or slave operation, max baud rate of 5.5 Mb/s. One SPI may be used as multimedia card interface.

3/20

Features summary STA2058

● Two I

● Enhanced interrupt controller supports 32 interrupt vectors, independently maskable,

C Interfaces provide multi-master and slave functions, support normal and fast

C mode (400 KHz), 7/10 bit addressing modes. One I2C Interface is multiplexed with

one SPI, so either 2 x SPI + 1 x I

C or 1 x SPI + 2 x I2C may be used at a time.

with interrupt vector table for faster response and 16 priority levels, software programmable for each source. Up to 2 maskable interrupts may be mapped on FIQ.

● Wakeup unit allows exiting from power down modes by detection of an event on two

external pins (one is active high and other is active low) or on internal real time clock alarm.

● USB unit V1.1 compliant, software configurable endpoint setting, USB suspend/resume

support

● High level data link controller (HDLC) unit supports full duplex operating mode, NRZ,

NRZI, FM0 and MANCHESTER modes, and internal 8-bit baud rate generator.

4/20

STA2058 Pin description

2 Pin description

2.1 Logic symbol

Figure 1. STA2058 TESEO symbol

Power Pads

Clock & Reset

JTAG Port

Debug

V18 (2)

V33 (7)

VSS (10)

AVSS

AVDD

V18BKP

GPSCLK

CK CKOUT RSTINn

JTDI

JTCK

JTMS

JTRSTn

JTDO

DBGRQS

BOOTEN

STA2058

TESEO

A[23:0]

D[15:0]

WEn.[1:0]

CSn.[3:0]

RDn

P0.[15:0]

P1.[15:0]

P2.[15:0]

(LFBGA144 Only)

nSTDBY_I

nSTDBY_O RTCXTO RTCXTI

WAKEUP

nWAKEUP

USBDN USBDP

GPSDAT[1] LFBGA144 Only

GPSDAT[0]

EMI Interface

LFBGA144 ONLY

GeneraI

Purpose I/O

RTC

& WKUP

Pads

USB Pads

5/20

System block diagram STA2058

3 System block diagram

Figure 2. STA2058 TESEO block diagram

1 DP

5 DP

3 DP

5 DP

4 AF

2 AF

4 AF

ARM7TDMI

CPU

256K Flash

64K

RAM

STC(JTAG)

VREG

RCCU

PLL

Interrupt

Contr.

12-bit A/D Converter

TIMER0

TIMER1

TIMER2

TIMER3

EMI

APB

BRIDGE3

ARM7 Native BUS

APB

BRIDGE2

APB BUS

39 DP + 8 AF

HPGPS 16-ch. correlator + Emerald DSP

APB

BRIDGE1

I2C0

I2C1

SPI0

SPI1

UART0

UART1

UART2

3 DP

2 AF

4 AF

2 AF

RTC

2 DP

16 AF

2 AF

48 IO

OSCILL

Wakeup

WATCHDOG

Fully Prog.

I/O

6/20

UART3

[USB]

[CAN0]

[CAN1]

HDLC

2 AF

3 DP

2 AF

3 AF

+ 14 hidden pages