ST ST2S06A33, ST2S06B User Manual
ST2S06A33
ST2S06B
Dual synchronous rectification with reset or inhibit, 0.5 A, 1.5 MHz
adjustable step-down switching regulator
Datasheet − production data
Features
■ Step-down current mode PWM (1.5 MHz) DC-
DC converter
■ Fixed or adjustable output voltage from 0.8 V
■ 2% DC output voltage tolerance
■ Synchronous rectification
■ Reset function for A version
■ Inhibit function for B version
■ Internal soft start for startup current limitation
and power ON delay of 50-100 µs
■ Typical efficiency: > 90%
■ 0.5 A output current capability
■ Non-switching quiescent current: max 1.2 mA
over temperature range
■ R
■ Uses tiny capacitors and inductors
■ Available in QFN12L (4x4 mm)
DS(ON)
150 mΩ (typ.)
mode PWM topology and the utilization of low
ESR SMD ceramic capacitors. The devices are
thermally protected and current-limited to prevent
damage due to accidental short-circuit. The
ST2S06A33 and ST2S06B are available in the
QFN12L (4x4 mm) package.
QFN12L (4 x 4 mm)
Description
The ST2S06A33 and ST2S06B are dual stepdown DC-DC converters optimized for powering
low-voltage digital cores in ODD applications and,
generally, to replace high current linear solutions
when the power dissipation may cause high
heating of the application environment. It provides
up to 0.5 A over an input voltage range of 2.5 V to
5.5 V.
A high switching frequency of 1.5 MHz allows the
use of tiny surface-mount components as well as
a resistor divider to set the output voltage value.
Only an inductor and two capacitors are required.
A low output ripple is guaranteed by the current
Table 1. Device summary
Order code Package Packaging
ST2S06A33PQR
ST2S06BPQR
May 2012 Doc ID 13866 Rev 5 1/18
This is information on a product in full production.
QFN12L (4 x 4 mm) Tape and reel
www.st.com
18
Contents ST2S06A33, ST2S06B
Contents
1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18 Doc ID 13866 Rev 5
ST2S06A33, ST2S06B Schematic diagram
1 Schematic diagram
Figure 1. Schematic diagram
RESET_OUT *
RESET_OUT *
HV
HV
Delay
Delay
Trimming
Trimming
Ref
Ref
VI_A
VI_A
VI_SW
VI_SW
SW
SW
FB1
FB1
FB2
FB2
Ref
Ref
* ST2S06A33
** ST2S06B
Soft Start
Soft Start
GND
GND
CONTROL
CONTROL
LOGIC
LOGIC
INH**
INH**
VI_SW
VI_SW
GND
GND
SW2
SW2
Doc ID 13866 Rev 5 3/18
Pin configuration ST2S06A33, ST2S06B
2 Pin configuration
Figure 2. Pin connections (top view)
Table 2. Pin description
Pin n° ST2S06A33 ST2S06B Name and function
1 HV HV Programing pin. It must be floating or connected to GND.
2 FB2 FB2 Feedback voltage
3 GND2 GND2 Power ground
4 SW2 SW2 Switching pin
5 VIN_SW VIN_SW Power input voltage pin
6 SW1 SW1 Switching pin
7 GND1 GND1 Power ground
8 FB1/OUT1 FB1 Feedback voltage / output voltage
9 Reset_out NC Reset out pin
10 NC INH Inhibit pin
11 VIN_A VIN_A Supply for analog circuit
12 GND_A GND_A System ground
4/18 Doc ID 13866 Rev 5
ST2S06A33, ST2S06B Maximum ratings
3 Maximum ratings
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
IN_SW
V
V
IN_A
INH
Positive power supply voltage -0.3 to 7 V
Positive power supply voltage -0.3 to 7 V
Inhibit voltage -0.3 to 7 V
SWITCH voltage Max. voltage of output pin -0.3 to 7 V
V
FB1,2/VO1
V
O1
Current into VFB
pin
T
J
T
STG
T
LEAD
Feedback voltage/output voltage -0.3 to 2.5 V
Output voltage (for VO > 1.6 V) -0.3 to 5 V
Common mode input voltage +1 to -1 mA
Max junction temperature 150 °C
Storage temperature range -65 to +150 °C
Lead temperature (soldering) 10 sec. 300 °C
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 4. Thermal data
Symbol Parameter Value Unit
R
thJC
R
thJA
Thermal resistance junction-case 10 °C/W
Thermal resistance junction-ambient 60 °C/W
Table 5. ESD performance
Symbol Parameter Test conditions Value Unit
ESD ESD protection voltage HBM-DH11C 4 kV
Doc ID 13866 Rev 5 5/18
Electrical characteristics ST2S06A33, ST2S06B
4 Electrical characteristics
V
µH, T
Table 6. Electrical characteristics for the ST2S06A33
= V
IN_SW
= - 30 to 125 °C unless otherwise specified. Typical values are referred to 25 °C.
J
IN_A
= 5 V, V
= 3.3 V, V
01
= 1.2 V, C1 = 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3
O2
Symbol Parameter Test conditions Min. Typ. Max. Unit
OUT
FB
I
O1
I
FB2
I
Q
I
O1,2
I
MIN
%V
O1,2
N
ΔV
O1,2
PWM f
D
MAX
I
SWL
I
LKN
I
LKP
R
DSon
R
DSon
η Efficiency
T
SHDN
T
HYS
Output feedback pin 3.23 3.3 3.37 V
1
Feedback voltage 784 800 816 mV
2
I
pin bias current VO = 3.5 V 1520µA
O1
VFB pin bias current V
Quiescent current V
Output current VIN = 4 to 5.5 V
= 1 V 600 nA
FB
= 1 V 1.2 mA
FB
(1)
0.8 A
Minimum output current 1 mA
/ΔV
I
Reference line regulation 4V < V
< 5.5 V 0.032
IN
Reference load regulation 10mA < IO < 0.5 A 5.5 15 mV
PWM switching
S
frequency
(1)
Maximum duty cycle V
V
= 0.7 V, TA = 25°C 1.2 1.5 1.8 MHz
FB
= 0.7 V, TA = 25°C 85 94 %
FB
Switching current limitation 1 1.2 A
NMOS leakage current V
PMOS leakage current V
-N NMOS switch on resistance I
-P PMOS switch on resistance I
Thermal shut down
Thermal shut down
hysteresis
(2)
(2)
= 0.9 V, TA = 25°C 0.1 µA
FB
= 0.9 V, TA = 25°C 0.1 µA
FB
= 250 mA 0.15 0.3 Ω
SW
= 250 mA 0.2 0.4 Ω
SW
= 20 mA to 100 mA 75 %
I
O
I
= 100 mA to 0.5 A 90 %
O
130 150 °C
15 °C
%V
V
/
O
IN
100 mA < IO < 500 mA
ΔV
/ΔIOLoad transient response
O1,2
(2)
t
= tF => 100 ns, TA = 25°C
R
Reset section
t
DEL
V
RES
1. VO= 90% of nominal value.
2. Guaranteed by design, but not tested in production.
Delay time TA = 25°C 80 85 ms
V
Rising 4.5 4.6 4.75
Reset in threshold
measured on input pin
IN_A
V
Falling 4.12 4.2 4.28
IN_A
6/18 Doc ID 13866 Rev 5
-5 +5 %V
O
V
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