Table 7.AC characteristics - test conditions: V
Table 8.AC characteristics - test conditions: V
Table 9.AC characteristics - test conditions: V
Table 10.AC characteristics - test conditions: V
Table 11.AC characteristics - test conditions: V
Table 12.AC characteristics - test conditions: V
Figure 7.Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 19
Figure 8.Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . 20
Figure 9.Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . 21
Figure 10.Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 21
Figure 11.Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 22
4/24Doc ID 14907 Rev 3
ST2329ADescription
1 Description
The ST2329A is a 2-bit dual supply level translator which provides the level shifting
capability to allow data transfer in a multi-voltage system. Externally applied voltages, V
and V
, set the logic levels on either side of the device. It utilizes a transmission gate-based
L
design that allows bidirectional level translation without a control pin.
CC
The ST2329A accepts V
from 1.65 to 3.6 V and VCC from 1.80 to 5.5 V, making it ideal for
L
data transfer between low-voltage ASICs/PLD and higher voltage systems. This device has
a tri-state output mode which can be used to disable all I/Os.
The ST2329A supports power-down mode when V
is grounded/floating and the device is
CC
disabled via the OE pin.
Doc ID 14907 Rev 35/24
Pin settingsST2329A
2 Pin settings
2.1 Pin connection
Figure 1.Pin connection (top through view)
V
I/O
VL1
V
109
1
CC
L
8
I/O
VCC1
I/O
VL2
OE
2.2 Pin description
Table 2.Pin description
Pin numberSymbolName and function
1I/O
2I/O
3OEOutput enable
4NCNo connection
5NCNo connection
6GNDGround
2
3
4
5
7
6
I/O
GND
VCC2
NCNC
CS00011
VL1
VL2
Data input/output
Data input/output
7I/O
8I/O
9V
10V
6/24Doc ID 14907 Rev 3
VCC2
VCC1
CC
L
Data input/output
Data input/output
Supply voltage
Supply voltage
ST2329ADevice block diagrams
3 Device block diagrams
Figure 2.ST2329A block diagram
6
34!
,
/%
6
)
/
6,
1. ST2329A has 2 channels. For simplicity, the diagram above shows only 1 channel.
2. When OE is LOW, all I/Os are in high impedance mode.
%.
6
,
##
ONESHOTCIRCUIT
)/
6
##
!-6
Figure 3.Application block diagram
6
,
6
,
3YSTEM
CONTROLLER
6
6
,
,
6
)/
)/
/%
,
6,
6,
6
##
6
##
6
6
##
##
6
##
3YSTEM
)/
6##
)/
6##
CONTROLLER
!-6
Doc ID 14907 Rev 37/24
Supplementary notesST2329A
4 Supplementary notes
4.1 Driver requirements
The ST2329A may be driven by an open drain or totem pole driver and the nature of the
device output is “open drain”. It must not be used to drive a pull-down resistor as the
impedance of the output at HIGH state depends on the pull-up resistor placed at the I/Os.
As the device has pull-up resistors on both the I/O
ensure that the driver is able to sink the required amount of current. For example, if the
settings are V
=5.5V, VL= 4.3 V, and the pull-up resistor is 10 kΩ, then the driver must
CC
be able to sink at least (5.5 V / 10 kΩ) + (4.3 V / 10 kΩ)
requirements of the ST2329A.
4.2 Load driving capability
To support the open drain system, the one-shot transistor is turned on only during high
transition at the output side. When it drives a high state, after the one-shot transistor is
turned off, only the pull-up resistor is able to maintain the state. In this case, the resistive
load is not recommended.
4.3 Power-off feature
In some applications where it might be required to turn off one of the power supplies
powering up the level translator, the user may turn off the V
(device is disabled). There is no current consumption in V
causes, and the I/Os are in a high impedance state in this mode.
4.4 Truth table
and I/OVL ports, the user needs to
VCC
= 1 mA and still meet the V
only when the OE pin is low
CC
due to floating gates or other
L
IL
Table 3.Truth table
EnableBidirectional input/output
OEI/O
(1)
H
(1)
H
L Z
1. High level VL power supply referred.
2. High level VCC power supply referred.
3. Z = high impedance.
8/24Doc ID 14907 Rev 3
VCC
(2)
H
L L
(3)
I/O
H
Z
(1)
(3)
VL
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