ST SRT512 User Manual

SRT512

13.56 MHz short-range contactless memory chip with 512-bit EEPROM and anticollision functions

Features

ISO 14443-2 Type B air interface compliant

ISO 14443-3 Type B frame format compliant

13.56 MHz carrier frequency

847 kHz subcarrier frequency

106 Kbit/second data transfer

8 bit Chip_ID based anticollision system

2 count-down binary counters with automated anti-tearing protection

64-bit unique identifier

512-bit EEPROM with write protect feature

Read_block and Write_block (32 bits)

Internal tuning capacitor

1 million erase/write cycles

40-year data retention

Self-timed programming cycle

5 ms typical programming time

Unsawn wafer

Bumped and sawn wafer

Applications

Transport

September 2011

Doc ID 13277 Rev 5

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www.st.com

Contents

SRT512

 

 

Contents

1

Description .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

2

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

2.1

AC1, AC0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

3

Data transfer

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9

 

3.1

Input data transfer from reader to SRT512 (request frame) . . . . . . . . . . . .

9

 

 

3.1.1

Character transmission format for request frame . . . . . . . . . . . . . . . . . .

9

 

 

3.1.2

Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

 

3.1.3

Request end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

3.2 Output data transfer from SRT512 to reader (answer frame) . . . . . . . . . . 11

3.2.1 Character transmission format for answer frame . . . . . . . . . . . . . . . . . . 11 3.2.2 Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2.3 Answer end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3 Transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

4.1

EEPROM area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

4.2

32-bit binary counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

4.3

EEPROM area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

 

4.4

System area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

4.4.1 OTP_Lock_Reg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.4.2 Fixed Chip_ID (Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5

SRT512 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20

6

SRT512 states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

6.1

Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

6.2

Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

6.3

Inventory state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

6.4

Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

6.5

Deselected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

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Contents

 

 

 

 

 

6.6

Deactivated state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . 21

7

Anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 23

 

7.1

Description of an anticollision sequence . . . . . . . . . . . . . . . . . . . . .

. . . . 25

8

SRT512 commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 27

8.1 Initiate() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8.2 Pcall16() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.3 Slot_marker(SN) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.4 Select(Chip_ID) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8.5 Completion() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.6 Reset_to_inventory() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.7 Read_block(Addr) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.8 Write_block (Addr, Data) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.9 Get_UID() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.10 Power-on state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9

Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

38

10

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

39

11

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

41

Appendix A ISO14443 type B CRC calculation . . . . . . . . . . . . . . . . . . . . . . . . . .

42

Appendix B SRT512 command brief . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

43

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

45

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List of tables

SRT512

 

 

List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3. Standard anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 4. Command code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 7. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 8. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 9. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

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List of figures

 

 

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. Die floor plan. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. 10% ASK modulation of the received wave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. SRT512 request frame character format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Request end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7. Wave transmitted using BPSK subcarrier modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 8. Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9. Answer end of frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 10. Example of a complete transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11. CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. SRT512 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 13. Lockable EEPROM area (addresses 0 to 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. Binary counter (addresses 5 to 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 15. Count down example (binary format) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 16. EEPROM (addresses 7 to 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17. System area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 18. State transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 19. SRT512 Chip_ID description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 20. Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 21. Example of an anticollision sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 22. Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 23. Initiate response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 24. Initiate frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 25. Pcall16 request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 26. Pcall16 response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 27. Pcall16 frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 28. Slot_marker request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 29. Slot_marker response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 30. Slot_marker frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 31. Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 32. Select response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 33. Select frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 34. Completion request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 35. Completion response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 36. Completion frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 37. Reset_to_inventory request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 38. Reset_to_inventory response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 39. Reset_to_inventory frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . 33 Figure 40. Read_block request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 41. Read_block response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 42. Read_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 43. Write_block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 44. Write_block response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 45. Write_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 46. Get_UID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 47. Get_UID response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 48. 64-bit unique identifier of SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

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List of figures

SRT512

 

 

Figure 49. Get_UID frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 50. SRT512 synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 51. Initiate frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 52. Pcall16 frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 53. Slot_marker frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 54. Select frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 55. Completion frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 56. Reset_to_inventory frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . 44 Figure 57. Read_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 58. Write_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 59. Get_UID frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . 44

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SRT512

Description

 

 

1 Description

The SRT512 is a contactless memory, powered by an externally transmitted radio wave. It contains a 512-bit user EEPROM. The memory is organized as 16 blocks of 32 bits. The SRT512 is accessed via the 13.56 MHz carrier. Incoming data are demodulated and decoded from the received amplitude shift keying (ASK) modulation signal and outgoing data are generated by load variation using bit phase shift keying (BPSK) coding of a

847 kHz subcarrier. The received ASK wave is 10% modulated. The data transfer rate between the SRT512 and the reader is 106 Kbit/s in both reception and emission modes.

The SRT512 follows the ISO 14443-2 Type B recommendation for the radio-frequency power and signal interface.

Figure 1. Logic diagram

 

 

 

AC1

 

 

Power

 

 

 

 

 

 

Supply

 

 

 

 

Regulator

 

 

 

 

 

 

 

 

512-bit

ASK

 

 

 

User

Demodulator

 

 

 

EEPROM

 

 

 

 

BPSK

 

 

 

 

 

 

 

 

Load

 

 

 

 

Modulator

AC0

 

 

 

AI13502

 

 

 

 

 

The SRT512 is specifically designed for short range applications that need re-usable products. The SRT512 includes an anticollision mechanism that allows it to detect and select tags present at the same time within range of the reader.

Table 1.

Signal names

 

 

Signal name

Description

 

 

 

AC1

 

Antenna coil

 

 

 

AC0

 

Antenna coil

 

 

 

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Signal description

SRT512

 

 

The SRT512 contactless EEPROM can be randomly read and written in block mode (each block containing 32 bits). The instruction set includes the following nine commands:

Read_block

Write_block

Initiate

Pcall16

Slot_marker

Select

Completion

Reset_to_inventory

Get_UID

The SRT512 memory is organized in three areas, as described in Table 12. The first area is an EEPROM area where all blocks behave as User blocks.

The second area provides two 32-bit binary counters that can only be decremented from FFFF FFFFh to 0000 0000h, and gives a capacity of 4,294,967,296 units per counter.

The last area is the EEPROM memory. It is accessible by block of 32 bits and includes an auto-erase cycle during each Write_block command.

Figure 2. Die floor plan

AC0

 

AC1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI09055

2 Signal description

2.1AC1, AC0

The pads for the antenna coil. AC1 and AC0 must be directly bonded to the antenna.

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SRT512

Data transfer

 

 

3 Data transfer

3.1Input data transfer from reader to SRT512 (request frame)

The reader must generate a 13.56 MHz sinusoidal carrier frequency at its antenna, with enough energy to “remote-power” the memory. The energy received at the SRT512’s antenna is transformed into a supply voltage by a regulator, and into data bits by the ASK demodulator. For the SRT512 to decode correctly the information it receives, the reader must 10% amplitude-modulate the 13.56 MHz wave before sending it to the SRT512. This is represented in Figure 3. The data transfer rate is 106 Kbits/s.

Figure 3. 10% ASK modulation of the received wave

DATA BIT TO TRANSMIT

TO THE SRT512

10% ASK MODULATION OF THE 13.56-MHz WAVE,

GENERATED BY THE READER

Transfer time for one data bit is 1/106 kHz

Ai13503b

3.1.1Character transmission format for request frame

The SRT512 transmits and receives data bytes as 10-bit characters, with the least significant bit (b0) transmitted first, as shown in Figure 4. Each bit duration, an ETU (elementary time unit), is equal to 9.44 µs (1/106 kHz).

These characters, framed by a start of frame (SOF) and an end of frame (EOF), are put together to form a command frame as shown in Figure 10. A frame includes an SOF, commands, addresses, data, a CRC and an EOF as defined in the ISO 14443-3 Type B Standard. If an error is detected during data transfer, the SRT512 does not execute the command, but it does not generate an error frame.

Figure 4. SRT512 request frame character format

 

b0

b1

b2

b3

b4

b5

b6

b7

b8

b9

 

 

 

 

 

 

 

 

 

 

 

1 ETU

Start

LSb

 

 

Information Byte

 

 

MSb

Stop

"0"

 

 

 

 

"1"

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ai07664

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Data transfer

 

SRT512

 

 

 

 

 

 

Table 2.

Bit description

 

 

 

 

 

 

 

 

Bit

Description

Value

 

 

 

 

 

 

 

b0

Start bit used to synchronize the transmission

b0 = 0

 

 

b1 to b8

Information byte (command, address or data)

The information byte is sent with

 

 

the least significant bit first

 

 

 

 

 

 

 

b9

Stop bit used to indicate the end of a character

b9 = 1

 

3.1.2Request start of frame

The SOF described in Figure 5 is composed of:

one falling edge,

followed by 10 ETUs at logic-0,

followed by a single rising edge,

followed by at least 2 ETUs (and at most 3) at logic-1.

Figure 5.

 

Request start of frame

 

 

 

 

 

 

 

 

 

 

 

 

b0

b1

b2

b3

b4

b5

b6

b7

b8

b9

b10

b11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ETU

 

0

0

0

0

0

0

0

0

0

0

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ai07665

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.1.3Request end of frame

The EOF shown in Figure 6 is composed of:

one falling edge,

followed by 10 ETUs at logic-0,

followed by a single rising edge.

Figure 6.

Request end of frame

 

 

 

 

 

 

 

 

 

 

b0

b1

b2

b3

b4

b5

b6

b7

b8

b9

 

 

 

 

0

0

0

0

0

0

0

0

0

0

 

 

 

ETU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Doc ID 13277 Rev 5

ST SRT512 User Manual

SRT512

Data transfer

 

 

3.2Output data transfer from SRT512 to reader (answer frame)

The data bits issued by the SRT512 use back-scattering. Back-scattering is obtained by modifying the SRT512 current consumption at the antenna (load modulation). The load modulation causes a variation at the reader antenna by inductive coupling. With appropriate detector circuitry, the reader is able to pick up information from the SRT512. To improve load-modulation detection, data is transmitted using a BPSK encoded, 847 kHz subcarrier frequency ƒs as shown in Figure 7, and as specified in the ISO 14443-2 Type B standard.

Figure 7. Wave transmitted using BPSK subcarrier modulation

Data Bit to be Transmitted to the Reader

Or

847-kHz BPSK Modulation

Generated by the SRT512

BPSK Modulation at 847 kHz

 

During a One-bit Data Transfer Time (1/106 kHz)

AI13504b

3.2.1Character transmission format for answer frame

The character format is the same as for input data transfer (Figure 4). The transmitted frames are made up of an SOF, data, a CRC and an EOF (Figure 10). As with an input data transfer, if an error occurs, the reader does not issue an error code to the SRT512, but it should be able to detect it and manage the situation. The data transfer rate is

106 Kbits/second.

3.2.2Answer start of frame

The SOF described in Figure 8 is composed of:

followed by 10 ETUs at logic-0

followed by 2 ETUs at logic-1

Figure 8.

Answer start of frame

 

 

 

 

 

 

 

 

 

 

 

 

b0

b1

b2

b3

b4

b5

b6

b7

b8

b9

b10

b11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ETU

 

0

0

0

0

0

0

0

0

0

0

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ai07665

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Doc ID 13277 Rev 5

11/46

Data transfer

SRT512

 

 

3.2.3Answer end of frame

The EOF shown in Figure 9 is composed of:

followed by 10 ETUs at logic-0,

followed by 2 ETUs at logic-1.

Figure 9.

Answer end of frame

 

 

 

 

 

 

 

 

 

 

 

b0

b1

b2

b3

b4

b5

b6

b7

b8

b9

b10

b11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ETU

0

0

0

0

0

0

0

0

0

0

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ai07665

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.3Transmission frame

Between the request data transfer and the answer data transfer, all ASK and BPSK modulations are suspended for a minimum time of t0 = 128/ƒS. This delay allows the reader to switch from Transmission to Reception mode. It is repeated after each frame. After t0, the 13.56 MHz carrier frequency is modulated by the SRT512 at 847 kHz for a period of

t1 = 128/ƒS to allow the reader to synchronize. After t1, the first phase transition generated by the SRT512 forms the start bit (‘0’) of the answer SOF. After the falling edge of the answer EOF, the reader waits a minimum time, t2, before sending a new request frame to the SRT512.

Figure 10. Example of a complete transmission frame

Sent by the

SOF

Cmd

Data

CRC

CRC

EOF

 

 

 

 

SOF

Reader

 

 

 

 

 

12 bits

10 bits

10 bits

10 bits

10 bits

10 bits

 

 

 

 

 

 

at 106kb/s

t DR

 

 

 

fs=847.5kHz

 

 

 

Sent by

 

 

 

 

 

 

Sync

SOF

Data CRC CRC EOF

SRT512

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t 0

t 1

12 bits

10 bits 10 bits

10 bits

12 bits

 

 

 

 

 

 

128/fs

128/fs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t 2

 

 

Input data transfer using ASK

 

 

Output data transfer using BPSK

 

 

 

 

 

 

 

 

 

 

 

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Doc ID 13277 Rev 5

SRT512

Data transfer

 

 

3.4CRC

The 16-bit CRC used by the SRT512 is generated in compliance with the ISO14443 type B recommendation. For further information, please see Appendix A. The initial register contents are all 1s: FFFFh.

The two-byte CRC is present in every request and in every answer frame, before the EOF. The CRC is calculated on all the bytes between SOF (not included) and the CRC field.

Upon reception of a request from a reader, the SRT512 verifies that the CRC value is valid. If it is invalid, the SRT512 discards the frame and does not answer the reader.

Upon reception of an answer from the SRT512, the reader should verify the validity of the CRC. In case of error, the actions to be taken are the reader designer’s responsibility.

The CRC is transmitted with the least significant byte first and each byte is transmitted with the least significant bit first.

Figure 11. CRC transmission rules

 

 

LSByte

MSByte

 

 

LSbit

MSbit LSbit

MSbit

 

 

 

 

 

 

 

 

CRC 16 (8 bits)

CRC 16 (8 bits)

 

 

 

 

 

 

 

 

 

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Doc ID 13277 Rev 5

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Memory mapping

SRT512

 

 

4 Memory mapping

The SRT512 is organized as 16 blocks of 32 bits as shown in Table 12. All blocks are accessible by the Read_block command. Depending on the write access, they can be updated by the Write_block command. A Write_block updates all the 32 bits of the block.

Figure 12. SRT512 memory mapping

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Block

MSB

32-bit block

 

 

 

 

LSB

Description

 

 

Addr

b

 

b

b

 

b

 

b

b

b

 

 

31

15

14

 

 

 

 

 

16

 

 

8

7

0

 

 

 

0

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

lockable

 

 

2

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EEPROM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

32 bits binary counter

 

 

 

 

Count down

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

32 bits binary counter

 

 

 

 

counter

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Lockable

 

 

11

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EEPROM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

 

 

User area

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

255

 

 

OTP_Lock_Reg

1

ST Reserved

 

Fixed Chip_ID

System OTP bits

 

 

 

 

 

 

(Option)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UID0

 

 

64 bits UID area

 

 

 

 

 

ROM

 

 

 

 

 

 

 

 

 

 

 

 

UID1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Doc ID 13277 Rev 5

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