SRT512
13.56 MHz short-range contactless memory chip with 512-bit EEPROM and anticollision functions
Features
■ISO 14443-2 Type B air interface compliant
■ISO 14443-3 Type B frame format compliant
■13.56 MHz carrier frequency
■847 kHz subcarrier frequency
■106 Kbit/second data transfer
■8 bit Chip_ID based anticollision system
■2 count-down binary counters with automated anti-tearing protection
■64-bit unique identifier
■512-bit EEPROM with write protect feature
■Read_block and Write_block (32 bits)
■Internal tuning capacitor
■1 million erase/write cycles
■40-year data retention
■Self-timed programming cycle
■5 ms typical programming time
–Unsawn wafer
–Bumped and sawn wafer
Applications
■ Transport
September 2011 |
Doc ID 13277 Rev 5 |
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www.st.com
Contents |
SRT512 |
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Contents
1 |
Description . |
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2 |
Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.1 |
AC1, AC0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Data transfer |
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3.1 |
Input data transfer from reader to SRT512 (request frame) . . . . . . . . . . . . |
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3.1.1 |
Character transmission format for request frame . . . . . . . . . . . . . . . . . . |
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3.1.2 |
Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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3.1.3 |
Request end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
3.2 Output data transfer from SRT512 to reader (answer frame) . . . . . . . . . . 11
3.2.1 Character transmission format for answer frame . . . . . . . . . . . . . . . . . . 11 3.2.2 Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2.3 Answer end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 |
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.1 |
EEPROM area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.2 |
32-bit binary counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.3 |
EEPROM area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.4 |
System area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
18 |
4.4.1 OTP_Lock_Reg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4.2 Fixed Chip_ID (Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 |
SRT512 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
SRT512 states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.1 |
Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.2 |
Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.3 |
Inventory state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.4 |
Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.5 |
Deselected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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SRT512 |
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6.6 |
Deactivated state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7 |
Anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7.1 |
Description of an anticollision sequence . . . . . . . . . . . . . . . . . . . . . |
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8 |
SRT512 commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.1 Initiate() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8.2 Pcall16() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.3 Slot_marker(SN) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.4 Select(Chip_ID) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8.5 Completion() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.6 Reset_to_inventory() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.7 Read_block(Addr) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.8 Write_block (Addr, Data) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.9 Get_UID() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.10 Power-on state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
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Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10 |
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11 |
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
41 |
Appendix A ISO14443 type B CRC calculation . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Appendix B SRT512 command brief . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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List of tables |
SRT512 |
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List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3. Standard anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 4. Command code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 7. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 8. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 9. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
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List of figures |
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List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. Die floor plan. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. 10% ASK modulation of the received wave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. SRT512 request frame character format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Request end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7. Wave transmitted using BPSK subcarrier modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 8. Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9. Answer end of frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 10. Example of a complete transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11. CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. SRT512 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 13. Lockable EEPROM area (addresses 0 to 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. Binary counter (addresses 5 to 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 15. Count down example (binary format) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 16. EEPROM (addresses 7 to 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17. System area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 18. State transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 19. SRT512 Chip_ID description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 20. Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 21. Example of an anticollision sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 22. Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 23. Initiate response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 24. Initiate frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 25. Pcall16 request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 26. Pcall16 response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 27. Pcall16 frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 28. Slot_marker request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 29. Slot_marker response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 30. Slot_marker frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 31. Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 32. Select response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 33. Select frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 34. Completion request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 35. Completion response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 36. Completion frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 37. Reset_to_inventory request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 38. Reset_to_inventory response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 39. Reset_to_inventory frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . 33 Figure 40. Read_block request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 41. Read_block response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 42. Read_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 43. Write_block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 44. Write_block response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 45. Write_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 46. Get_UID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 47. Get_UID response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 48. 64-bit unique identifier of SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
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Figure 49. Get_UID frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 50. SRT512 synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 51. Initiate frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 52. Pcall16 frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 53. Slot_marker frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 54. Select frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 55. Completion frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 56. Reset_to_inventory frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . 44 Figure 57. Read_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 58. Write_block frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 59. Get_UID frame exchange between reader and SRT512 . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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SRT512 |
Description |
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The SRT512 is a contactless memory, powered by an externally transmitted radio wave. It contains a 512-bit user EEPROM. The memory is organized as 16 blocks of 32 bits. The SRT512 is accessed via the 13.56 MHz carrier. Incoming data are demodulated and decoded from the received amplitude shift keying (ASK) modulation signal and outgoing data are generated by load variation using bit phase shift keying (BPSK) coding of a
847 kHz subcarrier. The received ASK wave is 10% modulated. The data transfer rate between the SRT512 and the reader is 106 Kbit/s in both reception and emission modes.
The SRT512 follows the ISO 14443-2 Type B recommendation for the radio-frequency power and signal interface.
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AC1 |
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Power |
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Supply |
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Regulator |
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512-bit |
ASK |
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User |
Demodulator |
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EEPROM |
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BPSK |
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Load |
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Modulator |
AC0 |
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AI13502 |
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The SRT512 is specifically designed for short range applications that need re-usable products. The SRT512 includes an anticollision mechanism that allows it to detect and select tags present at the same time within range of the reader.
Table 1. |
Signal names |
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Signal name |
Description |
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AC1 |
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Antenna coil |
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AC0 |
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Antenna coil |
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Signal description |
SRT512 |
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The SRT512 contactless EEPROM can be randomly read and written in block mode (each block containing 32 bits). The instruction set includes the following nine commands:
●Read_block
●Write_block
●Initiate
●Pcall16
●Slot_marker
●Select
●Completion
●Reset_to_inventory
●Get_UID
The SRT512 memory is organized in three areas, as described in Table 12. The first area is an EEPROM area where all blocks behave as User blocks.
The second area provides two 32-bit binary counters that can only be decremented from FFFF FFFFh to 0000 0000h, and gives a capacity of 4,294,967,296 units per counter.
The last area is the EEPROM memory. It is accessible by block of 32 bits and includes an auto-erase cycle during each Write_block command.
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AI09055
2.1AC1, AC0
The pads for the antenna coil. AC1 and AC0 must be directly bonded to the antenna.
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SRT512 |
Data transfer |
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The reader must generate a 13.56 MHz sinusoidal carrier frequency at its antenna, with enough energy to “remote-power” the memory. The energy received at the SRT512’s antenna is transformed into a supply voltage by a regulator, and into data bits by the ASK demodulator. For the SRT512 to decode correctly the information it receives, the reader must 10% amplitude-modulate the 13.56 MHz wave before sending it to the SRT512. This is represented in Figure 3. The data transfer rate is 106 Kbits/s.
DATA BIT TO TRANSMIT
TO THE SRT512
10% ASK MODULATION OF THE 13.56-MHz WAVE,
GENERATED BY THE READER
Transfer time for one data bit is 1/106 kHz
Ai13503b
The SRT512 transmits and receives data bytes as 10-bit characters, with the least significant bit (b0) transmitted first, as shown in Figure 4. Each bit duration, an ETU (elementary time unit), is equal to 9.44 µs (1/106 kHz).
These characters, framed by a start of frame (SOF) and an end of frame (EOF), are put together to form a command frame as shown in Figure 10. A frame includes an SOF, commands, addresses, data, a CRC and an EOF as defined in the ISO 14443-3 Type B Standard. If an error is detected during data transfer, the SRT512 does not execute the command, but it does not generate an error frame.
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b0 |
b1 |
b2 |
b3 |
b4 |
b5 |
b6 |
b7 |
b8 |
b9 |
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1 ETU |
Start |
LSb |
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Information Byte |
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MSb |
Stop |
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ai07664
Doc ID 13277 Rev 5 |
9/46 |
Data transfer |
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SRT512 |
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Table 2. |
Bit description |
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Bit |
Description |
Value |
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b0 |
Start bit used to synchronize the transmission |
b0 = 0 |
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b1 to b8 |
Information byte (command, address or data) |
The information byte is sent with |
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the least significant bit first |
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b9 |
Stop bit used to indicate the end of a character |
b9 = 1 |
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3.1.2Request start of frame
The SOF described in Figure 5 is composed of:
●one falling edge,
●followed by 10 ETUs at logic-0,
●followed by a single rising edge,
●followed by at least 2 ETUs (and at most 3) at logic-1.
Figure 5. |
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Request start of frame |
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b0 |
b1 |
b2 |
b3 |
b4 |
b5 |
b6 |
b7 |
b8 |
b9 |
b10 |
b11 |
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ETU |
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0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
1 |
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ai07665 |
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3.1.3Request end of frame
The EOF shown in Figure 6 is composed of:
●one falling edge,
●followed by 10 ETUs at logic-0,
●followed by a single rising edge.
Figure 6. |
Request end of frame |
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b0 |
b1 |
b2 |
b3 |
b4 |
b5 |
b6 |
b7 |
b8 |
b9 |
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0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
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ETU |
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ai07666
10/46 |
Doc ID 13277 Rev 5 |
SRT512 |
Data transfer |
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The data bits issued by the SRT512 use back-scattering. Back-scattering is obtained by modifying the SRT512 current consumption at the antenna (load modulation). The load modulation causes a variation at the reader antenna by inductive coupling. With appropriate detector circuitry, the reader is able to pick up information from the SRT512. To improve load-modulation detection, data is transmitted using a BPSK encoded, 847 kHz subcarrier frequency ƒs as shown in Figure 7, and as specified in the ISO 14443-2 Type B standard.
Data Bit to be Transmitted to the Reader
Or
847-kHz BPSK Modulation
Generated by the SRT512
BPSK Modulation at 847 kHz |
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During a One-bit Data Transfer Time (1/106 kHz) |
AI13504b |
The character format is the same as for input data transfer (Figure 4). The transmitted frames are made up of an SOF, data, a CRC and an EOF (Figure 10). As with an input data transfer, if an error occurs, the reader does not issue an error code to the SRT512, but it should be able to detect it and manage the situation. The data transfer rate is
106 Kbits/second.
3.2.2Answer start of frame
The SOF described in Figure 8 is composed of:
●followed by 10 ETUs at logic-0
●followed by 2 ETUs at logic-1
Figure 8. |
Answer start of frame |
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b0 |
b1 |
b2 |
b3 |
b4 |
b5 |
b6 |
b7 |
b8 |
b9 |
b10 |
b11 |
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ETU |
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0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
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0 |
1 |
1 |
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ai07665 |
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Doc ID 13277 Rev 5 |
11/46 |
Data transfer |
SRT512 |
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3.2.3Answer end of frame
The EOF shown in Figure 9 is composed of:
●followed by 10 ETUs at logic-0,
●followed by 2 ETUs at logic-1.
Figure 9. |
Answer end of frame |
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b0 |
b1 |
b2 |
b3 |
b4 |
b5 |
b6 |
b7 |
b8 |
b9 |
b10 |
b11 |
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ETU |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
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0 |
1 |
1 |
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ai07665 |
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Between the request data transfer and the answer data transfer, all ASK and BPSK modulations are suspended for a minimum time of t0 = 128/ƒS. This delay allows the reader to switch from Transmission to Reception mode. It is repeated after each frame. After t0, the 13.56 MHz carrier frequency is modulated by the SRT512 at 847 kHz for a period of
t1 = 128/ƒS to allow the reader to synchronize. After t1, the first phase transition generated by the SRT512 forms the start bit (‘0’) of the answer SOF. After the falling edge of the answer EOF, the reader waits a minimum time, t2, before sending a new request frame to the SRT512.
Sent by the |
SOF |
Cmd |
Data |
CRC |
CRC |
EOF |
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SOF |
Reader |
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12 bits |
10 bits |
10 bits |
10 bits |
10 bits |
10 bits |
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at 106kb/s |
t DR |
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fs=847.5kHz |
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Sent by |
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Sync |
SOF |
Data CRC CRC EOF |
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SRT512 |
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t 0 |
t 1 |
12 bits |
10 bits 10 bits |
10 bits |
12 bits |
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128/fs |
128/fs |
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t 2 |
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Input data transfer using ASK |
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Output data transfer using BPSK |
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Ai13506b |
12/46 |
Doc ID 13277 Rev 5 |
SRT512 |
Data transfer |
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3.4CRC
The 16-bit CRC used by the SRT512 is generated in compliance with the ISO14443 type B recommendation. For further information, please see Appendix A. The initial register contents are all 1s: FFFFh.
The two-byte CRC is present in every request and in every answer frame, before the EOF. The CRC is calculated on all the bytes between SOF (not included) and the CRC field.
Upon reception of a request from a reader, the SRT512 verifies that the CRC value is valid. If it is invalid, the SRT512 discards the frame and does not answer the reader.
Upon reception of an answer from the SRT512, the reader should verify the validity of the CRC. In case of error, the actions to be taken are the reader designer’s responsibility.
The CRC is transmitted with the least significant byte first and each byte is transmitted with the least significant bit first.
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LSByte |
MSByte |
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LSbit |
MSbit LSbit |
MSbit |
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CRC 16 (8 bits) |
CRC 16 (8 bits) |
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ai07667 |
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Doc ID 13277 Rev 5 |
13/46 |
Memory mapping |
SRT512 |
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The SRT512 is organized as 16 blocks of 32 bits as shown in Table 12. All blocks are accessible by the Read_block command. Depending on the write access, they can be updated by the Write_block command. A Write_block updates all the 32 bits of the block.
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Block |
MSB |
32-bit block |
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LSB |
Description |
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Addr |
b |
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b |
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31 |
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16 |
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0 |
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User area |
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1 |
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User area |
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lockable |
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2 |
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User area |
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EEPROM |
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3 |
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User area |
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4 |
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User area |
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5 |
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32 bits binary counter |
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Count down |
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6 |
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32 bits binary counter |
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counter |
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7 |
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User area |
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8 |
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User area |
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User area |
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10 |
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User area |
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Lockable |
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11 |
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User area |
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EEPROM |
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12 |
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User area |
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User area |
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User area |
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User area |
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255 |
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OTP_Lock_Reg |
1 |
ST Reserved |
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Fixed Chip_ID |
System OTP bits |
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(Option) |
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UID0 |
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64 bits UID area |
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ROM |
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UID1 |
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14/46 |
Doc ID 13277 Rev 5 |