transceiver, PHY and MAC
– 3 dBm nominal TX output power
– -95 dBm (typ) RX sensitivity
– + 5 dBm in boost mode
■ Integrated Murata antenna
■ 128 kb embedded Flash and 5 kb integrated
SRAM for program and data storage
■ 17 GPIO with alternate functions: GPIOs,
UART, I
■ 2 16-bit general purpose timers: one 16-bit
2
C, SPI, ADC
sleep timer
■ ADC, sigma-delta converter with 12-bit
resolution
■ On board 24 MHz stable crystal
■ Selectable integrated RC oscillator
(typ 10 kHz) or 32.768 kHz crystal for low
power operation
■ < 2 μA (typ) power consumption in deep sleep
mode
■ Watchdog timer and power on reset
■ Pins available for non-intrusive debug interface
(SIF)
■ Single supply voltage 2.1 to 3.6 Vdc
■ CE and FCC compliance. FCC ID:S9NZB250A
Applications
SPZB250
ZigBee® module
Description
SPZB250 is a low power consumption ZigBee®
module based on EM250 ZigBee
chip which integrates a 16 bit processor together
with a 2.4 GHz, IEEE 802.15.4-compliant
transceiver as well as IEEE 802.15.4 PHY and
MAC. It enables OEMs to easily add wireless
networking capability to any electronic device.
Such a module is a very comprehensive solution
to build wireless sensors with meshing and self
healing capability as required in a WSN scenario.
24 MHz high stability crystal is integrated in the
module to perform the timing requirements as per
ZigBee
®
specifications. An additional
32.768 kHz crystal is provided for low power
operation.
To support user defined applications, a number of
peripherals such as GPIO, UART, I
general purpose timers are available and user
selectable.
®
system-on-
2
C, ADC and
■ Industrial controls
■ Sensor networking
■ Monitoring of remote systems
■ Home applications
■ Security systems
■ Lighting controls
The deep sleep mode with power consumption
less than 2 μA (typ) allows the use in applications
where the battery life is a key constraint.
For other information and details, please refer to
EM250 datasheet available at the Ember
Corporation website.
ST modules are RoHS compliant and being based on ST devices comply with ECOPACK®
norms implemented by ST.
2 Block diagram
Figure 1.Block diagram
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Doc ID 13919 Rev 63/18
Pin settingSPZB250
3 Pin setting
3.1 Pin connection
Figure 2.Pin connection diagram
4/18 Doc ID 13919 Rev 6
SPZB250Pin setting
3.2 Pin description
Table 1.Pin description
Pin nPin nameDirectionDescription
GPIO6I/ODigital I/O
ADC2AnalogADC input 2
1
TMR2CLKIExternal clock input of timer 2
TMR1ENMSKIExternal enable mask of timer1
GPIO5I/ODigital I/O
2
ADC1AnalogADC input 1
PTI_DATAOFrame signal of PTI (packet trace interface)
GPIO4I/ODigital I/O
3
ADC0AnalogADC input 0
PTI_ENOFrame signal of PTI (packet trace interface)
GPIO3I/ODigital I/O
4
SSELISPI slave select of serial controller SC2
TMR2IB.1ICapture of input B of timer 1
5RSTBIActive low reset (an internal pull-up of 30 kΩ typ is provided)
GPIO11I/ODigital I/O
CTSIUART CTS handshake of serial controller SC1
6
MCLKOSPI master clock of serial controller SC1
TMR2IA.1ICapture of input A of timer 2
GPIO12I/ODigital I/O
7
RTSOUART RTS handshake of serial controller SC1
TMR2IB.1ICapture of input B of timer 2
GPIO0I/ODigital I/O
MOSIOSPI master data out of serial controller SC2
8
MOSIISPI slave data in of serial controller SC2
TMR1IA.1ICapture of input A of timer 1
GPIO1I/ODigital I/O
MISOISPI master data in of serial controller SC2
9
MISOOSPI slave data out of serial controller SC2
2
SDAI/OI
TMR2IA.2ICapture of input A of timer 2
C data of serial controller SC2
Doc ID 13919 Rev 65/18
Pin settingSPZB250
Table 1.Pin description (continued)
Pin nPin nameDirectionDescription
GPIO2I/ODigital I/O
MSCLKOSPI master clock of serial controller SC2
10
MSCLKISPI slave clock of serial controller SC2
2
SCLI/OI
TMR2IA.2ICapture of input B of timer 2
11GND--Ground
12VDDPowerInput power supply
GPIO7I/ODigital I/O
13
ADC3AnalogADC input 3
REG_ENOExternal regulator open collector output
GPIO8I/ODigital I/O
VREF_OUTAnalogADC reference output
14
TMR1CLKIExternal clock input of timer 1
TMR2ENMSKIExternal enable mask of timer 2
IRQAIExternal interrupt source A
C clock of serial controller SC2
GPIO9I/ODigital I/O
TXDOUART transmit data of serial controller SC1
15
MOOSPI master data out of serial controller SC1
2
MSDAI/OI
C data of serial controller SC1
TMR1IA.2ICapture of input A of timer 2
GPIO10I/ODigital I/O
RXDIUART receive data of serial controller SC1
16
MIISPI master data in of serial controller SC1
2
MSCLI/OI
C clock of serial controller SC1
TMR1IB.2ICapture of input B of timer 2
17SIF_CLKI
18SIF_MISOO
Non-intrusive debug interface
Serial interface clock signal (internal pull-down)
Non-intrusive debug interface
Serial interface master IN/ slave out
Non-intrusive debug interface
19SIF_MOSII
Serial interface master out/ slave in
To guarantee a proper signal level when in deep sleep mode
connect a 10kΩ resistor to GND
20SIF_LOADBI/O
Non-intrusive debug interface
Serial interface load strobe (Open collector with internal pull-up)
To improve noise immunity connect a 10 kΩ resistor to V
DD
6/18 Doc ID 13919 Rev 6
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