ST SPZB250 User Manual

Features
transceiver, PHY and MAC – 3 dBm nominal TX output power – -95 dBm (typ) RX sensitivity – + 5 dBm in boost mode
Integrated Murata antenna
128 kb embedded Flash and 5 kb integrated
SRAM for program and data storage
17 GPIO with alternate functions: GPIOs,
UART, I
2 16-bit general purpose timers: one 16-bit
2
C, SPI, ADC
sleep timer
ADC, sigma-delta converter with 12-bit
resolution
On board 24 MHz stable crystal
Selectable integrated RC oscillator
(typ 10 kHz) or 32.768 kHz crystal for low power operation
< 2 μA (typ) power consumption in deep sleep
mode
Watchdog timer and power on reset
Pins available for non-intrusive debug interface
(SIF)
Single supply voltage 2.1 to 3.6 Vdc
CE and FCC compliance. FCC ID:S9NZB250A
Applications
SPZB250
ZigBee® module
Description
SPZB250 is a low power consumption ZigBee® module based on EM250 ZigBee chip which integrates a 16 bit processor together with a 2.4 GHz, IEEE 802.15.4-compliant transceiver as well as IEEE 802.15.4 PHY and MAC. It enables OEMs to easily add wireless networking capability to any electronic device. Such a module is a very comprehensive solution to build wireless sensors with meshing and self healing capability as required in a WSN scenario.
24 MHz high stability crystal is integrated in the module to perform the timing requirements as per ZigBee
®
specifications. An additional
32.768 kHz crystal is provided for low power operation.
To support user defined applications, a number of peripherals such as GPIO, UART, I general purpose timers are available and user selectable.
®
system-on-
2
C, ADC and
Industrial controls
Sensor networking
Monitoring of remote systems
Home applications
Security systems
Lighting controls
The deep sleep mode with power consumption less than 2 μA (typ) allows the use in applications where the battery life is a key constraint.
For other information and details, please refer to EM250 datasheet available at the Ember Corporation website.
May 2010 Doc ID 13919 Rev 6 1/18
www.st.com
18
Contents SPZB250
Contents
1 RoHS compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Pin setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 Operating ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2 DC I/O specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.3 RF electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Package mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Appendix A FCC statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
A.1 Label instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
A.2 Special requirement for modular application. . . . . . . . . . . . . . . . . . . . . . . 15
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18 Doc ID 13919 Rev 6
SPZB250 RoHS compliance

1 RoHS compliance

ST modules are RoHS compliant and being based on ST devices comply with ECOPACK® norms implemented by ST.

2 Block diagram

Figure 1. Block diagram

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Doc ID 13919 Rev 6 3/18
Pin setting SPZB250

3 Pin setting

3.1 Pin connection

Figure 2. Pin connection diagram

4/18 Doc ID 13919 Rev 6
SPZB250 Pin setting

3.2 Pin description

Table 1. Pin description

Pin n Pin name Direction Description
GPIO6 I/O Digital I/O
ADC2 Analog ADC input 2
1
TMR2CLK I External clock input of timer 2
TMR1ENMSK I External enable mask of timer1
GPIO5 I/O Digital I/O
2
ADC1 Analog ADC input 1
PTI_DATA O Frame signal of PTI (packet trace interface)
GPIO4 I/O Digital I/O
3
ADC0 Analog ADC input 0
PTI_EN O Frame signal of PTI (packet trace interface)
GPIO3 I/O Digital I/O
4
SSEL I SPI slave select of serial controller SC2
TMR2IB.1 I Capture of input B of timer 1
5 RSTB I Active low reset (an internal pull-up of 30 kΩ typ is provided)
GPIO11 I/O Digital I/O
CTS I UART CTS handshake of serial controller SC1
6
MCLK O SPI master clock of serial controller SC1
TMR2IA.1 I Capture of input A of timer 2
GPIO12 I/O Digital I/O
7
RTS O UART RTS handshake of serial controller SC1
TMR2IB.1 I Capture of input B of timer 2
GPIO0 I/O Digital I/O
MOSI O SPI master data out of serial controller SC2
8
MOSI I SPI slave data in of serial controller SC2
TMR1IA.1 I Capture of input A of timer 1
GPIO1 I/O Digital I/O
MISO I SPI master data in of serial controller SC2
9
MISO O SPI slave data out of serial controller SC2
2
SDA I/O I
TMR2IA.2 I Capture of input A of timer 2
C data of serial controller SC2
Doc ID 13919 Rev 6 5/18
Pin setting SPZB250
Table 1. Pin description (continued)
Pin n Pin name Direction Description
GPIO2 I/O Digital I/O
MSCLK O SPI master clock of serial controller SC2
10
MSCLK I SPI slave clock of serial controller SC2
2
SCL I/O I
TMR2IA.2 I Capture of input B of timer 2
11 GND -- Ground
12 VDD Power Input power supply
GPIO7 I/O Digital I/O
13
ADC3 Analog ADC input 3
REG_EN O External regulator open collector output
GPIO8 I/O Digital I/O
VREF_OUT Analog ADC reference output
14
TMR1CLK I External clock input of timer 1
TMR2ENMSK I External enable mask of timer 2
IRQA I External interrupt source A
C clock of serial controller SC2
GPIO9 I/O Digital I/O
TXD O UART transmit data of serial controller SC1
15
MO O SPI master data out of serial controller SC1
2
MSDA I/O I
C data of serial controller SC1
TMR1IA.2 I Capture of input A of timer 2
GPIO10 I/O Digital I/O
RXD I UART receive data of serial controller SC1
16
MI I SPI master data in of serial controller SC1
2
MSCL I/O I
C clock of serial controller SC1
TMR1IB.2 I Capture of input B of timer 2
17 SIF_CLK I
18 SIF_MISO O
Non-intrusive debug interface Serial interface clock signal (internal pull-down)
Non-intrusive debug interface Serial interface master IN/ slave out
Non-intrusive debug interface
19 SIF_MOSI I
Serial interface master out/ slave in To guarantee a proper signal level when in deep sleep mode connect a 10kΩ resistor to GND
20 SIF_LOADB I/O
Non-intrusive debug interface Serial interface load strobe (Open collector with internal pull-up) To improve noise immunity connect a 10 kΩ resistor to V
DD
6/18 Doc ID 13919 Rev 6
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